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CN100423258C - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN100423258C
CN100423258C CNB2003101138576A CN200310113857A CN100423258C CN 100423258 C CN100423258 C CN 100423258C CN B2003101138576 A CNB2003101138576 A CN B2003101138576A CN 200310113857 A CN200310113857 A CN 200310113857A CN 100423258 C CN100423258 C CN 100423258C
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China
Prior art keywords
semiconductor chip
mentioned
semiconductor
circuit board
passive component
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Expired - Fee Related
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CNB2003101138576A
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CN1519928A (zh
Inventor
福田敏行
藤本博昭
辻睦夫
油井隆
竹冈嘉昭
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Publication of CN1519928A publication Critical patent/CN1519928A/zh
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Abstract

在将2块半导体芯片层叠安装在布线基板上的结构中，在上侧的第2半导体芯片比下侧的第1半导体芯片充分大的情况下，提供了可改善连接第2半导体芯片与布线基板的金属细丝的连接可靠性的半导体器件及其制造方法。在该半导体器件中，在用粘结剂粘结第1半导体芯片的背面与第2半导体芯片的背面的同时，粘结剂的侧部从第1半导体芯片的端部朝向第2半导体芯片的超出第1半导体芯片侧面的部分倾斜。因此，既可抑制因将第2半导体芯片电连接到布线基板上的对金属细丝的冲击而在第2半导体芯片中发生微裂痕，又可抑制发生金属细丝的键合不良。

Description

半导体器件及其制造方法
技术领域
本发明涉及在一个树脂密封型半导体器件内安装了多个半导体芯片及无源部件的树脂密封型半导体器件及其制造方法。特别是，涉及将2块半导体芯片层叠安装在布线基板上的树脂密封型半导体器件及其制造方法。
背景技术
近年来，如笔记本PC、移动电话等所代表的那样，便携式装置在轻量化和薄型化方面正取得日新月异的进步。其中，安装在装置的母板上的电子部件，尤其是成为核心的半导体器件在谋求高密度、高功能化。以往，在将多块半导体芯片内置于一个半导体器件内时，将多块半导体芯片安装在插板(可直接安装在母板上的具有外部端子的基板)的平面上的例如MCM(多芯片组件)正得到普遍的应用(参照特开平09-8220号公报(图1))。但是，为了进一步增高半导体器件内的结构密度，例如多采用将半导体芯片层叠起来的方法(参照特开平11-204720号公报(图1、图3))。通常，在层叠多块半导体芯片时，为了使金属细丝的连接容易，安装在下芯片上的半导体芯片的尺寸一般比下芯片小。然而，例如，在将下芯片直接倒装在基板上，使电路面朝上将上半导体芯片安装在下芯片上的结构中，上半导体芯片的一方被认为是尺寸大者(参照特开2000-299431号公报(图1)、特开2001-320014号公报(图1))。此时，公开了用支撑部或支撑台构件支撑上芯片的方法。
以往在将下半导体芯片直接倒装在载体基板上、使电路面朝上将上半导体芯片安装在下芯片上的结构的树脂密封型半导体器件中，上半导体芯片的一方比下半导体芯片大，上半导体芯片与倒装后的下半导体芯片相比，处于向外伸出的状态。这时，在以超声、热压焊方式将金属细丝连接到上半导体芯片的冲击中，既在上半导体芯片中发生微裂痕，又发生了金属细丝的键合不良。
这里，用图10对课题进行说明。图10A是示出现有的树脂密封型半导体器件的剖面图，图10B是将其一部分放大后的图。另外，在放大后的图中，示出本课题的现象。如图10所示，在将第1半导体芯片1直接倒装在载体基板20上、使电路面朝上将第2半导体芯片2安装在第1半导体芯片1上的结构的树脂密封型半导体器件中，在第2半导体芯片2上用毛细管10将Au丝7与第2半导体芯片2的电极焊区4键合。这时，在第2半导体芯片2比第1半导体芯片1充分大时，如果在高温(150℃至250℃)下一边对电极焊区4施加超声和荷重、一边与电极焊区4进行球键合，则在荷重的冲击下，第2半导体芯片2弯曲(符号11表示弯曲量Δh)。因此，在Au丝7无法稳定地键合的情况或荷重强的情况下，都发生了微细的裂痕12。在图10中，符号5表示柱形凸点，符号6表示导电膏，符号13表示底层充填树脂，符号14表示粘结剂。
发明内容
本发明的目的在于，在布线基板上层叠安装了2块半导体芯片的结构中，在上侧半导体芯片比下侧半导体芯片充分大时，提供可改善将上侧半导体芯片与布线基板连接起来的金属细丝的连接可靠性的树脂密封型半导体器件及其制造方法。
为了达到上述目的，本发明第1方面的半导体器件是包括：具有第1布线电极和第2布线电极的布线基板；在表面上具有与第1布线电极连接的电极的第1半导体芯片；安装在第1半导体芯片上、在比第1半导体芯片大而在表面的至少是周边上具有用金属细丝与第2布线电极电连接的电极的第2半导体芯片的半导体器件，在用粘结剂粘结第1半导体芯片的背面与第2半导体芯片的背面的同时，粘结剂的侧部从第1半导体芯片的端部朝向第2半导体芯片的超出第1半导体芯片侧面的部分倾斜。
按照本结构，由于在用粘结剂粘结第1半导体芯片的背面与第2半导体芯片的背面的同时，粘结剂的侧部从第1半导体芯片的端部朝向第2半导体芯片的超出第1半导体芯片侧面的部分倾斜，所以可使粘结剂的尺寸和形状做到最佳。因此，既可抑制因将第2半导体芯片电连接到布线基板上时对金属细丝的冲击在第2半导体芯片中发生微裂痕，又可抑制发生金属细丝的键合不良。由此，可提供高可靠性的半导体芯片层叠型的树脂密封半导体器件。
本发明第2方面的半导体器件是在本发明第1方面的半导体器件中粘结剂在第1半导体芯片的沿平面方向的面上的截面积在第1半导体芯片的背面的面积以上。按照本结构，由于粘结剂在第1半导体芯片的沿平面方向的面上的截面积在第1半导体芯片的背面的面积以上，所以在第2半导体芯片的背面可形成具有比第1半导体芯片充分大尺寸的厚度的粘结剂。由此，可进一步防止因对金属细丝的冲击而造成的键合不良及对第2半导体芯片造成的微裂痕。
本发明第3方面的半导体器件是在本发明第1方面的半导体器件中粘结剂的侧部为凹曲面形状。按照本结构，由于粘结剂的侧部为凹曲面形状，所以对粘结剂的第1半导体芯片的背面垂直的截面呈逆拱形形状，与桥墩等一样，具有对机械应力的刚性，可承受细丝键合的荷重。
本发明第4方面的半导体器件是在本发明第1方面的半导体器件中粘结剂在第1半导体芯片的背面的整个区域和侧面的一部分上形成。按照本结构，由于粘结剂在第1半导体芯片的背面的整个区域和侧面的一部分上形成，所以在细丝键合的荷重施加于第2半导体芯片的电极上时，可抑制以第1半导体芯片的背面角部为起点施加弯矩力。
本发明第5方面的半导体器件是在本发明第1方面的半导体器件中布线基板与第1半导体芯片之间形成底层充填树脂，底层充填树脂的侧面的至少一部分被粘结剂覆盖。按照本结构，由于布线基板与第1半导体芯片之间形成底层充填树脂，底层充填树脂的侧面的至少一部分被粘结剂覆盖，所以可进一步防止以第1半导体芯片的背面角部为起点施加弯矩力。
本发明第6方面的半导体器件是在本发明第1方面的半导体器件中将无源部件与布线基板的第1半导体芯片安装面电连接，第2半导体芯片比第1半导体芯片和无源部件的配置区域大，将第2半导体芯片的背面和与之相向的无源部件的背面粘结在一起。按照本结构，由于将无源部件与布线基板的第1半导体芯片安装面电连接，第2半导体芯片比第1半导体芯片和无源部件的配置区域大，将第2半导体芯片的背面和与之相向的无源部件的背面粘结在一起，所以在将无源部件与多块半导体芯片一起安装的半导体器件中，可得到与本发明第1部分相同的作用效果。
本发明第7方面的半导体器件是在本发明第1方面的半导体器件中将无源部件与布线基板的第1半导体芯片安装面电连接，第2半导体芯片比第1半导体芯片和无源部件的配置区域大，其高度变得与第1半导体芯片的背面的高度大致相同的衬垫与无源部件的背面粘结在一起，将第2半导体芯片的背面和与之相向的无源部件的背面在介入衬垫的状态下粘结起来。按照本结构，由于其高度变得与第1半导体芯片的背面的高度大致相同的衬垫与无源部件的背面粘结在一起，所以第1半导体芯片的背面与无源部件的背面的高度有所不同，即使在细丝键合的荷重施加到第2半导体芯片的电极上时，第2半导体芯片也可保持在稳定的状态。
本发明第8方面的半导体器件的制造方法是包含：准备具有第1布线电极和第2布线电极的布线基板和在表面上具有电极的第1半导体芯片的工序；用凸点将布线基板的第1布线电极与第1半导体芯片的电极电连接的工序；在比第1半导体芯片大、并在表面的至少是周边上准备具有电极的第2半导体芯片的工序；将与第1半导体芯片的电极相反一侧的背面和与第2半导体芯片的电极相反一侧的背面用粘结剂粘结在一起的工序；以及用金属细丝连接第2半导体芯片的电极与布线基板的第2布线电极的工序的半导体器件的制造方法，在粘结第1半导体芯片与第2半导体芯片的工序中，形成粘结剂的侧部，以便从第1半导体芯片的端部朝向第2半导体芯片的超出第1半导体芯片侧面的部分倾斜。
按照本结构，在粘结第1半导体芯片与第2半导体芯片的工序中，通过形成粘结剂的侧部，以便从第1半导体芯片的端部朝向第2半导体芯片的超出第1半导体芯片侧面的部分倾斜，使粘结剂的尺寸及形状最佳化，可防止因将半导体芯片与布线基板进行电连接时对金属细丝的冲击而造成的键合不良及对第2半导体芯片造成的微裂痕。由此，可提供高可靠性的半导体芯片层叠型的树脂密封半导体器件的制造方法。
本发明第9方面的半导体器件的制造方法是在本发明第8方面的半导体器件的制造方法中，在用金属细丝连接第2半导体芯片与布线基板的工序中，在布线基板的第2布线电极上形成将金属细丝的前端熔融了的球后，将金属细丝连接在第2半导体芯片的电极上。按照本结构，由于在用金属细丝连接第2半导体芯片与布线基板的工序中，在布线基板的第2布线电极上形成将金属细丝的前端熔融了的球后，将金属细丝连接在第2半导体芯片的电极上，所以可将第2半导体芯片上的金属细丝的高度控制得比较低。
本发明第10方面的半导体器件的制造方法是在本发明第8方面的半导体器件的制造方法中，在电连接布线基板与第1半导体芯片的工序中，在电连接布线基板与无源部件、粘接第1半导体芯片与第2半导体芯片的工序中，在第2半导体芯片的背面和与之相向的无源部件的背面之间，在介入其高度变得与第1半导体芯片的背面的高度大致相同的衬垫的状态下粘结起来。
按照本结构，由于在电连接布线基板与第1半导体芯片的工序中，电连接布线基板与无源部件，所以在将无源部件与多块半导体芯片一起安装的半导体器件中，可得到与本发明第8部分相同的作用效果。另外，由于在粘接第1半导体芯片与第2半导体芯片的工序中，在第2半导体芯片的背面和与之相向的无源部件的背面之间，在介入其高度变得与第1半导体芯片的背面的高度大致相同的衬垫的状态下粘结起来，所以在用金属细丝连接第2半导体芯片与布线基板时，即使第1半导体芯片的背面与无源部件的背面的高度有所不同，第2半导体芯片也可保持在稳定的状态。
本发明第11方面的半导体器件的制造方法是在本发明第8方面的半导体器件的制造方法中，在电连接布线基板与第1半导体芯片的工序中，在电连接布线基板与无源部件、而且在布线基板与第1半导体芯片之间形成底层充填树脂，粘接第1半导体芯片与第2半导体芯片的工序中，在第2半导体芯片的背面和与之相向的无源部件的背面之间，在介入其高度变得与第1半导体芯片的背面的高度大致相同的衬垫的状态下粘结起来，而且采用了具有比底层充填树脂大的触变性的材料作为衬垫。由于必须将底层充填树脂注入、充填到第1半导体芯片与布线基板的狭窄的间隙(数μm至十数μm)中，所以对要求小的触变性而言，衬垫最重要的作用是：在安装第2半导体芯片时，在负荷任意的重量时，衬垫发生塑性形变，必须成为与第1半导体芯片的背面大致为同一面，从而衬垫的触变比大于底层充填树脂的触变比是至关重要的。
附图说明
图1A是示出用于本发明的一个实施例的树脂密封型半导体器件的半导体芯片的斜视图，图1B是剖面图。
图2A是示出用于本发明的一个实施例的树脂密封型半导体器件的第1半导体芯片的平面图，图2B是主要部分放大图，图2C是形成电极焊区的说明图。
图3是示出用于本发明的一个实施例的树脂密封型半导体器件的片状基板的平面图。
图4A是图3中的载体基板的半导体元件安装面的平面图，图4B是a-a’剖面图，图4C是外部端子的平面图。
图5是示出用于本发明的一个实施例的树脂密封型半导体器件中的制造工序的剖面图。
图6是图5的下一道工序的剖面图。
图7是本发明的一个实施例中示出粘结剂的形状的剖面图。
图8是示出本发明的另一实施例的树脂密封型半导体器件的剖面图。
图9A是本发明的又一实施例的树脂密封型半导体器件的局部剖开的平面图，图9B是剖面图。
图10A是示出现有的树脂密封型半导体器件的剖面图，图10B是示出其一部分的放大图。
具体实施方式
现根据图1～图7说明本发明的实施例。图1A是示出用于本发明的一个实施例的树脂密封型半导体器件的半导体芯片的斜视图，图1B是剖面图。再有，为了容易理解起见，斜视图是露出了局部剖面结构的图。
图1所示的树脂密封型半导体器件由下述部分构成：
载体基板(布线基板)20，在表面上具有多个电极22、23和连接到电极22、23上的基板布线21，同时在底面上具有将电极22、23与基板布线21电连接在一起的外部端子24；
第1半导体芯片1，在表面上具有利用Au凸点5通过导电膏6对载体基板20的上表面的多个电极(第1布线电极)22进行键合的电极焊区3；
底层充填树脂13，充填覆盖第1半导体芯片1与载体基板20的间隙和第1半导体芯片1的周边端部；
第2半导体芯片2，它比第1半导体芯片1大、在表面的至少是周边上具有电极焊区4，用具有一定厚度的粘结剂14使之与第1半导体芯片1背靠背键合；
Au丝7，用于将第2半导体芯片2的电极焊区4与载体基板20的电极(第2布线电极)23连接在一起；以及
密封树脂25，用于将第1和第2半导体芯片1、2及Au丝7覆盖起来而密封。
另外，粘结剂14的侧部从第1半导体芯片1的端部朝向第2半导体芯片2的超出第1半导体芯片侧面的部分倾斜。
用氧化铝类或氮化铝类的陶瓷基板等作为载体基板20。另外，也可用由环氧树脂基板等的有机性基板构成的绝缘性的单层和多层电路基板等作为另外的材料。另外，为了在载体基板20表面的多个电极22与第1半导体芯片1的电极焊区3之间进行键合，向Au凸点5上供给Ag-Pd膏等导电膏6，使第1半导体芯片1的表面朝下安装在载体基板20上，并使导电膏6固化。由此，可确保载体基板20与第1半导体芯片1之间的电连接和机械连接。另外，通过使用液态的密封树脂作为底层充填树脂13，充填覆盖载体基板20与第1半导体芯片1的间隙和第1半导体芯片1的周边端部。使第1半导体芯片1与第2半导体芯片2背靠背键合的具有一定厚度的粘结剂14可以是在条带材料的两面预先涂敷的粘结材料层，也可以是像硅酮类那样的胶状粘结剂。这里，要点是粘结剂的厚度可任意地设定在数十μm～一百数十μm之间，其截面形状为锥形(斜角)或R面形状(凹曲面)，粘结剂的区域远远大于第1半导体芯片1是重要的。
图2A是示出用于本发明的一个实施例的树脂密封型半导体器件的第1半导体芯片的平面图，图2B是主要部分放大图，图2C是形成电极焊区的说明图。
半导体芯片的集成电路布线规则现在已从0.18μm进展至0.13μm，进而为了使工艺微细化，正向0.10μm进展。与此相对应，与外部连接的电极焊区也在窄间距化方面取得进展，使电极焊区的排列间距缩小至100μm、80μm，以抑制半导体芯片的面积增大。然而，如形成60μm以下的电极焊区间距，则对于探针检查或对Au凸点涂敷导电膏的倒装芯片连接工序等而言，与邻接的电极焊区的距离过窄，从而如图2A、2B所示，可采用将电极焊区3形成交错排列的方法。另一方面，为了抑制半导体集成电路的面积增大，一般也采用在电路元件或内层电路布线上形成电极焊区的POE(焊区在元件上)。
如图2C所示，用细丝键合法(球键合法)在第1半导体芯片1的电极焊区3上形成Au凸点5(也称柱状凸点，是2级突起形状的凸点)。在本方法中，通过将Au丝前端所形成的球热压焊到表面为Al的电极焊区3上，形成2级突起的下级部分，进而通过使毛细管10移动，以所形成的Au丝环形成2级突起的上级部分。在上述状态下，由于2级突起的高度并不均匀，且头顶部也缺乏平坦性，所以通过对2级突起加压进行夷平，使高度均匀化以及头顶部平坦化。将该凸点形成法称为柱状凸点形成。接着，在旋转的圆盘上用刮板法涂敷含有Ag-Pd的导电膏6至适当的厚度，作为导电物质。这时，采用将设置了Au凸点5的第1半导体芯片1压到导电膏6上后再提拉的方法，即所谓的复制法，对Au凸点5供给导电膏6。作为导电膏6，考虑到可靠性、热应力等，采用例如以环氧树脂为粘结剂、以Ag-Pd共沉淀粉末为导体充填剂而成的导电膏6。
图3是示出用于本发明的一个实施例的树脂密封型半导体器件的片状基板的平面图，图4A是图3中的载体基板的半导体元件安装面的平面图，图4B是a-a’剖面图，图4C是外部端子的平面图。
如图3和图4所示，载体基板20被配置在多块片状基板19上。与载体基板20的半导体芯片的连接侧存在与第1、第2半导体芯片电连接的电极22、23。另外，在对置面一侧将外部端子24配置成栅格状。用氧化铝类或氮化铝类的陶瓷基板等作为载体基板20。对应于布线密度，基板形成了4～8层的多层结构。各层的布线21的材料由钨层构成，联结各层的通路用钼材料进行电导通。另外，在与第1、第2半导体芯片电连接的电极22、23及成为外部端子24的陶瓷基板的最表面用非电解镀法在10μm至30μm厚的钨布线上镀覆数μm厚的Ni，再镀覆0.1μm至0.8μm左右的Au层。基板厚度为0.40mm至0.60mm。包围排列在片状基板19上的载体基板20的虚线示出了将多块载体基板20一起用树脂密封的模塑线26。载体基板20之间的单点点划线示出了将树脂密封型半导体器件分割成一个一个的制品分割线28。
接着，说明半导体器件的制造方法。图5和图6是示出本发明的一个实施例的树脂密封型半导体器件中的制造工序的剖面图。
图5A示出将第1半导体芯片用倒装芯片法连接到载体基板20上的工序。采用使第1半导体芯片的表面朝下安装的方法即倒装芯片方式以良好的对位精度将第1半导体芯片1上的供给了导电膏6的Au凸点5与外部端子24在底面上以恒定的间隔形成为栅格状的载体基板20上的电极22键合以后，使之在恒定的温度下热固化。将该连接方法称为SBB(柱状凸点键合)法。再有，关于Au凸点5的形成和导电膏6由于在图2中已进行了详细的叙述，此处就割爱了。
接着，图5B示出将倒装连接的第1半导体芯片1用底层充填树脂13密封的工序。这是将作为热固化性树脂的液态环氧树脂的底层充填树脂13用喷嘴29注入到第1半导体芯片1与载体基板20之间所形成的间隙和第1半导体芯片1的周边部，使之固化，进行树脂密封的工序。本工序的目的在于保护在第1半导体芯片1的表面的集成电路及电极焊区3上的Au凸点5部和导电膏6。
接着，图5C示出第1半导体芯片1的背面与第2半导体芯片2的背面以背靠背的方式粘结的工序。在第2半导体芯片2的背面暂时粘附与第1半导体芯片1相比具有充分大尺寸的厚度的粘结剂14。粘结剂14可以是在条带材料的两面预先涂敷了粘结材料层的粘结剂，也可以是硅酮之类的胶状粘结剂。这里，要点是粘结剂14的厚度可任意地设定在数十μm～一百数十μm之间，粘结剂14侧部的截面形状15为锥形(斜角)或R面形状是重要的。准备其尺寸比第1半导体芯片1大的粘结剂14，用工具将其贴附在第2半导体芯片2的背面。这时，为了不使粘结剂14贴附在工具上，可将剥离性良好的条带贴附在工具上。
尽管未图示，但作为具体的粘结方法，在晶片状态下将切割片贴附到第2半导体芯片2的表面上，从第2半导体芯片2的背面进行切割。其后，在原有的状态下，选择作为合格品的第2半导体芯片2，将粘结剂14贴附在背面。接着，通过切割片粘结固定在第1半导体芯片1的背面上。
接着，图5D示出用Au丝7将第2半导体芯片2与载体基板20电连接的工序。用Au丝7将第2半导体芯片2与载体基板20电连接的方法使用超声、热压焊方法。在将Au丝穿过毛细管的状态下，用火花放电使Au丝7的前端熔融，形成球。用毛细管10将所形成的球超声压焊到电极23上，形成第1侧(球侧)8。这时，使包含第2半导体芯片2的载体基板20加热至150～250℃。接着，用毛细管10对Au丝进行环路控制，连接到第2半导体芯片2的电极焊区4上，形成第2侧(新月状物侧)9。
在本发明的实施例中使用了所谓逆向细丝键合法作为实施例，其连接顺序，即第1侧与第2侧与一般广泛使用的细丝键合方法相反。本方法的优点是可将第2半导体芯片2上的Au丝7的高度控制得较低。也有虽然未图示，但预先在电极焊区4上形成Au凸点，将Au丝7的第2侧连接在Au凸点上的方法。例如，节省了在电极焊区的最表面上覆盖Al的工序，使下层的Cu露出，在Cu上直接形成Au凸点，连接Au丝7的第2侧的方法等对于成本而言也是有效的。这里，Au丝7以金(Au)纯度为99.99％以上、直径为15～30μm的范围为主，电极焊区最表面是Al。
图6A示出被树脂密封了的半导体器件的剖面图。在图6A中，将至图5D工序为止结束了的半成品的半导体器件放进树脂密封模具(未图示)中，使之夹在上下模具之间。将热固化性环氧树脂加热至150～200℃，熔融成液态，进而将覆盖了树脂密封型半导体器件的制品部用树脂密封成形。其后经数十秒的固化时间，在密封模具内使树脂固化，从模具中取出。作为用于制品分割的切割方法，例如可将半导体器件的密封树脂侧固定到有粘结性的条带上，或者用真空抽吸固定，借助于使用了刀片等的切割器或激光沿制品分割线28分离。
图6B示出已完成的被树脂密封的半导体器件的剖面图。
图7所特意图示的是为了详细地说明图1的剖面形状。如图7所示，在被夹在第2半导体芯片2与第1半导体芯片1之间的粘结剂14的端部的剖面形状15中，第2半导体芯片2的接点位于第1半导体芯片1的接点的外侧。用于实现该形状的一个方法已如前面的图5C中所述。即，在粘结第1半导体芯片1与第2半导体芯片2的工序中，将粘结剂14的侧部形成为从第1半导体芯片1的端部朝向第2半导体芯片2的超出第1半导体芯片1的侧面的部分倾斜。利用该形状，使之具有桥墩等的逆拱形的结构，可承受细丝键合的荷重。
图8是示出本发明的另一实施例的树脂密封型半导体器件的剖面图。
图8A是使粘结剂14的端部超出第1半导体芯片1的侧面的形状。除了上述的图7的效果外，在细丝键合的荷重施加到第2半导体芯片2的电极焊区4上时，可使以第1半导体芯片1的背面角部为起点对第2半导体芯片2施加弯矩力的情况得到缓冲。
图8B除了图7、图8A的效果外，通过对第1半导体芯片1的背面角部进行倒角，可进一步使以第1半导体芯片1的背面角部为起点对第2半导体芯片2施加弯矩力的情况得到缓冲。
在图8C中，使粘结剂14的端部超出第1半导体芯片1的侧面，使之与存在于第1半导体芯片1的侧面的底层充填树脂13接触。进而通过对第1半导体芯片1的背面角部进行倒角，形成倒角部30，可防止以第1半导体芯片1的背面角部为起点对第2半导体芯片2施加弯矩力。
图9A是本发明的又一实施例的树脂密封型半导体器件的局部剖开的平面图，图9B是剖面图。
如图9所示，在图1的实施例中，无源部件17被电连接到载体基板20的第1半导体芯片1的安装面上，第2半导体芯片2比第1半导体芯片1和无源部件17的配置区域大，并且第2半导体芯片2的背面和与之相向的无源部件17的背面被粘结在一起。另外，其高度与第1半导体芯片1的背面的高度大致相同的衬垫16被粘结到无源部件17的背面上。无源部件17被锡焊到载体基板20的电极上。
本半导体器件的制造工序与图5和图6相同，但在将载体基板20与第1半导体芯片1电连接的工序(图5A)中，将无源部件17与载体基板20电连接。在载体基板20与第1半导体芯片1之间形成底层充填树脂13后，在粘接第1半导体芯片1与第2半导体芯片2的工序(图5C)中，在第2半导体芯片2的背面和与之相向的无源部件17的背面之间，在介入其高度与第1半导体芯片1的背面的高度大致相同的衬垫16的状态下进行粘结。作为衬垫16，使用具有比底层充填树脂13大的触变性的材料。

Claims (10)

1. 一种半导体器件，它包括：具有第1布线电极和第2布线电极的布线基板；在表面上具有与上述第1布线电极连接的电极的第1半导体芯片；安装在上述第1半导体芯片上、在比第1半导体芯片大而在表面的至少是周边上具有用金属细丝与上述第2布线电极电连接的电极的第2半导体芯片，其特征在于：
在用粘结剂粘结上述第1半导体芯片的背面与上述第2半导体芯片的背面的同时，上述粘结剂的侧部从上述第1半导体芯片的端部朝向上述第2半导体芯片的超出第1半导体芯片侧面的部分倾斜，将无源部件与布线基板的第1半导体芯片安装面电连接，第2半导体芯片比第1半导体芯片和上述无源部件的配置区域大，将上述第2半导体芯片的背面和与之相向的上述无源部件的背面粘结在一起。
2. 如权利要求1所述的半导体器件，其特征在于：
粘结剂在第1半导体芯片的沿平面方向的面上的截面积大于上述第1半导体芯片的背面的面积。
3. 如权利要求1所述的半导体器件，其特征在于：
粘结剂的侧部为凹曲面形状。
4. 如权利要求1所述的半导体器件，其特征在于：
粘结剂在第1半导体芯片的背面的整个区域和侧面的一部分上形成。
5. 如权利要求1所述的半导体器件，其特征在于：
在布线基板与第1半导体芯片之间形成底层充填树脂，上述底层充填树脂的侧面的至少一部分被粘结剂覆盖。
6. 如权利要求1所述的半导体器件，其特征在于：
将无源部件与布线基板的第1半导体芯片安装面电连接，第2半导体芯片比第1半导体芯片和上述无源部件的配置区域大，与第1半导体芯片的背面的高度相同的衬垫与上述无源部件的背面粘结在一起、将上述第2半导体芯片的背面和与之相向的上述无源部件的背面在介入上述衬垫的状态下粘结起来。
7. 一种半导体器件的制造方法，包括：准备具有第1布线电极和第2布线电极的布线基板和在表面上具有电极的第1半导体芯片的工序；用凸点将上述布线基板的第1布线电极与上述第1半导体芯片的电极电连接的工序；在比第1半导体芯片大、并在表面的至少是周边上准备具有电极的第2半导体芯片的工序；将与上述第1半导体芯片的电极相反一侧的背面和与上述第2半导体芯片的电极相反一侧的背面用粘结剂粘结在一起的工序；以及用金属细丝连接上述第2半导体芯片的电极与上述布线基板的第2布线电极的工序，其特征在于：
在粘结上述第1半导体芯片与上述第2半导体芯片的工序中，形成上述粘结剂的侧部，以便从上述第1半导体芯片的端部朝向上述第2半导体芯片的超出第1半导体芯片侧面的部分倾斜，将无源部件与布线基板的第1半导体芯片安装面电连接，第2半导体芯片比第1半导体芯片和上述无源部件的配置区域大，将上述第2半导体芯片的背面和与之相向的上述无源部件的背面粘结在一起。
8. 如权利要求7所述的半导体器件的制造方法，其特征在于：
在用金属细丝连接第2半导体芯片与布线基板的工序中，在上述布线基板的第2布线电极上形成将上述金属细丝的前端熔融了的球后，将上述金属细丝连接在上述第2半导体芯片的电极上。
9. 如权利要求7所述的半导体器件的制造方法，其特征在于：
在电连接布线基板与第1半导体芯片的工序中，在电连接上述布线基板与无源部件、粘接上述第1半导体芯片与第2半导体芯片的工序中，在上述第2半导体芯片的背面和与之相向的上述无源部件的背面之间，在介入与上述第1半导体芯片的背面的高度相同的衬垫的状态下粘结起来。
10. 如权利要求7所述的半导体器件的制造方法，其特征在于：
在电连接布线基板与第1半导体芯片的工序中，在电连接上述布线基板与无源部件、而且在上述布线基板与上述第1半导体芯片之间形成底层充填树脂，粘接上述第1半导体芯片与第2半导体芯片的工序中，在上述第2半导体芯片的背面和与之相向的上述无源部件的背面之间，在介入与上述第1半导体芯片的背面的高度相同的衬垫的状态下粘结起来，而且采用了具有比上述底层充填树脂大的触变性的材料作为上述衬垫。
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