ATE450892T1 - Verbesserung der elektronen- und lochmobilitäten bei 110-unter-biaxial-kompressionsverspannung - Google Patents
Verbesserung der elektronen- und lochmobilitäten bei 110-unter-biaxial-kompressionsverspannungInfo
- Publication number
- ATE450892T1 ATE450892T1 AT04822326T AT04822326T ATE450892T1 AT E450892 T1 ATE450892 T1 AT E450892T1 AT 04822326 T AT04822326 T AT 04822326T AT 04822326 T AT04822326 T AT 04822326T AT E450892 T1 ATE450892 T1 AT E450892T1
- Authority
- AT
- Austria
- Prior art keywords
- present
- biaxial
- hole mobilities
- compression stress
- semiconductor material
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/792—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising applied insulating layers, e.g. stress liners
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/795—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in lateral device isolation regions, e.g. STI
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
- H10D62/405—Orientations of crystalline planes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
- H10F30/222—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN heterojunction
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
Landscapes
- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
- Element Separation (AREA)
- Formation Of Insulating Films (AREA)
- Chemical Vapour Deposition (AREA)
- Recrystallisation Techniques (AREA)
- Luminescent Compositions (AREA)
- Photoreceptors In Electrophotography (AREA)
- Polymers With Sulfur, Phosphorus Or Metals In The Main Chain (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US53491604P | 2004-01-07 | 2004-01-07 | |
US10/980,220 US7161169B2 (en) | 2004-01-07 | 2004-11-03 | Enhancement of electron and hole mobilities in <110> Si under biaxial compressive strain |
PCT/US2004/042179 WO2006057645A2 (en) | 2004-01-07 | 2004-12-15 | Enhancement of electron and hole mobilities in 110 under biaxial compressive strain |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE450892T1 true ATE450892T1 (de) | 2009-12-15 |
Family
ID=34713837
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT04822326T ATE450892T1 (de) | 2004-01-07 | 2004-12-15 | Verbesserung der elektronen- und lochmobilitäten bei 110-unter-biaxial-kompressionsverspannung |
Country Status (8)
Country | Link |
---|---|
US (5) | US7161169B2 (de) |
EP (1) | EP1702365B1 (de) |
JP (1) | JP5190201B2 (de) |
KR (1) | KR100961751B1 (de) |
AT (1) | ATE450892T1 (de) |
DE (1) | DE602004024448D1 (de) |
TW (1) | TWI430329B (de) |
WO (1) | WO2006057645A2 (de) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7217949B2 (en) * | 2004-07-01 | 2007-05-15 | International Business Machines Corporation | Strained Si MOSFET on tensile-strained SiGe-on-insulator (SGOI) |
US7271043B2 (en) * | 2005-01-18 | 2007-09-18 | International Business Machines Corporation | Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels |
US8729635B2 (en) * | 2006-01-18 | 2014-05-20 | Macronix International Co., Ltd. | Semiconductor device having a high stress material layer |
US7572712B2 (en) | 2006-11-21 | 2009-08-11 | Chartered Semiconductor Manufacturing, Ltd. | Method to form selective strained Si using lateral epitaxy |
US7524740B1 (en) | 2008-04-24 | 2009-04-28 | International Business Machines Corporation | Localized strain relaxation for strained Si directly on insulator |
JP4875115B2 (ja) * | 2009-03-05 | 2012-02-15 | 株式会社東芝 | 半導体素子及び半導体装置 |
FR2966285B1 (fr) * | 2010-10-14 | 2013-09-06 | St Microelectronics Crolles 2 | Procédé de formation de circuits intégrés sur substrat semi conducteur contraint |
US9855595B2 (en) | 2010-12-22 | 2018-01-02 | International Business Machines Corporation | Solid sorption refrigeration |
US20130050180A1 (en) | 2011-08-30 | 2013-02-28 | 5D Robotics, Inc. | Graphical Rendition of Multi-Modal Data |
US8895381B1 (en) * | 2013-08-15 | 2014-11-25 | International Business Machines Corporation | Method of co-integration of strained-Si and relaxed Si or strained SiGe FETs on insulator with planar and non-planar architectures |
CN110838435B (zh) * | 2019-10-14 | 2023-01-31 | 宁波大学 | 一种外延层转移方法 |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5317069A (en) * | 1976-07-30 | 1978-02-16 | Fujitsu Ltd | Semiconductor device and its production |
JPH10107380A (ja) * | 1996-09-30 | 1998-04-24 | Toshiba Corp | 積層体のへき開方法 |
JP3676910B2 (ja) * | 1997-07-30 | 2005-07-27 | インターナショナル・ビジネス・マシーンズ・コーポレーション | 半導体装置及び半導体アイランドの形成方法 |
US20010020723A1 (en) * | 1998-07-07 | 2001-09-13 | Mark I. Gardner | Transistor having a transition metal oxide gate dielectric and method of making same |
JP4476390B2 (ja) * | 1998-09-04 | 2010-06-09 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
JP4521542B2 (ja) * | 1999-03-30 | 2010-08-11 | ルネサスエレクトロニクス株式会社 | 半導体装置および半導体基板 |
KR100767950B1 (ko) * | 2000-11-22 | 2007-10-18 | 가부시키가이샤 히타치세이사쿠쇼 | 반도체 장치 및 그 제조 방법 |
US6686300B2 (en) * | 2000-12-27 | 2004-02-03 | Texas Instruments Incorporated | Sub-critical-dimension integrated circuit features |
US6531739B2 (en) * | 2001-04-05 | 2003-03-11 | Peregrine Semiconductor Corporation | Radiation-hardened silicon-on-insulator CMOS device, and method of making the same |
JP2003017668A (ja) * | 2001-06-29 | 2003-01-17 | Canon Inc | 部材の分離方法及び分離装置 |
JP3782021B2 (ja) * | 2002-02-22 | 2006-06-07 | 株式会社東芝 | 半導体装置、半導体装置の製造方法、半導体基板の製造方法 |
AU2003237473A1 (en) * | 2002-06-07 | 2003-12-22 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US20030227057A1 (en) | 2002-06-07 | 2003-12-11 | Lochtefeld Anthony J. | Strained-semiconductor-on-insulator device structures |
EP1396883A3 (de) * | 2002-09-04 | 2005-11-30 | Canon Kabushiki Kaisha | Substrat und Herstellungsverfahren dafür |
AU2003264642B2 (en) * | 2002-12-02 | 2009-08-06 | Tadahiro Ohmi | Semiconductor Device and Method of Manufacturing the Same |
US7115480B2 (en) * | 2003-05-07 | 2006-10-03 | Micron Technology, Inc. | Micromechanical strained semiconductor by wafer bonding |
US20040222090A1 (en) * | 2003-05-07 | 2004-11-11 | Tim Scott | Carbon fiber and copper support for physical vapor deposition target assemblies |
FR2859312B1 (fr) * | 2003-09-02 | 2006-02-17 | Soitec Silicon On Insulator | Scellement metallique multifonction |
US7354815B2 (en) * | 2003-11-18 | 2008-04-08 | Silicon Genesis Corporation | Method for fabricating semiconductor devices using strained silicon bearing material |
JP4349151B2 (ja) * | 2004-02-26 | 2009-10-21 | トヨタ自動車株式会社 | 接触状態取得装置 |
-
2004
- 2004-11-03 US US10/980,220 patent/US7161169B2/en not_active Expired - Fee Related
- 2004-12-15 AT AT04822326T patent/ATE450892T1/de not_active IP Right Cessation
- 2004-12-15 WO PCT/US2004/042179 patent/WO2006057645A2/en active Application Filing
- 2004-12-15 EP EP04822326A patent/EP1702365B1/de not_active Expired - Lifetime
- 2004-12-15 DE DE602004024448T patent/DE602004024448D1/de not_active Expired - Lifetime
- 2004-12-15 KR KR1020067013491A patent/KR100961751B1/ko not_active IP Right Cessation
- 2004-12-15 JP JP2006549292A patent/JP5190201B2/ja not_active Expired - Fee Related
-
2005
- 2005-01-03 TW TW094100053A patent/TWI430329B/zh not_active IP Right Cessation
-
2006
- 2006-12-18 US US11/612,309 patent/US7314790B2/en not_active Expired - Fee Related
-
2007
- 2007-10-25 US US11/924,024 patent/US7462525B2/en not_active Expired - Lifetime
- 2007-10-25 US US11/924,015 patent/US20080044987A1/en not_active Abandoned
-
2008
- 2008-05-06 US US12/115,731 patent/US7943486B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
WO2006057645A8 (en) | 2006-08-03 |
JP5190201B2 (ja) | 2013-04-24 |
WO2006057645A3 (en) | 2006-11-30 |
JP2007527113A (ja) | 2007-09-20 |
EP1702365A2 (de) | 2006-09-20 |
WO2006057645A2 (en) | 2006-06-01 |
TWI430329B (zh) | 2014-03-11 |
TW200616021A (en) | 2006-05-16 |
US20080044966A1 (en) | 2008-02-21 |
US7314790B2 (en) | 2008-01-01 |
US20050145837A1 (en) | 2005-07-07 |
DE602004024448D1 (de) | 2010-01-14 |
US7462525B2 (en) | 2008-12-09 |
US7943486B2 (en) | 2011-05-17 |
US20070099367A1 (en) | 2007-05-03 |
EP1702365B1 (de) | 2009-12-02 |
US20080044987A1 (en) | 2008-02-21 |
US7161169B2 (en) | 2007-01-09 |
US20080206958A1 (en) | 2008-08-28 |
KR100961751B1 (ko) | 2010-06-07 |
KR20060127021A (ko) | 2006-12-11 |
WO2006057645A9 (en) | 2006-09-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |