system-on-chip
Here are 74 public repositories matching this topic...
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
-
Updated
Aug 25, 2024 - VHDL
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
-
Updated
Aug 15, 2024 - Python
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
-
Updated
Aug 18, 2024 - C
💻 A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
-
Updated
Nov 23, 2021 - VHDL
A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.
-
Updated
Mar 5, 2021
The Antikernel operating system project
-
Updated
Apr 23, 2020 - Verilog
Basic RISC-V Test SoC
-
Updated
Apr 7, 2019 - Verilog
Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals
-
Updated
Jul 26, 2024 - HTML
A Modeling and Verification Platform for SoCs using ILAs
-
Updated
Jul 3, 2024 - C++
System on Chip toolkit for Amaranth HDL
-
Updated
Jul 23, 2024 - Python
Development platform for the Espressif ESP32 WiFi/Microcontroller SoC
-
Updated
Mar 18, 2023
QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
-
Updated
Apr 30, 2024 - Assembly
A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
-
Updated
Jul 3, 2024 - SystemVerilog
Small Processing Unit 32: A compact RV32I CPU written in Verilog
-
Updated
May 30, 2022 - C
A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
-
Updated
Oct 27, 2022 - Verilog
VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
-
Updated
Jan 4, 2022 - Verilog
Improve this page
Add a description, image, and links to the system-on-chip topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with the system-on-chip topic, visit your repo's landing page and select "manage topics."