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Chap-05a Control Unit Operations

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33 views17 pages

Chap-05a Control Unit Operations

Uploaded by

harshvardhan96yahoo
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
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Chapter 05

CONTROL UNIT
Agenda
Control Unit operation:
• Introduction,
• Micro-operations,
• Control of the Processor,
• Hardwired implementation
Introduction
• Functions of a processor-
1. Operations (opcodes)
2. Addressing modes
3. Registers
4. I/O module interface
5. Memory module interface
6. Interrupts
MICRO-OPERATIONS
• In case of execution of program, consists of a sequence of instruction cycles, with one
machine instruction per cycle.
• Written sequence of instructions is different than execution time sequence of instructions.
• Each instruction cycle is made up of a number of smaller units. One subdivision that we
found convenient is fetch, indirect, execute, and interrupt, with only fetch and execute
cycles always occurring.
• Micro-operation- each of the smaller cycles involves a series of steps, each of which
involves the processor registers.
• The execution of a program consists of the sequential execution of instructions. Each
instruction is executed during an instruction cycle made up of shorter subcycles (e.g.,
fetch, indirect, execute, interrupt).The execution of each subcycle involves one or more
shorter operations, that is, micro-operations.
MICRO-OPERATIONS
MICRO-OPERATIONS
• The Fetch Cycle- occurs at the beginning of each instruction cycle and causes an
instruction to be fetched from memory.

1. Memory address register (MAR): Is connected to the address lines of the system bus.
It specifies the address in memory for a read or write operation.

2. Memory buffer register (MBR): Is connected to the data lines of the system bus. It
contains the value to be stored in memory or the last value read from memory.

3. Program counter (PC): Holds the address of the next instruction to be fetched.

4. Instruction register (IR): Holds the last instruction fetched.


MICRO-OPERATIONS
MICRO-OPERATIONS

The Indirect Cycle-


• Once an instruction is fetched, the next step is to fetch source operands.
• If the instruction specifies an indirect address, then an indirect cycle must precede the
execute cycle.
• The address field of the instruction is transferred to the MAR. This is then used to fetch
the address of the operand.
• Finally, the address field of the IR is updated from the MBR, so that it now contains a
direct rather than an indirect address
MICRO-OPERATIONS

The Interrupt Cycle-


• At the completion of the execute cycle, a test is made to determine whether any enabled
interrupts have occurred
• In the first step, the contents of the PC are transferred to the MBR, so that they can be
saved for return from the interrupt.
• Then the MAR is loaded with the address at which the contents of the PC are to be
saved, and the PC is loaded with the address of the start of the interrupt-processing
routine.
• Due to multiple types of Interruptand its level, micro-operations obtain the
Save_Address and the Routine_Address before they can be transferred to the MAR and
PC, respectively.
MICRO-OPERATIONS
The Execute Cycle-
• The fetch, indirect, and interrupt cycles are simple and predictable.
• Each involves a small, fixed sequence of micro-operations and, in each case, the same
micro-operations are repeated each time around.
MICRO-OPERATIONS
The Instruction Cycle-
• each phase of the instruction cycle can be decomposed into a sequence of elementary
micro-operations
• Let us assume a new 2-bit register called the instruction cycle code (ICC).The ICC
designates the state of the processor in terms of which portion of the cycle it is in:
00: Fetch
01: Indirect
10: Execute
11: Interrupt
• At the end of each of the four cycles, the ICC is set appropriately. The indirect cycle is
always followed by the execute cycle.
• The interrupt cycle is always followed by the fetch cycle. For both the fetch and execute
cycles, the next cycle depends on the state of the system.
MICRO-OPERATIONS
The Instruction Cycle-
00: Fetch
01: Indirect
10: Execute
11: Interrupt
Control of the Processor
Functional Requirements-
• those functions that the control unit must perform. A definition of these functional
requirements is the basis for the design and implementation of the control unit.
• The behaviour or functioning of the processor into elementary operations, called micro-
operations.
• By reducing the operation of the processor to its most fundamental level, we are able to
define exactly what it is that the control unit must cause to happen.
• Three-step process leads to a characterization of the control unit:
1. Define the basic elements of the processor.
2. Describe the micro-operations that the processor performs.
3. Determine the functions that the control unit must perform to cause the micro-
operations to be performed.
Control of the Processor
Basic functional elements of the processor-
1. ALU
2. Registers
3. Internal data paths
4. External data paths
5. Control unit
• The execution of a program consists of operations involving these processor elements.
• all micro-operations fall into one of the following categories:
1. Transfer data from one register to another.
2. Transfer data from a register to an external interface (e.g., system bus).
3. Transfer data from an external interface to a register.
4. Perform an arithmetic or logic operation, using registers for input and output.
Control of the Processor
The control unit performs two basic tasks:
• Sequencing: The control unit causes the processor to step through a series of micro-
operations in the proper sequence, based on the program being executed.
• Execution: The control unit causes each micro-operation to be performed.
• The inputs are-
Clock, Instruction register,
Flags, Control signals from
control bus
• The outrputs are-
Control signals within Processor
Control signals to control bus
Hardwired implementation-
• In a hardwired implementation, the control unit is essentially a state machine circuit.
• Its input logic signals are transformed into a set of output logic signals, which are the
control signals
Control Unit Inputs-
• The key inputs are the instruction register, the clock, flags, and control bus signals
• Instruction register- The control unit makes use of the opcode and will perform different
actions for different instructions. This function can be performed by a decoder, which
takes an encoded input and produces a single output.
• In general, a decoder will have n binary inputs and 2^n binary outputs. Each of the 2^n
different input patterns will activate a single unique output.
• The clock portion of the control unit issues a repetitive sequence of pulses. This is
useful for measuring the duration of micro-operations
Hardwired implementation-
• Control Unit Inputs-
The key inputs are the
instruction register, the
clock, flags, and control
bus signals
Control Unit Logic-
Internal logic of the
control unit that
produces output control
signals as a function of
its input signals.
For each control signal,
to derive a Boolean
expression of that signal
as a function of inputs

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