Field Effect Transistors (FET)

Presented By : Presented To :

Arif Istiaq Nursadul Mamun Sir

Roll: 1508010 Lecturer, ETE, CUET

Department of Electronics and Telecommunication Engineering

Chittagong University of Engineering and Technology
Contents :
• Introduction
• FET

• Basic Information

• Composition

• Terminals

• Effect of gate voltage on current

• Effect of source/drain voltage on channel

• Advantages and disadvantages of FET

• Types of FET

• Discussion on various types of FETs

• Examples and working principles of various types of FETs

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FET :
• Known as Field-Effect Transistor.
• Uses an electric field to control the behavior of the device.
• Uses single carrier operation (Also known as unipolar transistor).

Figure 01 : A FET

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Basic Information about FETs :

• FETs utilize single carrier operation.

• Either as majority-charge-carrier device or minority-charge-carrier device.
• Device consists of an active channel through which charge carriers, electrons or holes flow.
• Has 3 terminals known as Source, Drain and Gate.

Figure 02 : Symbols of a FET

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Composition :
FETs are constructed from various types of semiconductors. Mostly silicon.

Figure 03 : Construction of a FET

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Terminals of FET :
• Source (S), through which the carriers enter the channel. Conventionally, current entering the channel at S
is designated by IS.

• Drain (D), through which the carriers leave the channel. Conventionally, current entering the channel at D
is designated by ID. Drain-to-source voltage is VDS.

• Gate (G), the terminal that modulates the channel conductivity. By applying voltage to G, one can control I D.

Source and drain terminal conductors are connected to the semiconductor through ohmic contacts.

The conductivity of the channel is a function of the potential applied across the gate and source terminals.

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Effect of gate voltage on current :

• FET controls the electron flow from source to drain.

• It does this by affecting the size and shape of a "conductive channel" created and influenced by voltage
(or lack of voltage) applied across the gate and source terminals.

• This conductive channel is the "stream" through which electrons flow from source to drain.

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Effect of source/drain voltage on channel :

• If drain-to-source voltage is increased, this creates a significant asymmetrical change in the shape of the channel
due to a gradient of voltage potential from source to drain.

• The shape of the inversion region becomes "pinched-off" near the drain end of the channel.

• If drain-to-source voltage is increased further, the pinch-off point of the channel begins to move away from the
drain towards the source. 

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Advantages :
• FET provides high degree of isolation between control and flow because it has a high gate to main current
resistance.

• Is used in noise-sensitive electronics because It produces less noise than a typical BJT.

• Immune to radiation.

• Works as a voltage chopper.

• Has a better thermal stability than BJTs.

• Allows low power switching and miniaturization of circuits.

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Disadvantages :
• Has a relatively low gain-bandwidth product compared to a BJT.

• MOSFETs are very susceptible to overload voltages.

• Vulnerable to electrostatic damage.

• High voltage FETs have a relatively high “on” resistance and hence conduction losses.

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Types of FET :
FETs can be categorized by doping. They can also be distinguished by the method of insulation between channels
and gate.

Main types of FET include :

• JFET

• MOSFET

• MESFET

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JFET :
• Junction gate field-effect transistor.

• Electronically controlled switches.

• Voltage controlled resistors.

• Amplifiers.

Figure 04 : Construction of a JFET

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Construction of a JFET :
• Has 3 terminals.

• Has a major n-type region.

• Embedded layers of p-type region.

• Terminals connected through ohmic contacts.

Figure 05 : JFET

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Characteristics of JFET :

The configuration will be looked upon at two conditions.

1. When Vgs = 0V & Vds of positive value :

Current will pass from drain to source and will increase

with the increase in Vds by Ohm’s law.

Figure 6 : Effect of Vds

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 Figure 7 : Determination of Idss

Idss is found to be the maximum current that can flow from drain to source.

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2. When Vds is increased :

The depletion layers starts to widen. Up to a point

Vp is reached when current flow stops.

This voltage is known as pinch-off voltage.

Figure 8 : Pinch-off voltage

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3. When Vgs < 0 V :

As a negative Vgs is established in the circuit,

the JFET reaches it’s saturation current at a
much lower Vds.

This happens due to negative or reverse bias at the gate.

Figure 09 : Vgs applied in a FET

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 Figure 10 : Idss for various values of Vgs

Idss reaches saturation for lower values of Vds ag Vgs is increased.

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MOSFET :
• Metal-Oxide-Semiconductor Field Effect Transistor.

• Insulated gates.

• Can change conductivity with the amount of input voltage.

• Can work as amplifiers and switches.

Figure 11 : Construction of a MOSFET

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Symbols of MOSFET :

Figure 12 : Symbols of MOSFETs

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Depletion type MOSFET :
• A slab of p-type material known as substrate.

• Additional Terminal, known as SS.

• The source and drain terminals are connected through

metallic contacts to n-type doped regions.

• The gate is connected to a metal contact surface.

Figure 13 : Construction of a MOSFET

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Depletion type MOSFET :
• Gate remains insulated from the n-channel by a very
thin silicon-di-oxide (SiO2) layer.

• No direct electrical connection between the gate

terminal and the channel of the MOSFET.

• Silicon-di-oxide poses a desirable high impedance

of the device.

Figure 14 : Construction of a MOSFET

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Characteristics of MOSFET :

The configuration will be looked upon at two conditions.

1. When Vgs = 0V & Vds of positive value :

• Free electrons in the n-channel start to flow

due to +Ve at the drain.

• Current similar to JFET starts flowing.

Figure 15 : Working principle of MOSFET

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Figure 16 : Transfer characteristics curve of a MOSFET

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2. When Vgs = -1 V :

• Negative potential at the gate.

• Lower number of free electrons in the n-channel.

• Holes are attracted from the p-region.

• Recombination of holes and electrons occur.

Figure 17 : Effect of a negative Vgs.

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2. When Vgs = +1 V :

• Positive potential at the gate.

• Higher number of free electrons in the n-channel.

• Holes are repulsed to the p-region.

• Higher values of Idss is found.

Vgs = +Ve region is known as Enhancement region.

Vgs = -Ve region is known as Depletion region.

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Enhancement type MOSFET :
• Remains insulated from the n-channel by a very
thin silicon-di-oxide (SiO2) layer.

• No direct electrical connection between the gate

terminal and the substrate of the MOSFET.

• Silicon-di-oxide poses a desirable high impedance

of the device.

• No n-type or p-type channel between Drain and

source.

Figure 18 : Enhancement type MOSFET

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1. When Vgs = 0 V, Vds = +Ve :

No current will flow due to the absence of a n-type or p-type channel.

Id = Idss would be almost zero.

There would not be a large number of carriers between the source and the drain.

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2. When Vgs = +Ve, Vds = +Ve :

• Gate and drain are positive with respect to source.

• Gate will pressure the holes towards p-type substrate.

• Electrons from the p-type substrate gets attracted to

the gate and accumulates near the gate region.

• Concentration of electrons near the SiO2 increase with

the increase of Vgs until it allows measurable current
flow between Drain and Source.

Figure 19 : Enhancement region.

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 2. When Vgs = +Ve, Vds = +Ve :

• Produces a n-channel near SiO2

• Level of Vgs that results in significant increase in

drain current is called the threshold voltage and
is given by the symbol Vt.

• The channel in non-existent with Vgs = 0 V and

“Enhanced” by the application of a positive
gate-to-source voltage.

This type of MOSFET is known as a Enhancement type MOSFET.

Figure 19 : Enhancement region.

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3. When Vgs = Constant, Vds = Increasing :

• Holding Vgs constant and increasing the level of Vds.

• The drain current will eventually reach a saturation

level.

• The leveling off of Id is due to pinching-off process

depicted by the narrower channel at the drain end.

Figure 20 : Pinch-off due to increase in Vds.

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Special types of MOSFETs :
Two types of special MOSFETs would be discussed.

1. VMOS and UMOS

2. CMOS

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VMOS and UMOS :

Figure 21 : VMOS and UMOS.

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Advantages of VMOS/UMOS :

• Higher power handling capabilities.

• Higher current levels through the components.

• Fast switching speeds.

• Better load handling than most other Bipolar Junction Transistors.

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Power MOSFET :

• Very narrow p-type region.

• Easy induction of electrons through p-type

region.

• Reduced resistance levels.

• Lower power dissipations.

• Very big channel regions due to vertical

construction.

Figure 22 : VMOS .

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CMOS :

• Complementary MOSFET

• A very effective logic circuit.

• Dual channel MOSFET on a single substrate.

• High input resistance

• Lower operating power level

• Fast switching speeds

• Heavily used in computer logic circuits.

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 Figure 23 : CMOS .

CMOS is a logical inverter. As it’s output it high when input is low, and output is low when input is high.

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CMOS Logic Inversion :

Figure 24 : CMOS logic inversion.

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MESFET :
• Metal Semiconductor Field Effect Transistor.

• Uses GaAs as substrate.

• Used in high speed devices.

• Uses shcottky barriers.

Figure 25 : MESFET schematic.

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MESFET :
• Schottky barriers as insulator between the gate
and the channel.

• No insulating layer means a lesser distance

between the channel and the gate.

• Lower stray capacitance.

• Reduced sensitivity to high frequencies.

Figure 26 : Basic MESFET construction.

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Operation :
• +Ve at gate attracts electrons in the channel, increasing
the overall Id.

• -Ve at the gate repels electrons out of the channel and

on to the metal surface, reducing the overall Id.

Figure 27 : Id for different Vds.

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Any Questions???

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 Possible Questions :

1. Define the characteristics of FETs ?

2. Effect of gate and source/drain voltage on FETs ?
3. How does an JFET operate?
4. Define types of MOSFET and their working procedures ?
5. How does a CMOS act as an inverter ?
6. How do MESFETs work ?

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