Field Effect Transistor

Introduction
 The Field Effect Transistor (FET) is a
semiconductor device in which the output current
is controlled by an electric field
 Mainly one type of carriers (majority carriers)
contributes to the current of the device, FET is
called as a UNIPOLAR device
 FETs are classified as :

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Junction Field Effect Transistor (JFET)
 It consists of a lightly doped semiconductor bar called the
channel.
 On both sides of the channel p-n junctions are formed with
heavily doped impurities opposite to that of the channel.
 Two terminals come out of the ohmic contacts at the two
ends of the bar. They are Source (S) and Drain (D).
 The terminal through which the majority carriers enter the
channel region is called the Source (S).
 The terminal through which the majority carriers leave the
channel region is called the Drain (D).
 Another terminal comes out of the ohmic contact on the
heavily doped side of the device. This terminal is Gate (G).
 Gate (G) controls the device current and hence the name.
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Structure and Circuit Symbol of JFET
 The arrow on the gate terminal in the circuit
symbol of JFET refers to the direction of the gate
current under forward biased gate-source junction.

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Some Important Properties of JFET
 The gate-source junction is always kept reverse
biased. Hence resistance between gate and source
terminal is very high (10MΩ). So it can be used as a
high input impedance device in common source
operation.
 As the current through the channel is drift current,
hence it can operate faster.
 The current through the channel is controlled by
modulating the width of the channel by changing
gate-source voltage (VGS) and drain-source voltage
(VDS) in common source mode.

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 Principle of Operation of JFET
Effect of VGS on Channel Width
 Consider an n-channel JFET with
the gate-source junction reverse
biased by a variable voltage
source VGS and Drain terminal is
kept open.
 VGS at the gate terminal sets up
electric field which controls the
channel width and drain current.
 Depletion layer extends towards
the middle and channel width
decreases with reverse gate-
source voltage VGS .

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 Principle of Operation of JFET
Effect of VDS on Channel Width
 Now Drain terminal is kept at higher
potential with respect to Source by a
voltage VDS and gate-source junction
kept reverse biased with constant VGS .
 VDS attract electrons from source
through channel to drain producing
conventional drain current ID, causing
reverse biasing of the p-n junction.
 The reverse bias increases with
distance form the source towards the
drain, so channel width decreases
with distance from the source
towards the drain.
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 Pinch Off
 For VGS = 0, at a certain minimum value
of VDS, the channel just pinches off.
 Drain current does not increase further
with increase of VDS.
 For higher VGS, Pinch-off occurs at lower
VDS due to combined effect of VGS & VDS.
 With open drain condition, at a certain
minimum value of VGS the channel is
just closed. This is pinch off condition.
 Pinch off voltage is VP = | – VGS|.
 Electrons are swept through the
depletion region at pinched off site
and energized by drain voltage.
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 V-I Characteristics of JFET
 Drain characteristics show the variation of ID with VDS at a
certain value of VGS.
 In drain characteristic curve as VDS increases from 0 V, ID
increases heavily in a linear manner initially. For different
VGS, slopes of different curves are different. This region of the
characteristics is called the Linear Region or Ohmic Region.
 After the linear region, for a constant VGS, ID remains constant
with further increase of VDS. This region is called the
Saturation Region. In this region ID is controlled by VGS.
 Transfer characteristic shows the variation of ID with VGS at
a certain value of VDS.
 At VGS = 0, ID is high. As magnitude of VGS increases ID
decreases and becomes zero at a certain VGS .

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V-I Characteristics of JFET

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 Characteristic Parameters of JFET
 The drain resistance (rd) of a JFET is defined as the change
in drain-source voltage per unit change in drain current
while gate-source voltage is kept constant.
 rd = ΔVDS / ΔID for constant VGS.
 The trans-conductance (gm) of a JFET is defined as the
change in drain current per unit change in gate-source
voltage while drain-source voltage is kept constant.
 gm = ΔID / ΔVGS for constant VDS.
 The amplification factor (μ) of a JFET is defined as the ratio
of the change in drain-source voltage to the change in gate-
source voltage to keep drain current constant.
 μ = ΔVDS / ΔVGS for constant ID.
 μ = gm ⨯ rd.
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 MOSFET
 Metal Oxide Semiconductor Field Effect Transistor
(MOSFET) is another type of FET.
 In MOSFET, the gate terminal comes out of a metal layer. This
layer is insulated from the main semiconductor channel by a
layer of insulator coating.
 Device current is controlled by electric field.
 Hence it is generally known as Insulated Gate Field Effect
Transistor (IGFET).
 According to fabrication and mode of operation, MOSFET is
classified in two groups –
1. Depletion Type MOSFET
2. Enhancement Type MOSFET

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 Depletion Type MOSFET
 An n-channel depletion type
MOSFET consists of a slab of p-type
semiconductor (known as Bulk or
Substrate) on which two n-regions of
heavy doping are made. They are
connected through an n-channel.
These two heavily doped regions are
Drain and Source.
 The gate terminal is insulated from
the channel by an insulating layer of
silicon di-oxide (SiO2).
 This insulation makes the gate
current is practically zero and the
input impedance becomes very high
(1014 MΩ). 13
 Depletion Type MOSFET
 If VGS = 0, it has no effect on the channel and application of
positive VDS makes a current flow through the channel from
drain to source.
 If VGS < 0, the negative voltage at the gate terminal polarizes
the insulating material.
 The negative polarization charge
induced on the insulating layer
near the channel repels the
electrons in the channel and the
electrons are forced to move away
towards the bulk resulting in
formation of depleted region near
the insulating layer and decrease
in the effective channel width.
Hence the name. 14
 Depletion Type MOSFET
 Voltage drop due to current through the channel increases
with distance form the source towards the drain. Hence,
channel width decreases with distance from the source
towards the Drain. At a certain value of VDS for VGS = 0, the
channel just pinches off.
 This value of VDS is
called the Pinch-off
Voltage (VP).
 Drain current does
not increase further
with increase of VDS.
 It has similar kind of
I-V characteristics to
that of JFET.
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 Enhancement Type MOSFET
 An n-channel enhancement type
MOSFET consists of a slab of p-type
semiconductor (known as Bulk or
Substrate) on which two n-regions of
heavy doping are made. They are
Drain and Source.
 The gate terminal is insulated from
the channel by an insulating layer of
silicon di-oxide (SiO2).
 There is no pre-doped channel
between drain and source.
 If VGS ≤ 0, there is no channel between
the drain and source. Hence no
current will flow, ID = 0.
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 Enhancement Type MOSFET
 If VGS > 0, then due to the positive voltage at the gate
terminal, the insulating material is polarized.
 The positive polarization charge
on the insulating layer near the
channel attracts the electrons
towards the insulating layer and
repels the holes away. Initially
depletion takes place in the
layer adjacent to the insulation.
 At higher VGS, accumulation of
electrons in the layer adjacent to
the insulating layer increases.
 At intermediate state, the region between source and drain
behaves as intrinsic semiconductor (p decreases to pi and n
increases to ni).
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 Enhancement Type MOSFET
 Finally at a certain VGS, the
number density of accumulated
electrons increases and
becomes equal to the initial
density of the holes of the
substrate. This is called good
inversion.
 An n-channel is formed or
induced or enhanced between
drain & source. Hence the name
is enhancement MOSFET.
 The minimum value of to cause good inversion is called
Threshold Voltage (VT).

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 Enhancement Type MOSFET
 The drain characteristic curves of enhancement type
MOSFET are similar to that of JFET.
 At VGS = VT, ID is appreciable.
 Higher is VGS, higher is ID. ID is controlled by VGS.

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 Uses of FET
 In linear region, JFET is used as voltage dependent
resistance (VDR) or voltage controlled resistor (VCR).
 In saturation region, JFET is used as voltage controlled
constant current source.
 JFET is also used in chopper amplifier, buffer amplifier,
multiplexer, etc.
 MOSFET is used as voltage controlled resistor in
ohmic region.
 MOSFET is used as signal amplifier in saturation
region.
 MOSFET is used widely used in digital IC as switch by
sweeping between saturation and cut-off regions.
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