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The 8051 Microcontroller: (Please Ignore Repeated Slides If Any. Also, Refer Text Too While Studying All The Slides)

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The 8051 Microcontroller

(please ignore repeated slides if any.


Also,Refer text too while studying all the slides)
Portions included in this slide
1)8051 – Introduction,Defn,comparison with
mp,advantages,applications
2)Features and Block Diagram of 8051
3)Architecture of 8051
4)Pin diagram of 8051 and important pins
5) I/O ports-pins and port structure
6)addressing modes of 8051
7)Instruction set of 8051
Definition

A microcontroller is a small computer on a single integrated circuit


containing a processor core, memory, and programmable input/output
peripherals.

Microprocessor is an IC which has only the CPU inside them.


Differences – Microcontrollers & Microprocessors

Microcontroller Microprocessor

1) Microcontroller has a CPU,RAM, ROM , 1) an IC that has only CPU inside it.
other peripherals all embedded in it, No RAM,ROM,other peripherals inside it.
on a single chip.

2) Cheaper 2)expensive

3) Space effective 3)bulkier since it should have additional


RAM,ROM,peripherals

4) few op- codes, more bit handling Instructions 4)more op-codes, few bit handling instructions

5) Can be used standalone 5)Cannot be used standalone

6) Less processing powers. 6) High processing powers.

7) Used for embedded applications. 7)Used for laptops,desktop PCs etc.

8) Ex: 8051 microcontroller, 8) Ex: intel chip 8086


chip used for microwave oven
Advantages of Microcontrollers.

1) Microcontroller has a CPU,RAM, ROM , other peripherals all embedded in it,


on a single chip.

2) Cheaper
3) Space effective since it does not require extra RAM,ROM,peripherals

4) few op- codes, more bit handling Instructions

5) Can be used standalone

7) Used for embedded applications. etc.

8) Ex: chip used for microwave oven, washing machines,


Applications of microcontrollers
• Used in specific applications where the relationship of input and output is
defined.
• Depending on the input, some processing needs to be done and output is
delivered.
• For example, keyboards, mouse, washing machine, digicam, pendrive,
remote, microwave, cars, bikes, telephone, mobiles, watches, etc.
• Embedded applications.
• Since the applications are very specific, they need small resources like RAM,
ROM, I/O ports etc and hence can be embedded on a single chip. This in
turn reduces the size and the cost.
8051 Basic Features
• 4K bytes internal ROM
• 128 bytes internal RAM
• Four 8-bit I/O ports (P0 - P3).
• Two 16-bit timers/counters
• One serial interface

CPU RAM ROM


A single chip
I/O Serial Microcontroller
Timer COM
Port Port
8051 Basic Features
(Draw simple block diagram also)
8051 Basic Features
• only 1 On chip oscillator (external crystal)
• 6 interrupt sources (2 external , 3 internal, Reset)
• 64K external code (program) memory(only read)PSEN
• 64K external data memory(can be read and write) by RD,WR
• Code memory is selectable by EA (internal or external)
• We may have External memory as data and code
Block Diagram
External Interrupts

Interrupt 4k 128 bytes Timer 1


Control ROM RAM Timer 2

CPU

OSC Bus
4 I/O Ports Serial
Control

P0 P2 P1 P3 TXD RXD
Addr/Data
Important 8051 Features
• 4K bytes ROM
• 128 bytes RAM
• Four 8-bit I/O ports
• Two 16-bit timers
• Serial interface
• 64K external code memory space
• 64K data memory space
Feature 8051
ROM (program space in bytes) 4K
RAM (bytes) 128
Timers 2
8 pin Ports 4
I/O pins 32
Serial port 1
Interrupt sources 6
8051
Architecture /
Internal Block Diagram
8051 Internal Block Diagr am
Architectural Features- (Refer A.K Ray for details)
• ACC or A register operand reg
• B reg operand for MUL ,DIV
• PSW (Program Status Word) –set of 7 flags
contains status bits which indicates the current state of the cpu.
PSW.7 CarrY(CY)
PSW.6 Aux Carry (AC)
PSW.5 Flag 0 (F0)
PSW.4 Register Bank Select 1
PSW.3 Register Bank Select 0
PSW.2 Overflow(OV)
PSW.1 reserved
PSW.0 Even Parity Flag (P)
• SP (Stack Pointer) 8-bit reg-incremented b4 data is stored using push
• DTPR (Data Pointer)
– 16-bit reg-has DPH (higher byte) & DPL(lower byte)
– Of 16-bit external data RAM addrss.
• Port 0-3 Latches & Drivers- alloted to 4 ports.
• Serial data Buffer –
– contains 2 independent registers.
– Transmit buffer & receive buffer.
• Timer Registers-T0 , T1
two 16-bit registers accessed as lower and higher bytes.
TH0 &TL0, TH1 & TL1
Control Registers- status & control Registers
TCON
TMOD
PCON
SCON
IP (Interrupt Priority)
IE (Interrupt Enable)
Timing & Control Unit
all timing& controlling operations of internal ckt & controls external bus.
Instruction Register

PC(Program Counter)

RAM & RAM Address Register (128 bytes of internal RAM m/m)

EPROM & EPROM Address Register (internal EEPROM)

ALU performs arith. & logic operns over operands held by temporary reg TMP1,TMP2

SFR (Special Function Register)

Interrupt, Serial Port, Timer Blocks


8051
Pin Diagram
P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 )P0.1(AD1)
P1.3 4 37 P0.2(AD2
P1.4 5 36 )P0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 8051 33 P0.6(AD6)
RST 9 (8031) 32 P0.7(AD7)
(RXD)P3.0 10 (8751) 31 EA/VPP
(TXD)P3.1 11 (8951) 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 )P2.5(A13
(WR)P3.6 16 25 )P2.4(A12
(RD)P3.7 17 24 )P2.3(A11
XTAL2 18 23 )P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
Pin Description of the 8051

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 )P0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2
P
) 0.3(AD3)
P1.5 6 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 )P2.5(A13
(WR)P3.6 16 25 P
) 2.4(A12
(RD)P3.7 17 24 )P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8) 
Pin Layout
• The 8051 is a 40 pin device, but out of
these 40 pins, 32 are used for I/O.
• 24 of these are dual purpose, i.e. they can
operate as I/O or a control line or as part of
address or date bus.
Pins of 8051 ( 1/4 )

• Vcc ( pin 40 ):
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
• GND ( pin 20 ): ground
• XTAL1 and XTAL2 ( pins 19,18 ):
– These 2 pins provide external clock.
– Way 1 : using a quartz crystal oscillator
– Way 2 : using a TTL oscillator
– Example 4-1 shows the relationship between XTAL
and the machine cycle.
Pins of 8051 ( 2/4 )

• RST ( pin 9 ): reset


– It is an input pin and is active high ( normally low ) .
• The high pulse must be high at least 2 machine cycles.
– It is a power-on reset.
• Upon applying a high pulse to RST, the microcontroller will
reset and all values in registers will be lost.
• Reset values of some 8051 registers
– Way 1 : Power-on reset circuit
– Way 2 : Power-on reset with debounce
Pins of 8051 ( 3/4 )

• /EA ( pin 31 ): external access


– There is no on-chip ROM in 8031 and 8032 .
– The /EA pin is connected to GND to indicate the code is stored
externally.
– /PSEN & ALE are used for external ROM.
– For 8051, /EA pin is connected to Vcc.
– “/” means active low.
• /PSEN ( pin 29 ): program store enable
– This is an output pin and is connected to the OE pin of the ROM.
– See Chapter 14.
Pins of 8051 ( 4/4 )

• ALE ( pin 30 ): address latch enable


– It is an output pin and is active high.
– 8051 port 0 provides both address and data.
– The ALE pin is used for de-multiplexing the address and data by
connecting to the G pin of the 74LS373 latch.
• I/O port pins
– The four ports P0, P1, P2, and P3.
– Each port uses 8 pins.
– All I/O pins are bi-directional.
FIGURE 2–2 8051 pinouts
Port 0 and Port 1
• Port 0 is a dual purpose port, it is located from
pin 32 to pin 39 (8 pins) and is labeled in the
fig.2-2 as AD0 to AD7.
• Port 1 is a dedicated I/O port from pin 1 to pin
8. It is generally used for interfacing to
external device thus if you need to connect to
switches or LEDs, you could make use of these
8 pins.
Port 2 and Port 3
• Like port 0, port 2 is a dual-purpose port. It can be
used for general I/O or as the high byte of the
address bus for designs with external code memory.
• Port 3 is also dual purpose but designers generally
avoid using this port unnecessarily for I/O because
the pins have alternate functions which are related
to special features of the 8051. Indiscriminate use of
these pins may interfere with the normal operation
of the 8051.
_____
• PSEN (Program Store Enable)
– This is a dedicated control line on pin 29 and is
used to enable external program (code)
memory. This pin usually connects to an
EPROM’s Output Enable (OE) pin.
– This is a logic low pin as represented by the bar
above the word PSEN, this means that during a
fetch stage involving an instruction stored in
external memory, the pin will be pulsed ‘LOW’.
• ALE ( Address Latch Enable)
– This pin is used to demultiplex the address and
data lines.
– Remember that port 0 has 2 functions. As the
low byte of the address bus and as the data
bus. In designs with external memory, port 0 is
connected to both the address and data lines
of the external RAM thus during the part of the
fetch cycle where the address is supplied, the
ALE is pulsed to enable the G (gate) control pin
of the latch IC thus the data goes to RAM and is
interpreted as an address. (see fig 2-10 and 2-
11).
___
• EA (External Access)
– If you need to connect to external ROM then
this pin must be tied LOW (0V).
– This pin must be tied high (+5V) if the programs
executes from internal ROM.
RST (Reset)
• This is pin 9 of the IC and is used as the
master reset for the 8051. In order for the
8051 to recognise that a reset has occurred,
this pin must be brought HIGH for at least
two machine cycles. During normal
operation, this pin must be at logic LOW.
This will be discussed in more detail later.
Oscillator ( clock) Input
• The 8051 is typically driven by a crystal
oscillator connected to pin 18 and 19 as
shown in fig.2-3.
• The words XTAL is short for crysTAL.
FIGURE 2–3 Driving the 8051 from a TTL oscillator
• Power Connections
– The 8051 requires a +5V input on its Vcc input
(pin 40) and Vss connection is on page 20.
IMPORTANT PINS

• PSEN (out): Program Store Enable, the read signal for


external program memory (active low).
• ALE (out): Address Latch Enable, to latch address outputs
at Port0 and Port2
• EA (in): External Access Enable, active low to access
external program memory locations 0 to 4K
• RXD,TXD: UART pins for serial I/O on Port 3
• XTAL1 & XTAL2: Crystal inputs for internal oscillator.
Pins of 8051

• Vcc ( pin 40 ):
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
• GND ( pin 20 ): ground
• XTAL1 and XTAL2 ( pins 19,18 ):
– These 2 pins provide external clock.
– Way 1 : using a quartz crystal oscillator
– Way 2 : using a TTL oscillator
– Example 4-1 shows the relationship between XTAL
and the machine cycle.
Pins of I/O Port

• The 8051 has four I/O ports


– Port 0 ( pins 32-39 ): P0 ( P0.0 ~ P0.7 )
– Port 1 ( pins 1-8 ) : P1 ( P1.0 ~ P1.7 )
– Port 2 ( pins 21-28 ): P2 ( P2.0 ~ P2.7 )
– Port 3 ( pins 10-17 ): P3 ( P3.0 ~ P3.7 )
– Each port has 8 pins.
• Named P0.X ( X=0,1,...,7 ) , P1.X, P2.X, P3.X
• Ex : P0.0 is the bit 0 ( LSB ) of P0
• Ex : P0.7 is the bit 7 ( MSB ) of P0
• These 8 bits form a byte.
• Each port can be used as input or output (bi-direction).

I/O pins of 8051
&
I/O ports
IMPORTANT PINS (IO Ports)

• One of the most useful features of the 8051 is that it


contains four I/O ports (P0 - P3)
• Port 0 ( pins 32-39 ): P0 ( P0.0 ~ P0.7 )
– 8-bit R/W - General Purpose I/O
– Or acts as a multiplexed low byte address and data bus for external memory design

• Port 1 ( pins 1-8 ) : P1 ( P1.0 ~ P1.7 )


– Only 8-bit R/W - General Purpose I/O

• Port 2 ( pins 21-28 ): P2 ( P2.0 ~ P2.7 )


– 8-bit R/W - General Purpose I/O
– Or high byte of the address bus for external memory design

• Port 3 ( pins 10-17 ): P3 ( P3.0 ~ P3.7 )


– General Purpose I/O
– if not using any of the internal peripherals (timers) or external interrupts.
• Each port can be used as input or output (bi-direction)
Port 3 Alternate Functions
Ports of 8051- Port0

 P0
 While accessing external memory provides lower
order byte of address (A0-A7)
 Otherwise acts as normal port line
Ports of 8051 - Port1
P1:
Port 1 has no dual function. It is simply used as
programmable bi-directional I/O Port.
Ports of 8051– Port2

 P2:
 While accessing external memory provides higher order
byte of address (A8-A15)
 Otherwise acts as normal port line
ADDR CO NTRO L
V C C IN T E R N A L
P U L L -U P
READ *
LATC H
P 2 .X
M UX
P IN
IN T .B U S D Q
P 2 .X
W R IT E LATC H
Q
TO CL Q 1

LATCH

READ
P IN
Ports of 8051- Port3

Port Pin Name Alternate


Function
P3 P3.0 RXD Serial input
port
ALTERNATE
P3.1 TXD Serial output
OUTPUT V CC port
F U N C T IO N
P3.2 INT0 External
* IN T E R N A L interrupt

READ P U L L -U P P3.3 INT1 External


LATC H interrupt

P 3 .X P3.4 T0 Timer 0
P IN external input
IN T .B U S D Q
P3.5 T1 Timer 1
P 3 .X Q1 external input
W R IT E LATCH
P3.6 WR External Data
TO CL Q memory write
LATCH store

P3.7 RD External Data


READ
memory Read
P IN store
ALTERN ATE
IN P U T
F U N C T IO N
8051 ports (repeated –pls ignore repeated slides)
Instruction set of 8051
(This is a simple introduction of instruction
set.Refer the other slide also for exam purpose)
Instruction Types
• The C8051F020 instructions are divided into
five functional groups:
– Arithmetic operations
– Logical operations
– Data transfer operations
– Boolean variable operations
– Program branching operations
LOOP and JUMP Instructions
Conditional Jumps :
JZ Jump if A=0

JNZ Jump if A/=0

DJNZ Decrement and jump if A/=0


CJNE A,byte Jump if A/=byte
CJNE reg,#data Jump if byte/=#data
JC Jump if CY=1

JNC Jump if CY=0

JB Jump if bit=1

JNB Jump if bit=0

JBC Jump if bit=1 and clear bit


Relative, Absolute, & Long Addressing
Used only with jump and call instructions:

SJMP

ACALL,AJMP

LCALL,LJMP
LJMP(long jump)
LJMP is an unconditional jump. It is a 3-byte instruction. It
allows a jump to any memory location from 0000 to FFFFH.

AJMP(absolute jump)
In this 2-byte instruction, It allows a jump to any memory
location within the 2k block of program memory.

SJMP(short jump)
In this 2-byte instruction. The relative address range of 00-
FFH is divided into forward and backward jumps, that is ,
within -128 to +127 bytes of memory relative to the address of
the current PC.
CALL Instructions
Another control transfer instruction is the CALL instruction,
which is used to call a subroutine.

• LCALL(long call)
This 3-byte instruction can be used to call subroutines
located anywhere within the 64K byte address space
of the 8051.
• ACALL (absolute call)
ACALL is 2-byte instruction. the target
address of the subroutine must be within 2K
byte range.
ACALL: Absolute Call
8051 Instruction Set
JC: Jump if Carry Set PUSH: Push Value Onto Stack

ADD, ADDC: Add Acc. (With Carry) JMP: Jump to Address RET: Return From Subroutine

AJMP: Absolute Jump JNB: Jump if Bit Not Set RETI: Return From Interrupt

ANL: Bitwise AND JNC: Jump if Carry Not Set RL: Rotate Accumulator Left

CJNE: Compare & Jump if Not Equal JNZ: Jump if Acc. Not Zero RLC: Rotate Acc. Left Through Carry

CLR: Clear Register JZ: Jump if Accumulator Zero RR: Rotate Accumulator Right

CPL: Complement Register LCALL: Long Call RRC: Rotate Acc. Right Through Carry

DA: Decimal Adjust LJMP: Long Jump SETB: Set Bit

DEC: Decrement Register MOV: Move Memory SJMP: Short Jump

DIV: Divide Accumulator by B MOVC: Move Code Memory SUBB: Sub. From Acc. With Borrow

DJNZ: Dec. Reg. & Jump if Not Zero MOVX: Move Extended Memory SWAP: Swap Accumulator Nibbles

INC: Increment Register MUL: Multiply Accumulator by B XCH: Exchange Bytes

JB: Jump if Bit Set NOP: No Operation XCHD: Exchange Digits

JBC: Jump if Bit Set and Clear Bit ORL: Bitwise OR XRL: Bitwise Exclusive OR

POP: Pop Value From Stack Undefined: Undefined Instruction

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