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Question Bank For IAT 1

The document outlines various topics in digital electronics, including the differences between full subtractors, multiplexers, and demultiplexers, as well as the construction of logic circuits such as half adders and full adders. It also covers concepts related to flip-flops, latches, and counters, along with their designs and characteristics. Additionally, it discusses the functional units of digital computers and instruction formats, providing a comprehensive overview of digital logic design and computer architecture.

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0% found this document useful (0 votes)
18 views10 pages

Question Bank For IAT 1

The document outlines various topics in digital electronics, including the differences between full subtractors, multiplexers, and demultiplexers, as well as the construction of logic circuits such as half adders and full adders. It also covers concepts related to flip-flops, latches, and counters, along with their designs and characteristics. Additionally, it discusses the functional units of digital computers and instruction formats, providing a comprehensive overview of digital logic design and computer architecture.

Uploaded by

yaseernowfal8005
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 10

ANJALAI AMMAL - MAHALINGAM ENGINEERING COLLEGE

KOVILVENNI-614 403, THIRUVARUR DISTRICT


NAAC Accredited with “B” Grade
DEPARTMENT OF INFORMATION TECHNOLOGY

Unit 1
Part A

1.​ Summarize the difference and borrow expressions of full subtractor


D = x'y'z + x'yz' + xy'z' + xyz
= (x'y' + xy)z + (x'y + xy')z'
= (x​ y)'z+ (x​ y)z'
= x​ y​ z
B = x'.y + x'.z+ y.z

2.​ Differentiate between Multiplexer and De multiplexer


Multiplexer
Demultiplexer
Single source and converts it into several
Various sources into a single source. sources
It is known as Data Selector It is known as Data Distributor
It follows combinational logic type It also follows combinational logic type
It has n data input It has single data input
It has a single data output It has n data outputs
3.​ Trace the function G=∑m (0, 3) using a 2x4 decoder

2 to 4 line decoder
​ Two inputs are decoded into 4 outputs
​ Each output represents one of the minterms of the two input variables.
Block Diagram ​ ​ ​ ​

Truth table
Y 3 = I1 I0

Y 2 = I1 I0

Y 1 = I1 I0

Y 0 = I1 I0

Logic Diagram
4.​ Describe the number of selection inputs, data inputs and outputs for 1 * 32 DEMUX..

For 1 × 32 DEMUX:
●​ Selection inputs (control lines):​
To select one of 32 outputs, we need

​ ​ 2n=32 ⇒ n=5 2n = 32

​ So, 5 selection inputs are required.


●​ Data inputs:​
1 × 32 DEMUX has only 1 data input.
●​ Outputs:​
It has 32 outputs (only one output line is active at a time, depending on the selection inputs).
5.​ Construct Half-adder and full adder circuits (April/May 2023)
Ref Page No.3 to 4 in material unit 1
6.​ Evaluate the logic circuit of 2 bit comparator (April/May 2023)
7.​ List the four possible elementary operations simple binary addition consist of (Nov/Dec 2022)

0​ +0=0
0​ +1=1
1​ +0=1
1​ + 1 =10
​ ​ ​
8.​ What is Multiplexer? (Nov/Dec 2022)
A multiplexer is a combinational circuit that has many data inputs and a single output, depending
on control or select inputs. For N input lines, log2(N) selection lines are required, or equivalently,
for 2n input lines, n selection lines are needed. Multiplexers are also known as “N-to-1 selectors,”
9.​ Write down the sum and carry expressions for half adder. (Nov/Dec 2023)
S = x‘y + xy‘
C = xy
10.​How many selection inputs, data inputs and output for 16*1 MUX? (Nov/Dec 2023)
4 selection lines
16 data inputs
one output.​
Part B

1.​ What is K-map? Simplify the Boolean function F(w,x,y,z) = ∑(0,1,2,4,5,6,8,9,12,13,14) using K-Map. (13 Mark)
(Nov/Dec 2022)
2.​ Examine the following Boolean function using 8 to 1 Multiplexer.
F (A, B, C, D) ==∑ (1,3,4,11,12,13,14,15).

. 3. For the Boolean function F = A’C+A’B+AB’C +BC


i. Express the function as sum of Min-terms
ii Find the minimal sum of product expression.
4. Explain full adder and full subtractor with the help of circuit diagrams (13 Mark) (Nov/Dec 2023)
5.​ Build a 4 bit priority encoder using gates (6 Mark) (April/May 2023)
6.​ How will you design a full adder using two half adder (6 Mark) (April/May 2023)
7.​ Simplify the function using multiplexer f = ∑ (0,1,3,4,8,9,15) (6 Mark) (April/May 2023)
8.​ Demonstrate 4 bit magnitude comparator with three outputs A > B, A = B, A < B (7 Mark) (April/May 2023)
9.​ Present the graphic symbol, algebraic expression and truth table for the following digital logic gates: AND,OR,
Invertor, Buffer, NAND, NOR, Exclusive OR and Exclusive NOR (13Mark) (Nov/Dec 2022)
10.​ Explain binary to octal decoder and octal to binary encoder with the help of circuit diagrams (13 Mark) (Nov/Dec
2023)
Unit 2
1.​ Define a latch and flip flop
Latch:
​ A Latch is a basic memory element that operates with signal levels and stores 1 bit of data.
​ Latches are said to be level sensitive devices.
​ Latches are useful for storing information.
Flip Flop:
​ A flip-flop is a sequential digital electronic circuit having two stable states that can be used to store
one bit of binary data.
​ Flip-flops are the fundamental building blocks of all memory devices.
​ The latch with the additional control input is called the Flip-Flop
​ The additional control input is either the clock or enable input.
2.​ Outline the difference between synchronous sequential circuit and an asynchronous sequential circuit.

Synchronous sequential circuits Asynchronous sequential circuits


1. Signals can affect the memory elements Change in input signals can affect the memory
only at discrete instants of time. element
2 Memory elements are clocked flip-flops Memory elements are un clocked flip-flops or
time delay instant of time.
3 The maximum operating speed of clock Because​ of​ absence​ of​ clock,​ asynchronous
depends on time delays involved circuits can operate faster than synchronous
circuits
4 Easier to design More difficult to design

3.​ Define race around condition.


When S and R inputs of an SR flip is at logical 1 and then the input is changed to any other condition,
the output becomes unpredictable and this is called race around condition,
4.​ Illustrate a 4 bit binary synchronous counter with D flip flops
5.​ Distinguish sequential logic with combinational logic
Combinational circuits Sequential circuits
1. Output depends on present input Output depends not only on present input but also
on past output
2 No feedback involved It has feedback
3 It doesn‟t have clock signal It may or may not have clock signal , but most
sequential circuit have clock signal
4 Faster than sequential circuits Low speed
5 Memory unit is not required Memory unit is required
6 Easy to design Design is not easy
6.​ Give the excitation table of JK flip flop

𝑄𝑛 Q Excitation Inputs
n+1
J K
0 0 0 X
0 1 1 X
1 0 X 1
1 1 X 0
7.​ What is shift register? List its types.
The Shift Register is another type of sequential logic circuit that is used for the storage or transfer of data in the
form of binary numbers and then "shifts" the data out once every clock cycle, hence the name "shift register".
Types:
Serial-in to Parallel-out (SIPO)
Serial-in to Serial-out (SISO)
Parallel-in to Serial-out (PISO)
Parallel-in to Parallel-out (PIPO)
8.​ How many flip flops are required for designing BCD counter? Justify.

To design a BCD counter, 4 flip-flops are required. This is because a BCD counter has 10 states (from
0000 to 1001) and each decimal digit is represented by a 4-bit binary code, necessitating 4 flip-flops to store
the count.
Part B

1.​ Design a synchronous counter which counts in the sequence 000, 001,010, 011, 100, 101,110,111,000 using
JK flip-flop
2.​ Describe shift register. Outline the design of shift register with a diagram..(Nov/Dec 2022)
3.​ Describe JK and D Flip Flops with the help of block diagrams and characteristics table. .(Nov/Dec 2023)
4.​ Define SR latch? Outline the design of SR latch using NOR gates .Also present the function table for the
same.(Nov/Dec 2022)
5.​ Design MOD 3 Counter and explain Lockout condition
6.​ Convert SR Flip Flop into JK Flip Flop
7.​ Outline the design of a D Flip flop with two D latches and an invertor with a diagram. (Nov/Dec 2022)
8.​ Outline the Mealy model and Moore model of sequential circuits with a diagram.(Nov/Dec 2022)
9.​ Explain Mealy model and Moore model with the help of block diagram. (Novl/Dec 2023)
10.​ Realize D Flip flop using SR Flip flop (April/May 2023)
11.​ Construct a 4 bit down counter using logic gates (April/May 2023)
12.​ Give the analysis and design of clock sequential circuits (April/May 2023)

Unit 3
1.​ List the functional units of digital computer

​ Input Unit

​ Memory Unit

​ Arithmetic Logic Unit

​ Control Unit

​ Central Processing Unit


2.​ Define Moore’s Law
The exponential increase in the number of transistors on integrated circuits over time is referred to as Moore’s law.
According to this, a chip transistor count tends to double every two years or so, resulting in higher processing power
and better performance.
3.​ Draw the block diagram of Von-Neumann architecture.
4.​ List the types of addressing modes
1.​ Immediate Addressing
2.​ Direct Addressing
3.​ Indirect Addressing
4.​ Register Addressing
5.​ Register Indirect Addressing
6.​ Displacement Addressing
7.​ Stack Addressing
​ ​

Part B
1.​ Explain about functional units of digital computer

●​ Input Unit : The input unit consists of input devices that are attached to the computer. These devices take input
and convert it into binary language that the computer understands. Some of the common input devices are
keyboard, mouse, joystick, scanner etc.
●​ Central Processing Unit (CPU): Once the information is entered into the computer by the input device, the
processor processes it. The CPU is called the brain of the computer because it is the control center of the
computer. It first fetches instructions from memory and then interprets them so as to know what is to be done. If
required, data is fetched from memory or input device. Thereafter CPU executes or performs the required
computation and then either stores the output or displays on the output device. The CPU has three main
components which are responsible for different functions – Arithmetic Logic Unit (ALU), Control Unit (CU) and
Memory registers
●​ Arithmetic and Logic Unit (ALU): The ALU, as its name suggests performs mathematical calculations and
takes logical decisions. Arithmetic calculations include addition, subtraction, multiplication and division. Logical
decisions involve comparison of two data items to see which one is larger or smaller or equal.
●​ Control Unit: The Control unit coordinates and controls the data flow in and out of CPU and also controls all the
operations of ALU, memory registers and also input/output units. It is also responsible for carrying out all the
instructions stored in the program. It decodes the fetched instruction, interprets it and sends control signals to
input/output devices until the required operation is done properly by ALU and memory.
●​ Memory Registers : A register is a temporary unit of memory in the CPU. These are used to store the data
which is directly used by the processor. Registers can be of different sizes(16 bit, 32 bit, 64 bit and so on) and
each register inside the CPU has a specific function like storing data, storing an instruction, storing address of a
location in memory etc. The user registers can be used by an assembly language programmer for storing
operands, intermediate results etc. Accumulator (ACC) is the main register in the ALU and contains one of the
operands of an operation to be performed in the ALU.
●​ Memory : Memory attached to the CPU is used for storage of data and instructions and is called internal memory
The internal memory is divided into many storage locations, each of which can store data or instructions. Each
memory location is of the same size and has an address. With the help of the address, the computer can read any
memory location easily without having to search the entire memory. when a program is executed, it’s data is
copied to the internal memory and is stored in the memory till the end of the execution. The internal memory is
also called the Primary memory or Main memory. This memory is also called as RAM, i.e. Random Access
Memory. The time of access of data is independent of its location in memory, therefore this memory is also called
Random Access memory (RAM).
●​ Output Unit: The output unit consists of output devices that are attached with the computer. It converts the
binary data coming from CPU to human understandable form. The common output devices are monitor, printer,
plotter etc.

2.​ Explain various instruction formats and illustrate the same with an example
MIPS Fields

op: Basic operation of the instruction, traditionally called the opcode.


rs: The first register source operand.
rt: The second register source operand.
rd: The register destination operand. It gets the result of the operation.
shamt: Shift amount.
funct: Function. This field, often called the function code, selects the specific variant of the operation in the op field.
Three instruction encoding formats:

⚫​ R-type (6-bit opcode, 5-bit rs, 5-bit rt, 5-bit rd, 5-bit shamt, 6-bit function code)
⚫​ I-type (6-bit opcode, 5-bit rs, 5-bit rt, 16-bit immediate)

⚫​ J-type (6-bit opcode, 26-bit pseudo-direct address)

3.​ Discuss about instruction cycle


Instruction Cycle

​ A program consisting of the memory unit of the computer includes a series of instructions. The program is
implemented on the computer by going through a cycle for each instruction.

​ In the basic computer, each instruction cycle includes the following procedures −

i.​ It can fetch instruction from memory.


ii.​ It is used to decode the instruction.
iii.​ It can read the effective address from memory if the instruction has an indirect address.
iv.​ It can execute the instruction.

4.​ List the eight ideas in Computer Architecture


1.​Design for Moore’s Law
2.​Use Abstraction to Simplify Design
3.​Make the common case fast
4.​Performance via parallelism
5.​Performance via pipelining
6.​Performance via prediction
7.​Hierarchy of memories
8.​Dependability via redundancy
5.​ What is an addressing mode? Outline the types of addressing modes with an example . (Nov/Dec 2022)
6.​ Explain about any four addressing modes with example. (Nov/Dec 2023)

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