ASSIGNMENT -3 (Unit-3)

Course Digital Electronics (BOE 410)

SEM & Section CSE (DS)-IV Semester, Section- A, B

Date of Assignment 03/06/25

Date of Submission 06/06/25

Short Questions:

1. Differentiate between combinational and sequential circuits.

2. Differentiate Asynchronous and Synchronous circuits.
3. What is the advantage of synchronous counter over asynchronous counter?
4. Explain the use of clock in digital circuits. Also explain the type of triggering.
5. Explain Race Around Condition. What factors cause race around condition.
6. Define Propagation Delay.
7. Explain the concept of ring counter.
8. What are the basic building blocks of sequential logic circuits?
9. A flip flop has 5ns delay from the time the clock edge occurs to the time when output is
complemented. What is the maximum delay in a 10-bit binary ripple counter that uses
these flip-flops? What is the maximum frequency the counter can operate reliably?

Long Questions:

1. Define storage elements and discuss the characteristics of latches and flip-flops.
Ans: Storage elements, like latches and flip-flops, are fundamental building blocks in digital
circuits that store binary information (0 or 1). Latches are level-triggered, meaning their
output changes as long as the controlling input (often a clock signal) is active. Flip-flops, on the
other hand, are edge-triggered, meaning their output changes only at a specific transition (rising
or falling edge) of the clock signal.

Latches:
• Definition: Latches are memory elements that change their output state based on the
level of the input signal.
• Characteristics:
o Level-triggered: Output changes whenever the enable (clock) input is high or
low, depending on the latch design.
o Transparent: When enabled, the latch's output follows the input, making it
appear transparent.
o Asynchronous: Latches can be considered asynchronous because they respond
immediately to input changes while enabled.
 o Examples: SR latch, D latch.

Flip-Flops:
• Definition: Flip-flops are memory elements that change their output state at a specific
edge (rising or falling) of the clock signal.
• Characteristics:
o Edge-triggered: Output changes only during a clock transition (rising or falling
edge), not while the clock is stable at a high or low level.
o Synchronous: Flip-flops are considered synchronous because their operation is
synchronized to the clock signal.
o Less susceptible to glitches: Edge-triggering makes flip-flops more robust
against brief, unwanted input changes (glitches) compared to latches.
o Examples: SR flip-flop, D flip-flop, JK flip-flop, T flip-flop.
2. Elaborate the characteristic equation and excitation table of S R, J K, D and T flip
flop.
Ans: Explained in notes- Chapter 3 at Section 3.2 and Section 3.4

The characteristic equation and excitation table define how flip-flops behave. The
characteristic equation describes the next state (Qn+1) based on current state (Qn) and
inputs, while the excitation table shows the necessary inputs (S, R, J, K, D, or T) to
achieve a desired next state.

1. SR Flip-Flop:
• Characteristic Equation: Qn+1 = S + R'Qn
• Excitation Table:

Qn Qn+1 S R
0 0 0 X
0 1 1 0
1 0 0 1
1 1 X 0

2. JK Flip-Flop:
• Characteristic Equation: Qn+1 = JQ'n + K'Qn
• Excitation Table:

Qn Qn+1 J K
0 0 0 X
0 1 1 X
1 0 X 1
1 1 X 0

3. D Flip-Flop:
• Characteristic Equation: Qn+1 = D
• Excitation Table:

Qn Qn+1 D
0 0 0
0 1 1
1 0 0
1 1 1
 4. T Flip-Flop:
• Characteristic Equation: Qn+1 = T ⊕ Qn (T XOR Qn)
• Excitation Table:

Qn Qn+1 T
0 0 0
0 1 1
1 0 1
1 1 0

3. Explain positive edge triggered T-flip-flop with the help of circuit diagram and
waveforms.
Ans: T-flip-flop is explained in notes- Chapter 3 at Section 3.5

The toggle, or T, flip-flop is a two-input flip-flop. The inputs are the toggle (T) input and a clock
(CLK) input. If the toggle input is HIGH, the T flip-flop changes state (toggles) when the clock
signal is applied. If the toggle input is LOW, the T flip-flop holds the previous state.

T flip-flop symbol.
The standard symbol for a T flip-flop is illustrated in the figure above. The clock input may be
preceded by an inverter. An inverter indicates a flip-flop will toggle on a HIGH-to-LOW
transition of the clock pulse. The absence of an inverter indicates the flip-flop will toggle on a
LOW-to-HIGH transition of the pulse.
Now, follow the explanation of the circuit using the truth table and the timing diagram shown in
the figure above. The timing diagram shows the inputs and the resulting outputs. We will assume
an initial condition (t0) of Q being LOW and Q being HIGH. At t1, when the clock changes from
a LOW to a HIGH, the outputs remain the same as the T input is LOW. The T input goes HIGH
at t2. At t3, the clock changes from a LOW to a HIGH and the device changes state; Q goes
HIGH and Q goes LOW. The outputs remain the same at t4 since the device is switched only by
a LOW-to-HIGH transition. At t5, when the clock goes HIGH, Q goes LOW and Q goes HIGH;
they remain that way until t7.

Between t3 and t7, two complete cycles of CLK occur. During the same time period, only one
cycle is observed for Q or Q. Since the output frequency is one-half the clock (input) frequency,
this device can be used to divide the input frequency by 2.

The most commonly used T flip-flops are J-K flip-flops wired to perform a toggle function. This
use will be demonstrated later in this section.
4. How can a JK flip-flop be converted into a D flip-flop and T flip-flop.
Ans: https://www.youtube.com/watch?v=bl77FRTAXWA&t=536s
5. Define Master-slave flip flop.
Ans:
6. Describe the operations and applications of Serial-in-Parallel-out Shift Register with
a neat diagram.
Ans: A Serial-In Parallel-Out (SIPO) shift register converts serial data input into parallel data
output. It receives data bits one at a time serially and then makes all stored bits available
simultaneously as parallel output. This is achieved by cascading flip-flops, where the output
of one flip-flop acts as the input for the next, and each flip-flop stores one bit of the serial
data.

7. Define bi-directional shift register. Draw and explain 3-bit bi-directional shift
register using D flip-flop.
Ans: A bi-directional shift register is a type of digital circuit that can shift binary data either
to the left or to the right, based on a control signal. A 3-bit bi-directional shift register using
D flip-flops can be implemented by connecting three D flip-flops and using additional logic
gates to control the direction of the shift.
8. Compare and contrast Mealy and Moore machines and discuss their applications in
digital system design.
Ans: Mealy and Moore machines are finite state machines (FSMs) that differ in how their
outputs are generated. Mealy machines produce outputs based on both the current state
and the current input, while Moore machines produce outputs based solely on the
current state. This fundamental difference impacts their behavior, complexity, and
suitability for different applications in digital system design.

Comparison:
• Output Generation:
o Mealy: Output is a function of both the current state and the current input.
o Moore: Output is only a function of the current state.
• Number of States:
o Mealy machines often require fewer states to achieve the same functionality
compared to Moore machines.
• Response Time:
o Mealy machines tend to respond faster to input changes as the output can change
immediately with an input change.
o Moore machines have a delay in output change because it depends on the clock
cycle for state transitions.
• Complexity:
 o Mealy machines can be more complex to design due to the dependency on both
state and input for output, leading to more intricate state transitions.
o Moore machines can be simpler to design in some cases, especially when dealing
with synchronized outputs.
• Output Transitions:
o Mealy machines can have output transitions occurring during input transitions,
which can sometimes lead to glitches or unwanted behavior in interconnected
systems.
o Moore machines have synchronous output transitions, meaning outputs change
only with clock transitions, minimizing glitches.

Applications in Digital System Design:

• Mealy Machines:
o Sequence detectors: Mealy machines can be used to detect specific sequences of
inputs, especially when the output needs to change based on the sequence and
current input value.
o Control units: In control units, Mealy machines can be used to implement
complex control logic where immediate output changes based on both state and
input are required.
o Systems with fast response requirements: Mealy machines are suitable for
applications where fast output response to input changes is critical, such as in
some real-time control systems.
• Moore Machines:
o Synchronized systems: Moore machines are well-suited for systems where
outputs need to be synchronized with a clock signal, like in many digital circuits.
o Control circuits with predictable timing: In applications where predictable
timing and output transitions are crucial, like in certain communication protocols,
Moore machines are preferred.
o Systems requiring simpler design: When a simpler design and easier
verification are prioritized, Moore machines can be a good choice, especially for
less complex control logic.

9. Explain the concept of ripple counters and synchronous counters.

Ans: Ripple counters and synchronous counters are two fundamental types of digital
counters that differ in how their flip-flops are clocked. Ripple counters, also known as
asynchronous counters, clock each subsequent flip-flop using the output of the previous one,
creating a "ripple" effect through the circuit. This leads to slower operation and potential
instability during transitions. Synchronous counters, on the other hand, clock all flip-flops
simultaneously using a common clock signal, resulting in faster and more reliable counting.
 10. Explain the design and working of 4-bit synchronous counter.
Ans: A 4-bit synchronous counter is a digital circuit that counts from 0 to 15 (or 15 to 0 in a
down counter) in a binary sequence, with all flip-flops in the counter being clocked
simultaneously by a single clock signal. This means that all flip-flops change state at the same
time, unlike asynchronous (ripple) counters where the output of one flip-flop acts as the clock for
the next. This synchronous operation eliminates the cumulative propagation delays and provides
a more stable and predictable output.

Design:

A 4-bit synchronous counter typically uses four JK flip-flops (FF0, FF1, FF2, and FF3), where
each flip-flop represents one bit of the binary number. The clock input of each flip-flop is
connected to the same clock signal.
• FF0 (LSB): The J and K inputs of the first flip-flop (FF0) are connected to a logic '1',
causing it to toggle (change state) with every clock pulse.
• FF1, FF2, and FF3 (MSB): The J and K inputs of the subsequent flip-flops are connected
to a logic AND gate that takes the outputs of the preceding flip-flops as inputs. For
example, the inputs of FF1 are connected to the output of FF0, and so on.
Working:
1. Clocking: When a clock pulse arrives, it triggers all flip-flops simultaneously.
2. Toggling: Each flip-flop toggles its output (changes from 0 to 1 or 1 to 0) based on its
inputs and the state of the preceding flip-flops.
3. Counting: The outputs of the flip-flops represent the binary count. FF0 is the least
significant bit (LSB), and FF3 is the most significant bit (MSB).
4. Up Counter: In an up counter, the counter increments by one for each clock pulse. The
sequence goes from 0000 to 1111 (0 to 15 in decimal) and then resets to 0000.
5. Down Counter: In a down counter, the counter decrements by one for each clock pulse.
The sequence goes from 1111 to 0000 (15 to 0 in decimal) and then resets to 1111.

Example (Up Counter):

• Initially: 0000
• Clock pulse 1: 0001
• Clock pulse 2: 0010
• ...
• Clock pulse 15: 1111
• Clock pulse 16: 0000 (reset)

Advantages of Synchronous Counters:

• No Cumulative Delay: Since all flip-flops are clocked together, there's no cumulative
propagation delay as with asynchronous counters.
 • Stable Output: The outputs change simultaneously, resulting in more stable and
predictable outputs.

Applications:
• Digital Clocks: Used for timing and counting events in digital systems.
• Frequency Division: Can be used to divide a clock signal frequency.
• State Machines: Used in the design of sequential logic circuits.
• Process Control: Employed in various control applications where sequential counting or
timing is required.

11. Design a 3 bit UP/ DOWN counter using J K flip flop.

Ans: Explained in notes- Chapter 3: Section 3.11- Example 1.
12. Explain Johnson counters with timing diagrams and applications.
Ans: Johnson counters, also known as twisted ring counters, are a type of digital counter that
utilizes a shift register with feedback from the inverted output of the last flip-flop to the
input of the first. This configuration creates a unique counting sequence.

How it works:
1. Shift Register: A Johnson counter is built using a series of flip-flops connected as a shift
register.
2. Feedback: The inverted output of the last flip-flop is fed back into the input of the first
flip-flop.
3. Counting Sequence: Each clock pulse shifts the data one position to the right, and the
inverted output of the last flip-flop enters the first. This creates a sequence where a string
of 1s expands from right to left and then collapses from left to right, repeating cyclically.
4. MOD: A k-bit Johnson counter has a MOD of 2k (2 times the number of flip-flops).

Timing Diagram:

The timing diagram of a Johnson counter shows the output waveforms of each flip-flop. For
a 3-bit Johnson counter:

Clock | Q1 | Q2 | Q3
-------|----|----|----
0 | 0 | 0 | 0
1 | 1 | 0 | 0
2 | 1 | 1 | 0
3 | 1 | 1 | 1
4 | 0 | 1 | 1
5 | 0 | 0 | 1
6 |0 |0 |0

Applications:
• Frequency Dividers: Johnson counters can divide the frequency of a clock signal by a
factor equal to twice the number of flip-flops. A 3-bit Johnson counter can divide the
clock frequency by 6.
• Phase Generators: They can be used to generate multiple phases of a square wave with
specific phase shifts. A 3-bit Johnson counter can generate a 3-phase square wave with
120-degree phase shifts.
• Pattern Recognition: The unique counting sequence can be used in pattern recognition
circuits.
• Digital Counters: They can be used as synchronous decade counters and divider circuits,
though they don't count in a standard binary sequence.
• Finite State Machines: Johnson counters can be used as a building block in the design of
more complex finite state machines.
13. Explain the working and circuit of a modulo-5 counter using gates.
Ans: Explained in notes- Chapter 3 at Section 3.11-Example 2 for modulo 6 counter using
JK FF. For Modulo 5; do same process but consider count 0-1-2-3-4 only.