MEDI-CAPS UNIVERSITY

Digital Electronics

“Practical File”

Name: Harsh Kumar

Enrollment No. : EN19CS301131
Class : CS-C
Batch : C1
Branch : B. Tech (CSE)
 EXPERIMENT 01

CS3CO29: Digital Electronics Laboratory Experiment no- 01

Experiment Title: To test logic operations - AND, OR and NOT using Diode and
Transistor.

AIM:
1. To understand the meaning and significance of Logic 0 and Logic 1.
2. To measure the voltage level of Logic 0 and Logic 1.
3. To understand how diode and transistor work while applying Logic 0 and Logic1.
4. To understand the physical structure of bread board and learn to embed various
components using shorted terminal.
5. To understand the functioning of AND, OR, NOT, NAND and NOR gate.

1. OBJECTIVES: After completing the experiment, the student should be able:

a. To understand the working of diode and transistor.
b. To gain knowledge regarding various applications of logic Gates.
c. To know the Practical implementation of various Logical circuits.

2. PROBLEM STATEMENT:
a. To test and measure the voltage at input and output,verify the truth table for various
gates.
b. To Implement the circuit of NOT, NAND, NOR using transistor only.

3. Apparatus required:
a. Prototyping board (Bread board).
b. DC power supply 5V battery.
c. Light Emitting Diodes (LED’s).
d. Electronic components: Diodes, Transistor, Resistors.
e. Connecting wires.

4. THEORY:
Logic Gates: Logic gates are digital circuits which take as different combination of 1
and 0 as inputs and produce output accordingly. Hence, they are called combinational
circuit. If there are two variable A and B applied at the input of the gate and each one of
these variable can take two value (1 and 0), then 2 combination of input are possible. The
2

output at any instant depends only on current combination of input.

 These Logic gates implement certain Boolean functions. A logic gate performs a logical
operation on one or more logic inputs and produces a single logic output. The logic
operation normally performed is Boolean logic and is most commonly found in digital
circuits. Logic gates are primarily implemented electronically using diodes or transistors,
but can also be constructed using electromagnetic relays, fluidics, optics, or even
mechanical elements.
In electronic logic, a logic level is represented by a voltage or current, (which depends on
the type of electronic logic in use). Each logic gate requires power so that it can source
and sink currents to achieve the correct output voltage. In logic circuit diagrams the
power is not shown, but in a full electronic schematic, power connections are required.
Types of Logic Gates: The logic gate implements certain Boolean functions. Depending
on the Boolean function implemented by the gate type of gate is defined.
Basic gate: There are three basic gates. Each of these gates does their own basic
function. AND GATE: An AND gate has two or more input signal but only one output
signal. All inputs must be high to get a high output. The diagram given below indicates
the two input AND gate. If 5V is applied at input A and B, none of the diode conduct and
the output is 5V.if 0V is applied to either A or B, or both the respective diodes conduct
and current flows from source and output is 0V.

TRUTH TABLE
AND GATE
Inputs Output
A B Y
0 0 0
0 1 0
1 0 0
1 1 1
OR GATE: An OR gate has two or more input signal but only one output signal. Any
input high gives a high output.
 The diagram given below indicates the two input OR gate. If 5V is applied at input A and
B, none of the diode conduct and the output is 5V.if 0V is applied to either A or B, or
both the respective diodes conduct and current flows from source and outputs 0V.

TRUTH TABLE
OR GATE
Inputs Output
A B Y
0 0 0
0 1 1
1 0 1
1 1 1

NOT GATE: The NOT gate perform the basic logical function called inversion or
complementation. The purpose of this Gate is to convert one logic level into the opposite
logic level. It has one input and one output. When a logic 1 is applied to an invertor logic

0 appears at its output and vice versa.

TRUTH TABLE

NOT GATE
Inputs Outputs
0 0
1 1

Universal Gates: NAND and Nor gate are called universal gate as they can implement
any logical function.
 NAND gate: NAND gate implements the NAND (complement of DOT product function)
function of Boolean algebra.
Definition: If any input of NAND gate is zero then the output of NAND gate will be 1. If
both the inputs of NAND gate are one then the output of NAND gate will be 0.

Truth Table
A B Y=(A.B)’
0 0 1
0 1 1
1 0 1
1 1 0

NOR gate: NOR gate implements the NOR (Complement of OR function) function of
Boolean algebra.
Definition: If any or both input of NOR gate is one then the output of NOR gate will be
0. If both the inputs of NOR gate is zero then the output of NAND gate will be

1.

Truth Table

A B Y=(A + B)’
0 0 1
0 1 0
 1 0 0
1 1 0

5. TEST PROCEDURE:
a. Make connections as per circuit diagram of fig. 1.1 on bread board. Connect the
output pin to the LED.
b. Switch on the power supply.
c. Give logic inputs to corresponding input terminal and verify result on LED.
d. Similarly give logic inputs to other input and check the output.
e. Follow similar procedure for other circuit diagram

7. RESULT: Logic circuits can be constructed even without using actual logic gates.
8. SELF ASSESSMENT:
a. Sketch circuit diagram, make truth table and assemble an EX-OR Gate from AND,
OR, NOT logic Gates.

b. Why NAND and NOR Gates are called universal gates.

Ans- Because all the other logic gates can be created with them.
c. Why is LED being used in this experiment.
Ans- To show the flow of power, a glowing LED shows 1 in output while in off state, it
shows 0.
d. How can AND & OR Gate be implemented using transistor.
Ans- A simple 2-input logic AND gate can be constructed using RTL Resistor-transistor
switches connected together as shown below with the inputs connected directly to the
transistor bases. Both transistors must be saturated “ON” for an output at Q.
A simple 2-input inclusive OR gate can be constructed using RTL Resistor-transistor
switches connected together as shown below with the inputs connected directly to the
transistor bases. Either transistor must be saturated “ON” for an output at Q.

EXPERIMENT 02

CS3CO29: Digital Electronics Laboratory Experiment no- 02

Experiment Title: verification of logic functions using various logic gates IC’s.

1. AIM -
a. To test logic operations NAND and NOR using Integrated circuits and verify different
logic combinations using these ICs.
b. To study some other IC’s and LED.
c. Identification of ICs (manufacturing company, IC-type, temperature grade)
d. To understand the logic power supply necessary to drive the Digital ICs.
e. To understand the utility of digital system and its response.
f. To familiar with different ICs and its working operation.
g. To know the utility of digital ICs in various field.

3. OBJECTIVES- After completing the experiment, the student should be able:

a. To analyze working of electronic devices assembled as logic gate.
b. To analyze various logic gates.
c. To implement every Gate using Universal Gate.
d. To work efficiently on trainer kit.

4. PROBLEM STATEMENT-
a. To learn the output tables of various logic gates.
b. To learn different combinations of logic gates used in IC’s.
c. To learn the specification of ICs and unique feature of each and every pin.
d. To familiar with the digital power supply i.e. Logic 0 & Logic 1.

5. Apparatus required:
a. Prototyping board (Bread board).
b. DC power supply 5V battery.
c. Light Emitting Diodes (LED’s).
d. Digital IC’s: 7408 Quad 2 input AND gate, 7432 Quad 2 input OR gate, 7404 Hex
NOT gates (Inverter), 7400 Quad 2 input NAND gate, 7402 Quad 2 input NOR gate.
e. Connecting wires.

6. THEORY -A Logic gate is a device which gives output when input is ‘1” or”0”. In
this experiment we will study working of electronic devices assembled as logic gate.
In electronics, an integrated circuit (also known as IC, microcircuit, microchip, silicon
chip, or chip) is a miniaturized electronic circuit (consisting mainly of semiconductor
devices, as well as passive components) that has been manufactured in the surface of a
thin substrate of semiconductor material.
There are two main advantages of ICs over discrete circuits: cost and performance. Cost
is low because the chips, with all their components, are printed as a unit by
photolithography and not constructed one transistor at a time. Performance is high since
the components switch quickly and consume little power, because the components are
small and close together.
Among the most advanced integrated circuits are the microprocessors or "cores", which
control everything from computers to cellular phones to digital microwave ovens. Digital
memory chips and ASICs are examples of other families of integrated circuits that are
important to the modern information society. While cost of designing and developing a
complex integrated circuit is quite high, when spread across typically millions of
production units the individual IC cost is minimized. The performance of ICs is high
because the small size allows short traces which in turn allows low power logic (such as
CMOS) to be used at fast switching speeds.
 Integrated circuits can be classified into analog, digital and mixed signal (both analog
and digital on the same chip).
Digital integrated circuits can contain anything from a few thousand to millions of logic
gates, flip-flops, multiplexers, and other circuits in a few square millimeters. The small
size of these circuits allows high speed, low power dissipation, and reduced
manufacturing cost compared with board-level integration. These digital ICs, typically
microprocessors, DSPs, and micro controllers work using binary mathematics to process
"one" and "zero" signals.
Analog ICs, such as sensors, power management circuits, and operational amplifiers,
work by processing continuous signals. They perform functions like amplification, active
filtering, demodulation, mixing, etc. Analog ICs ease the burden on circuit designers by
having expertly designed analog circuits available instead of designing a difficult analog
circuit from scratch.
ICs can also combine analog and digital circuits on a single chip to create functions such
as A/D converters and D/A converters. Such circuits offer smaller size and lower cost,
but must carefully account for signal interference.

7. IC PIN DIAGRAMS-
8. TEST PROCEDURE
a. Make connections as per circuit diagram of fig. 1.1.
b. Switch on the power supply.
c. Give logic inputs to pin1and pin2 and verify result on pin3.
d. Similarly give logic inputs to other input pins and check the respective output pin.
e. Follow similar procedure for IC7432 and IC7404.
9. OBSERVATION TABLE:
10. SELF ASSESSMENT-

a. What is analog signal? How can one distinguish between analog and digital signal?
 Ans- An analog signal is a continuous signal in which one time-varying quantity
(such as voltage, pressure, etc.) represents another time-based variable. In other
words, one variable is an analog of the other. The result is that analog systems allow
for a theoretically infinite number of values to be represented: it can achieve any
value within the parameters governing the system.

Analog signals have continuous variation meaning infinite number of variations are
possible, while digital signals are varied digitally and correspond to only discrete
values of variations.

b. What is a digital system?

Ans- A digital system is a system that stores data in a discrete way, contrary to analog
system, which stores the data in a continuous way. Usually, digital systems store the
information in a binary state; that is, every bit of information can’t have a value other
than zero (off) or one (on). Larger amounts of data are stored as a string of these bits,
which means a set of 0s and 1s together make a meaning to the system.

c. What are Universal GATES and why they are called so?
Ans- The NAND and NOR gates are called universal gates because they can be
combined in various ways to create rest of the logic gates.

d. Draw a circuit containing NAND gate only to realize a XOR and XNOR logic function?
Ans-
XOR gate-

XNOR gate-

e. In a three input NOR gate one input is always high. What will be the output?
Ans- If one input in a NOR gate is always kept high, then the output of the gate will
always be low.

f. In a four input GATE the output is LOW when any of the input is Low then identifies
the GATE.

Ans- The output of an AND gate is only high when all the inputs are high, otherwise it
is low. So, the given gate must be AND gate.

g. Implement Y=AB’C using two input NOR Gate and NAND gate?
Ans-
 Y =AB’C
Y= (A’+B+C’)’
Y= ((AC)’+B)’

h. What effect is there on the circuit when apply positive and negative power supply?
Ans- The circuit will maintain a constant zero voltage.

i. Implement AND, OR, NOR, NOT using NAND Gate only.

Ans-

j. Implement AND, OR, NAND, NOT using OR Gate only.

Ans-
 EXPERIMENT 03

CS3CO29: Digital Electronics Laboratory Experiment no- 03

Experiment Title: Implementation of half adder and full adder circuits.

1. AIM:
a. To understand Binary addition using adder.
b. Implementation of Adder using logic gates.
c. To learn about the combinational circuits.
2. OBJECTIVE: After performing this experiment students will be able to understand:
a. The concept of binary addition and its utility.
b. The utility of logic gates to implement half adder, full adder.
3. PROBLEM STATEMENT:
a. To design the circuit of adder using IC7408, 7404, 7432, 7486.
b. Perform the addition operation using these circuits.
4. Apparatus required:
a. Prototyping board (Bread board).
b. DC power supply 5V battery.
c. Light Emitting Diodes (LED’s).
d. Digital IC’s: 7408 Quad 2 input AND gate, 7432 Quad 2 input OR gate, 7486 Quad 2
input XOR gate.
e. Connecting wires.
5. THEORY:
a. Half Adder: A half adder is a logical circuit that performs an additional operation on
two binary digits. The half adder produces a sum and a carry value which are both binary
digits. The drawback of this circuit is that in case of a multi-bit addition, it cannot cater to
carry.

Truth Table of Half Adder

Inputs Outputs
A B Sum(S) Carry(C)
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
 Boolean expression for sum and carry of half adder

b. Full adder: A full adder is a logical circuit that performs an additional operation on
three binary digits. The full adder produces a sum and a carry value, which are
both binary digits. It can be combined with other full adders (see below) or work
on it's

own.

Truth Table of Full Adder:

X Y Z C S
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1

Expression:
Sum S=A’B’C ’+A’B’C + A’BC ’+AB’C ’+ABC
in in in in in

Carry C =AB+AC +BC

out in in
 Circuit Diagram:
6. Result:
Remarks- Due to some problem in the simulation, the lab
7. Self assessment:

a. Define combinational logic?

Ans- A combinational logic is a type of a digital logic whose output is a pure function of
present input.

b. Define full adder and half adder?

Ans- The half adder is able to add two single binary digits and provide the output plus a carry
value. It has two inputs, called A and B, and two outputs S (sum) and C (carry).
A full adder adds three one-bit binary numbers, two operands and a carry bit. The adder
outputs two numbers, a sum and a carry bit.

c. Implement full adder using half adders.

Ans-

d. How can we implement SOP & POS in full adder?

e. How can we implement the full adder with two half adder & an OR gate?
Ans- A full adder can be implemented by using two half adders in such a manner that the S
and C outputs from first half adder are given as inputs to the second half adder and finally
combining the Cin with C of second half adder through an OR gate.

f. Make the half adder using AND, OR and NOT gate?

Ans-

g. Make the half adder by NAND gate?

Ans-
 EXPERIMENT 04

CS3CO29: Digital Electronics Laboratory Experiment no- 04

Experiment Title: verification of logic functions using various logic gates IC’s.

1. AIM: Implementation of half subtractor and full subtractor circuits.

1. To understand Binary subtraction using subtractor
2. Implementation of subtractor using logic gates.
3. To learn about the combinational circuits.

2. Objective: After performing this experiment students will be able to understand:

a. The concept of binary subtraction and its utility.
b. The utility of logic gates to implement half subtractor, full subtractor
3. Problem statement:
a. To design the circuit of sub-tractor using IC7408,7404,7432,7486
b. Perform the subtraction operation using these circuits.
4. Apparatus required:
a. Prototyping board (Bread board).
b. DC power supply 5V battery.
c. Light Emitting Diodes (LED’s).
d. Digital IC’s: 7486 Quad 2 input XOR gate, 7408 Quad 2 input AND gate, 7404
Hex NOT gates (Inverter), 7432 Quad 2 input OR gate.
e. Connecting wires.

5. Theory
Half Subtractor: A half subtractor is a combinational circuit that subtracts two bits and
produces their difference. Designate the minuend bit by 'x' and the subtrahend bit by 'y'.

Block Diagram

The half subtractor has two outputs. One output generates the difference and will be
designated by the symbol 'D'. The second output, designated 'B' for borrow generates the
binary signal that informs the next stage that a 1 has been borrowed.

Truth Table for Half Subtractor:

X Y B D
0 0 0 0
0 1 1 1
1 0 0 1
1 1 0 0
Expression:
 Circuit Diagram:

Full subtractor:
A full subtractor is a combinational circuit that performs a subtraction between two bits,
taking into account that a 1 may be borrowed by a lower significant stage. This circuit
has three inputs and two outputs. The three inputs x, y, z denotes the minuend,
subtrahend, and the previous borrow. The two outputs D and B represent the difference
and borrow output

respectively.

Circuit Diagram and Truth Table

X Y Z B D
0 0 0 0 0
0 0 1 1 1
0 1 0 1 1
0 1 1 1 0
1 0 0 0 1
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1

Expressions:
Difference
 Borrow

6. Test Procedure:

1. Assemble the circuit of fig.1 on breadboard using IC s.

2. Give the logic inputs using 5V power supply.

3. Test the sum output S and carry output C for all combinations of inputs.

4. Make the truth table for the circuit.

5. Similarly repeat steps 1-4 for fig.

7. Result:
8. Self assessment:
a. How can we convert full adder into full subtract?
Ans-
If in a full adder circuit, an invertor is added on B input and Cin is kept at high every
time by supplying a constant positive voltage, the resulting circuit will be a full
subtractor. The principle is that for converting A+B to A-B, we need to add 2’s
complement of B with A.
b. Implement the full subtractor with two half subtractor and an OR gate?
Ans-

EXPERIMENT 05

CS3C029 : Digital Electronics Laboratory Experiment no- 05

Experiment Title: To Design and verify the truth table of code conversion from BCD to
Excess-3 using basic Logic Gates.

1. OBJECTIVE:
a. Design of different combinational circuits and their applications using basic logic
gates.
b. Creation and observation of the excess 3 code representation sequence
c. Exercising the design of code conversion logic circuits,
d. Creating the truth table of conversion functions from BCD to EXCESS 3 code
e. Developing skills in simplification of specified logical functions
2. Apparatus Required:
a. Prototyping board (breadboard)
b. DC Power Supply 5V Battery
c. Light Emitting Diode (LED)
d. Digital ICs: 7404 :Hex Inverter 7408: Quad 2 input AND
7432: Quad 2 input OR
e. Connecting Wires
3. Theory:
Code Converters: A code converter is a combinational circuit that must be inserted
between the two systems, to make them compatible even though each uses different code
for same information. It means that a code converter is a code translator from one code to
the other. The code converter is used since to systems using two different codes but they
need to use the same information. So the code converter is the solution.
BCD Codes: Numeric codes represent numeric information i.e. only numbers as a series
of 0’s and 1’s. Numeric codes used to represent decimal digits are called Binary Coded
Decimal (BCD) codes. A BCD code is one, in which the digits of a decimal number are
encoded-one at a time into group of four binary digits. There are a large number of BCD
codes in order to represent decimal digits0, 1, 2 …9, it is necessary to use a sequence of
at least four binary digits. Such a sequence of binary digits which represents a decimal
digit is called code word.
EXCESS 3 Codes: It is a non-weighted code. It is also a self-complementing BCD code
used in decimal arithmetic units. . The Excess-3 code for the decimal number is
performed in the same manner as BCD except that decimal number 3 is added to the each
decimal unit before encoding it to binary.

Truth Table for BCD to Excess -3 Code Conversion:

INPUTS(BCD) OUTPUTS(Excess-3)
A B C D W X Y Z
0 0 0 0 0 0 1 1
0 0 0 1 0 1 0 0
0 0 1 1 0 1 0 1
0 0 1 0 0 1 1 0
0 1 1 0 0 1 1 1
0 1 1 1 1 0 0 0
0 1 0 1 1 0 0 1
0 1 0 0 1 0 1 0
1 1 0 0 1 0 1 1
1 1 0 1 1 1 0 0

Expression:
Z=D
 Y = CD+C’D’=CD(C+D)’
X = B’C+B’D+BC’D’= B’(C+D) +BC’D
W = B’(C+D) +B(C+D)’

4. Circuit Diagram:

Fig: Circuit Diagram of BCD to EXCESS 3 code converter

5. Procedure:
a. Collect the components necessary to accomplish this experiment.
b. Plug the IC chip into the breadboard.
c. Connect the supply voltage and ground lines to the chips. PIN7 = Ground and PIN14 =
+5V.
d. Make connections as shown in the respective circuit diagram.
e. Connect the inputs of the gate to the input switches of the LED.
f. Connect the output of the gate to the output LEDs.
g. Once all connections have been done, turn on the power switch of the breadboard
h. Operate the switches and fill in the truth table (Write "1" if LED is ON and "0" if L1
is OFF apply the various combinations of inputs according to the truth table and observe the
condition of Output LEDs.

6. Observation Table: Input Variable: A B C D

Output Variable: W X Y Z
LED ON: RED Light: Logic 1
LED OFF: Green Light: Logic 0

INPUTS(LED) OUTPUTS(LED)
A B C D W X Y Z
 0 0 0 0 0 0 1 0
0 0 0 1 0 1 0 1
0 0 1 0 0 1 0 0
0 0 1 1 0 1 1 1
0 1 0 0 0 1 1 0
0 1 0 1 1 0 0 1
0 1 1 0 1 0 0 0
0 1 11 1 1 0 1 1
1 0 0 0 1 0 1 0
1 0 0 1 1 1 0 1
Calculation:
K-map

Boolean Expression: W = A + BC + BD
X =B'C + B'D + BC'D'
Y = CD + C'D'
Z = D'
7. Result and Discussions: Excess-3 code is a 4-bit un-weighted code and can be
obtained from the corresponding value of BCD code by adding three to each coded
number.Excess-3 code is self complementing in nature because 1’s complement of the coded
number yields 9’s complement of number itself.
8. Conclusion: BCD to Excess-3 code converter has been designed using basic logic
gates and its truth table verified.

9. Self assessment:

a. Why Excess-3 code is known as self complementary code?

Ans- In Excess-3 code we get the complement of a number by just complementing
each bit, that means by replacing a '0' by '1' and '1' by '0'.

EXPERIMENT 06

CS3C029: Digital Electronics Laboratory Experiment no- 06

Experiment Title: Implement the logic circuit to convert Binary to Gray & Gray to Binary
codes.

1. AIM:
a. To understand the implementation of Gray to binary conversion.
b. To understand the implementation of binary to gray conversion.
c. To gain knowledge about the utility of different codes.
2. OBJECTIVES: Design & Verify code converter.
3. PROBLEM STATEMENT:
a. To Design & Verify Binary to Gray and Gray to Binary code converter.
b. To design truth table for circuits stated in point 1.
4. PREREQISITE:
a. Knowledge of Gray code.
b. K-Map method for circuit design.
5. APPARATUS REQUIRED:
a. Prototyping board (Bread board).
b. DC power supply 5V battery.
c. Light Emitting Diodes (LED’s).
d. 7486 Quad 2 input XOR gate.
e. Connecting wires.
6. THEORY: Code is the symbolic representation of discrete information, which may
be present in the form of numbers, letters or physical quantities. The symbols used are the
binary digits 0 & 1 which are arranged to the rules of codes. These codes are used to
communicate information to a digital computer & to retrieve messages from it. A code is use
to enable an operator to feed data into a computer directly in the form of decimal numbers,
alphabets & special characters. The computer converts these data into binary codes & after
computation transform the data into its original format.
Gray code: The gray code is non-weighted and is not an arithmetic code; that is, there is
no specific weights assigned to the bit positions. The important feature of the gray code
is that it exhibits only a single bit change from one code number to next. Due to this
property Gray codes are also called as Unit Distance code & reflective codes. This
property is important in many applications, such as shaft position encoders, where error
susceptibility increases with the number of bit changes between adjacent numbers in a
sequence.
Conversion of a binary code to gray code:
a. The first bit (MSB) of the gray code is the same as the first bit of the binary no.
b. The second bit of the gray code equals the EX-OR of the first & second bits of
the binary no. i.e. it will be 1 if these binary code bits are different & 0 if they are
same.
c. The third gray code bit equals the EX-OR of the second & third bits of the binary no.
& so on.
Conversion of gray code to Binary code:
a. The first bit (MSB) of the binary code is the same as the first bit of the gray code bit.
b. If the second gray bit is 0, the second binary bit is same as that of the first binary; if the
second gray bit is 1, the second binary bit is the inverse of the first binary bit.
c. Step 2 is repeated for each successive bit.

7. TRUTH TABLES:

Binary to Gray Converter: Gray to Binary Converter:

Binary Gray
B0 G2 G1 G0
0 0 0 0
1 0 0 1
0 0 1 1
1 0 1 0
0 1 1 0
1 1 1 1
0 1 0 1
1 1 0 0
8. CIRCUIT DIAGRAMS:

9. TEST PROCEDURE:
a. Prepare the circuit diagram required for both the logic conversions.
b. Make connections as per the obtained circuit diagram for binary to Gray
code conversion.
c. Switch on the power supply.
d. Give logic inputs to pin1, pin2, pin4& pin 5 of XOR gates. Verify the result on pin3,
pin6, & pin8.
e. Check the result for Binary code 0000 to 1111 & obtain its corresponding Gray code.
f. Prepare the Truth Table.
g. Follow the same procedure to obtain the logic conversion for the Gray to Binary code
conversion also.
11. RESULT:
 G0
LL*B i if ISB}'
12. SELF ASSESSMENT
a. Give a list of various types of codes.

Ans- The various types of codes are:

  Weighted codes
 Non-Weighted codes
 Binary coded Decimal code
 Alpha-numeric codes
 Error detecting codes
 Error correcting codes

b. Give application of gray codes?

Ans-Gray codes are widely used to prevent spurious output from electromechanical switches
and to facilitate error correction in digital communications such as digital terrestrial television
and some cable TV systems.

c. Why the gray codes are called reflective codes?

Ans- The gray codes are called reflective codes because of the fact that the first n/2 values
compare with last n/2 values only in reversed order of bits.

d. Explain the use of codes in digital computer.

Ans- Since digital circuits only respond to discrete values of the signals, codes being only in
the form of 0 and 1 provide a method of communication between different computers as well
as within the architecture of the computer itself, amongst various devices.

e. Convert into gray code : (100111101)

Ans- To convert binary into gray code, we have to take XOR of every bit with the
consecutive bit starting from LSB to the MSB. The MSB however is excluded from the
process and is written the same in the gray code. Following the same, gray code for the given
binary number is 110100011.
f. Convert the following to binary code: (11110001)

Ans- The MSB of the gray code is copied as the same, the resulting binary bit is now XORed
with the next gray bit and so on. Thus, the binary of given gray code is 10100001.

EXPERIMENT 07

CS3C029 : Digital Electronics Laboratory Experiment no- 07

Experiment Title: Verification of De-Morgan’s theorem.

1. AIM: To understand the implementation De-Morgan’s theorem.

2. OBJECTIVES: Design & Verify De-Morgan’s theorem for two variables.

3. APPARATUS REQUIRED:
a. Bread board.
b. DC power supply 5V battery.
c. Light Emitting Diodes (LED’s).
d. Electronic IC’s: 7408 Quad 2 input AND gate, 7432 Quad 2 input OR gate, 7404 Hex
NOT gates (Inverter), 7400 Quad 2 input NAND gate, 7402 Quad 2 input NOR gate.
e. Connecting wires.

4. THEORY: De Morgan's Theorem: It states that the complement of a function is

obtained by interchanging AND and OR operators and complementing each literal.
a.
b.
These can be proved by the use of truth tables.

Proof of
X Y X+Y X' Y' X'.Y' (X+Y)'

0 0 0 1 1 1 1
0 1 1 1 0 0 0
1 0 1 0 1 0 0
1 1 1 0 0 0 0
These can be proved by the use of truth tables.

Proof of
X Y X.Y X' Y' X'+Y' (X.Y)'
0 0 0 1 1 1 1
0 1 0 1 0 1 1
1 0 0 0 1 1 1
1 1 1 0 0 0 0

6. PROCEDURE:
a. Design the left hand side of the expression on the bread board.
b. Design the right hand side of the expression on the bread board.
c. Provide inputs and verify the truth table.
7. RESULT:

8. SELF ASSESSMENT:
a. Obtain the complement of using De-Morgan’s theorem.
Ans- ((AB+CD)E)’= (AB+CD)’ + E’
(AB)’(CD)’+E’
(A’+B’).(C’+D’)+E’
b. Simplify the expression using De-Morgan’s theorem.
 Ans- (x+y)’(x’+y’)’= (x’y’)(xy)=0

EXPERIMENT 08

CS3C029 : Digital Electronics Laboratory Experiment no-

08
Experiment Title: Implementation of RS, D, JK AND T FLIP-FLOP.

1. AIM
a. To learn the various types of sequential circuits.
b. To test the functioning of the various flip flops.
c. To understand various conditions & problems related to a particular flip flop.
d. To understand the utility of logic gates in flip flops.
e. To gain knowledge about the Various IC’s used for making flip flops.

2. OBJECTIVES: After completing the experiment, the students should be able:

a. To analyse the working of flip flops
b. To understand the use of flip flops in Shift registers.
c. Gain knowledge about various applications of flip flops.

3. PROBLEM STATEMENT: To learn the functioning of various flip flops using

IC7400 (quad 2-input NAND gate), IC7402 (quad 2-input NOR gate) & IC7411 (Triple 3-
input AND Gate)

4. APPARATUS REQUIRED: Bread Board, 5V DC power supply, Light Emitting

Diode (LED), IC7400 (quad 2-input NAND gate), IC7402 (quad 2-input NOR gate) and
IC7411 (triple 3-input AND gate), connecting leads.

5. CIRCUIT DIAGRAM

Fig.1 Clocked RS flip-flop Fig.2 D flip-flop

 Fig.3 JK flip-flop Fig.4 T flip-flop

6. THEORY: A digital system consists of two types of circuits, namely:-

a. Combinational Circuit
b. Sequential Circuits
Combinational Circuits
The logic circuits whose outputs at any instant of time depend only on the input signals
present at that time are known as combinational circuits. It has no memory element. It
consists of input variables, output variables & logic gates. On receiving the input signals
the logic gates generate the outputs. By using minimization technique such as K-map,
tabular method or using Boolean properties.
Sequential circuits
The logic circuits whose output at any instant of time depend not only on the present
inputs but also on the past outputs are called sequential circuits. In sequential circuits, the
output signals are feed back to the input side. Thus an output signal is a function of the
present input signals & a sequence of the past input signals i.e. the past output signals. It
consist of a combinational circuit to which memory elements are connected to form a
feedback path. The memory elements are the devices capable of storing binary
information within them. The binary information stored in the memory elements at any
given time defines the stste of the sequential circuit. The sequential circuit receives
binary information from external inputs. These inputs, together with the present state of
the memory elements, determine the binary value at the output terminals.They also
determine the condition for changing the state in the memory elements. There are two
main types of sequential circuits.
a. synchronous sequential circuits
b. Asynchronous sequential circuits
Flip-Flops:
Flip-flops can be either simple (transparent) or clocked. Simple flip-flops can be built
around a pair of cross-coupled inverting elements: The more advanced clocked (or non-
transparent) devices are specially designed for synchronous (time-discrete) systems; such
devices therefore ignores its inputs except at the transition of a dedicated clock signal
(known as clocking, pulsing, or strobing). This causes the flip-flop to either change or
retain its output signal based upon the values of the input signals at the transition. Some
flip-flops change output on the rising edge of the clock, others on the falling edge.
a. Set-Reset flip-flops (SR flip-flops): The most fundamental latch is the simple SR latch
(or simple SR flip-flop), where S and R stand for set and reset respectively. It can be
constructed from a pair of cross-coupled NOR (negative OR) logic gates. The stored bit is
present on the output marked Q.
Normally, in storage mode, the S and R inputs are both low, and feedback
maintains the Q and Q outputs in a constant state, with Q the complement of Q. If
S (Set) is pulsed high while R is held low, then the Q output is forced high, and
 stays high even after S returns low; similarly, if R (Reset) is pulsed high while S is
held low, then the Q output is forced low, and stays low even after R returns low.

S R Action

0 0 Keep state

0 1 Q=0

1 0 Q=1

1 1 Unstable combination

b. D flip-flop: The Q output always takes on the state of the D input at the moment
of a rising clock edge or at the moment of the falling clock edge but not both at
the falling and rising edges and never at any other time. It is called the D flip-flop
for this reason, since the output takes the value of the D input or Data input, and
Delays it by one clock count. The D flip-flop can be interpreted as a primitive
memory cell.

Clock D Q Q prev

Rising edge 0 0 X

Rising edge 1 1 X

Non-Rising X constant

('X' denotes a Don't care condition, meaning the signal is irrelevant)

c. JK flip-flop: The JK flip-flop augments the behavior of the SR flip-flop (J=Set,
K=Reset) by interpreting the S = R = 1 condition as a "flip" or toggle command.
Specifically, the combination J = 1, K = 0 is a command to set the flip-flop; the
combination J = 0, K = 1 is a command to reset the flip-flop; and the combination
J = K = 1 is a command to toggle the flip-flop, i.e., change its output to the
logical complement of its current value. Setting J = K = 0 does NOT result in a D
flip-flop, but rather, will hold the current state. To synthesize a D flip-flop,
simply set K equal to the complement of J. The JK flip-flop is therefore a
universal flip-flop, because it can be configured to work as an SR flip-flop, a D
flip-flop, or a T flip- flop.
 J K Q next Comment

0 0 Q hold state

0 1 0 reset

1 0 1 set

1 1 Q’ toggle

is the clock input, T is the toggle input and Q is the stored data output. If the T input
is high, the T flip-flop changes state ("toggles") whenever the clock input is
strobed. If the T input is low, the flip-flop holds the previous value. And can be
described in a truth table:

T Q Q next Comment

0 0 0 hold state (no clk)

0 1 1 hold state (no clk)

1 0 1 toggle

1 1 0 toggle

7. TEST PROCEDURE:
a. Make the circuit connections as shown in figure.1.
b. Test the circuit and prepare the truth table.
c. Repeat same steps for rest of the flip-flops.
8. OBSERVATIONS: Record the observations in tabular form as per the need-
GND
9. RESULT: Hence we have observed the difference between working of various
counters.

10. SELF ASSESSMENT:

a. Explain the problem associated with SR Flip Flop.
Ans- When both set and reset in an SR flip-flop are set to high, it gives an invalid output and
the state of flip-flop is referred to as invalid state.

b. What are the applications of Flip Flops?

Ans- These are the various types of flip-flops being used in digital electronic circuits and the
applications of Flip-flops are as specified below.
 Counters.
 Frequency Dividers.
 Shift Registers.
 Storage Registers.
 Bounce elimination switch.
 Data storage.
 Data transfer.
 Latch.

c. What do you mean by edge triggering?

Ans- In edge triggering the circuit becomes active at negative or positive edge of the
clock signal. For example, if the circuit is positive edge triggered, it will take input at
exactly the time in which the clock signal goes from low to high.

d. What advantages does a JK flip flop have over an SR Flip Flop?

Ans- In SR flip-flop when both inputs are set to high, the flip flop gives invalid output,
However in JK flipflop, on achieving the invalid state, the flip-flop toggles its output.

EXPERIMENT 09

CS3C029: Digital Electronics Laboratory Experiment no- 09

Experiment Title: Implementation of various types of Counters

1.AIM:
To Analyse Counters.
To understand the functioning of combinational circuits.
2.OBJECTIVES
Construct following from separate JK flip-flops
a. MOD-n ripple counter
b. Ring counter
c. Johnson counter
d. Presettable Up-Down Counter.
3.PROBLEM STATEMENT:
1. To understand the concept of counter designing.
2. To construct following counters using JK flip-flops.
I) MOD-n ripple counter.
ii) Ring counter.
 iii) Johnson counter.
3. To verify the operation of Up-Down counter.

4. PRE REQUISITES:
1 Knowledge of Flip-flops.
2 Knowledge of excitation table of flip-flops
3 Counter Designing knowledge.

5. APPARATUS REQUIRED:
1 Counter trainer board.
2 Connecting patch cords.

6. THEORY:
A counter is a device that counts a specific sequence.
It can be implemented through a sequential digital logic circuit.
“A sequential circuit that goes through a prescribed sequence of states upon the
application of input pulses is called a Counter.”
The input pulses, called count pulses, may be clock pulses, or they may originate
from an external source and may occur at prescribed intervals of time or at random.

Types of counter:
Counters come under two categories:
1. Asynchronous or Ripple counter.
2. Synchronous counters.
In a ripple counter, the flip-flop out put transition serves as a source of triggering for
other flip-flops.In a synchronous counter, the input pulses are applied to all CP (count pulse)
inputs of all flip-flops.

Asynchronous counters
In Asynchronous counters clock pulses to all the flip-flops are not synchronized i.e. not
applied at the same time.

Ripple counter:
A binary ripple counter consists of a series connection of complementing flip-flops (T
or JK), with the output of each flip-flop connected to the CP input of the next higher order
flip-flop. The flip-flop holding LSB receives the incoming count pulses.
The diagram of Mod N ripple counter is shown below.
 1. Fig. 1.Ripple Counter

Truth table of MOD-8 Ripple counter:

Output Clock pulses

0 1 2 3 4 5 6 7 8
1. Q0 0 1 0 1 0 1 0 1 0
Q1 0 0 1 1 0 0 1 1 0
Q2 0 0 0 0 1 1 1 1 0

Synchronous Counter:
In this counter clock pulses are applied to the CP input of all the flip-flops. The
common pulse triggers all the flip-flops simultaneously, rather than one at a time in
succession as in a ripple counter.
There are two types of Synchronous Counter:
1. Ring Counter
2. Johnson Counter

Ring Counter:
A ring counter is a circulating shift register with only one flip-flop being set at any
particular time, all others are cleared .The single bit is shifted from one flip-flop to the other
to produce the sequence of timing signals.

The fig. shows 4 bit shift register connected as a ring counter. The initial value of register is
1000, which produce the variable to. The single bit is shifted right with every clock pulse &
circulates back from T3 to To .each flip-flop is in the 1 state once every 4 clock pulses
&produces 1 of the 4 timing signal shown in below fig.

Truth table of Ring counter:

Output Clock pulses

0 1 2 3 4
Q0 1 0 0 0 1
Q1 0 1 0 0 0

A k-bit ring counter circulates a single bit among the flip-flops to provide k
distinguishable states. The no. of states can be doubled if the shift register is connected as a
switch tail ring counter. A switch-tail ring counter is a circular shift register with the
complemented output of last flip-flop connected to input of the 1 flip-flop.
st

Below fig. shows construction of Johnson counter.

Johnson Counter
A Johnson counter is a k-bit switch tail ring counter with 2k decoding circuit to
provide o/p for 2k timing signals. One disadvantage of the above circuit. is that, if it finds
itself in an unused state, it will persist in moving from 1 invalid state to another & never find
its way to valid state. This difficulty can be corrected by modifying circuit. Johnson counter
can be constructed for any no. of timing sequences. The number of flip-flop needed is half the
number of timing signals.

Truth table of Johnson counter:

Output Clock pulses

0 1 2 3 4 5 6 7 8
3. Q0 1 1 1 1 0 0 0 0 1
 Q1 0 1 1 1 1 0 0 0 0

IC- 74193:
This counter can be described as a MOD-16, presettable up/down counter with synchronous
counting, asynchronous preset, and asynchronous master reset.

Pin details:
Pin Description
CPu Count up clock input
CPd Count down clock input
MR Asynchronous master reset input
Asynchronous parallel load input
P0-P3 Parallel data inputs
Q0-Q3 Flip-flop outputs
TCd Terminal count down output

Modes select table for Up-Down counter:

MR CPu CPd Mode
H X X X Asynchronous reset
L L X X Asynchronous preset
L H H H No change
L H ↑ H Count Up
L H H ↑ Count Down
 Circuit Diagram for UP-Down Counter

Observations:
Self-Assessment:
1) What does the term Asynchronous mean in relation to counter?

Ans- Asynchronous means that the flip-flops in the counter are not all triggered
simultaneously with the same clock pulse. Different flip-flops are triggered with different
clock pulses.

2) How does synchronous counter differ from asynchronous counter? Which is better?

Ans- The flip-flops in synchronous counters all triggered by the same clock pulse
simultaneously while asynchronous counters are triggered by different clock pulses. This
makes synchronous counters faster and hence better than asynchronous.

3) What is the terminal count of a 4-bit Up-Down counter in up mode? In

Down mode? What will be the state after the terminal count in the Down mode?

Ans- The terminal count of a 4-bit UP-Down counter in up mode is 15(1111) and in down
mode is 0(0000). After the terminal count, the counter resets to 15(1111).
4) How many states does a modulus-14 counter have? What is the minimum number of flip-
flops required?

Ans- A modulus-14 counter will have 14 states. Such a counter will have 4 flip-flops, since
number of states of a counter are given by 2n where n is the number of flip-flops.

EXPERIMENT 10

CS3CO29: Digital Electronics Laboratory Experiment no- 10

Experiment Title: Implementation of 4- bit shift register using D FLIP-FLOP

1. AIM:
To implement a 4-bit shift register using IC7474 (Dual D flip-flop with PRESET and
CLEAR inputs)

2. OBJECTIVES: After completing the experiment, the students should be able to

analyze the working of shift registers.
3. PROBLEM STATEMENT:
1. To understand the concept of shift register using ICs.
2. To construct following shift registers using kit.
a. Right shift.
b. Left shift
4. PRE REQUISITES:
1. Knowledge of Flip-flops.
2. Knowledge of excitation table of flip-flops
3. Working of shift registers.

5. APPARATUS REQUIRED: Trainer Board, IC7474 (Dual D flip-flop with PRESET

and CLEAR inputs), connecting leads.

6. THEORY: The term register can be used in a variety of specific applications,

but in all cases it refers to a group of flip-flops operating as a coherent unit to hold data.
This is different from a counter, which is a group of flip-flops operating to generate new
data by tabulating it.
In this context, a counter can be viewed as a specialized kind of register, which
counts events and thereby generates data, rather than just holding the data or
changing the way it is handled. More commonly, however, counters are treated
separately from registers. The two are then handled as separate concepts which
work together in many applications, and which have some features in common.
The demonstration circuit below is known as a shift register because data is
shifted through it, from flip-flop to flip-flop. If you apply one byte (8 bits) of data
to the initial data input one bit at a time, and apply one clock pulse to the circuit
after setting each bit of data, you will find the entire byte present at the flip-flop
outputs in parallel format. Therefore, this circuit is known as a serial-in, parallel-
out shift
 register. It is also known sometimes as a shift-in register, or as a serial-to-parallel
shift register.
By standardized convention, the least significant bit (LSB) of the byte is
shifted in first. As you would no doubt expect, the counterpart to the shift register
above is the parallel-in, serial-out shift register, sometimes called a shift-out
register.

CIRCUIT DIAGRAM:

Fig.1 shift register

Fig.2 IC 7474 pin diagram

7. TEST PROCEDURE:
1. Make the circuit connections as shown in figure.
2. Give the clock pulse input and observe the output.
3. Observe the functioning of register with each clock pulse input.
8. RESULT:
9. SELF ASSESSMENT:
1. Draw the logic diagram of a universal shift register?
Ans-
 2. Make the logic diagram of a serial adder in which the two numbers to be added
are stored in two shift registers.
Ans-
Shift Control
Shift Register
CLK A

y FA

Serial
Input
Shift Register B

Clear