MODULE 1
1. Learn to find the l's complement and 2's complement representations of numbers
2. State and prove De Morgan's Theorem
3. Learn to perform conversion from decimal to binary, to octal, to hex and vice versa
4. Learn to perform conversion from binary to deimal, to octal, to hex and vice versa
5. Learn to perform conversion from octal to binary, to decimaal, to hex and vice versa
6. Learn to perform conversion from hex to binary, to octal, to decimal and vice versa
7. Perform the addition and subtraction operations using 1's,2's,9's,10's complement
representation
8. Perform addition and subtraction of (1)hex (2)octal
9. Using K Map simplify the function F(w, x. y, z) = SIGMA (0,1,2,3,5,7,8,9,10, 13, I5) and
Express the above function in product of maxterms form. (learn similar problems)
MODULE 2
10. The Exclusive-OR gate is represented by the Boolean algebra expression AB' + A'B. Using
DeMorgan's theorem and other Boolean algebra rules/laws derive an expression for
Exclusive-NOR gate.
11. Design a circuit using NAND gates for implementing EXCLUSNE-OR EXCLUSNE-NOR
function
12. Simplify the function f(A,B,C,D) =l(0,1,2,8,72,L3,14) +d(3,5,10,15) with Karnaugh map.
d(.) refers to don't care conditions. Implement the simplified function using NAND
gates.(learn similar problems)
13. Design a half adder circuit using any universal gate.
14. Using tabulation method simplify the function F(w,x,y,z) = SIGMA
(0,2,4,5,6,7,8,12,13,14,15) (learn similar problems)
15. Express the following functions in a canonical form (1)F=D+BC' (2) F=AB'+BC'
16. Prove that x(x + y) = x using Boolean algebra postulates and rules.
17. Implement AND, OR, NOT gate using only NAND/NOR gates.
18. Find the irumber of possible unique Boolean functions which can be formed using n
Boolean variables? Explain.
MODULE 3
19. How does look-ahead carry reduce the carry propagation time in a binary parallel adder?
Derive the Boolean functions for the carry outputs at different stages ofa 4-bit look-ahead
carry generator.
20. Design a 4-bit BCD adder and draw the block diagram
21. Design an even parity code generator using XOR gates for a 4-bit code.
22. Explain the operation of a 4-bit magnitude comparator circuit with a neat logic diagram.
23. Construct a full adder using two half adder circuits.
24. Design a 3-bit Gray to binary code converter
25. Design an octal-to-binary encoder circuit using OR gates
26. Draw the logic diagram of a 2xl multiplexer circuit
27. Derive the characteristic equation of a D flip flop from its excitation table.
28. Design a full subtractor circuit.
29. Design a code converter for converting a BCD to excess-3
30. Design a2bit magnitude comparator.
31. Explain BCD adder using a block diagram.
32. Design a 2 bit magnitude comparator.
MODULE 4
33. With a circuit diagram, explain the working of master-slave JK flip-flop.
34. Design a synchronous counter with the following binary sequence 0, 1,3,7,6,4 and repeat.
Use T flipflops.
35. What are ripple counters?
36. Specify the characteristics table and characteristic equation of RS flip-flop.
37. Draw the logic diagram and timing diagram of a mod-5 ripple counter.
38. Differentiate synchronous counters and asynchronous counters. Give examples.
39. Convert SR to T flipflop.
40. How is a sequential circuit different from a combinational circuit? Give an example for each
circuit.
41. Distinguish between a ring counter and Johnson counter
42. With a logic diagram explain how a master slave flip flop overcomes race around problem.
43. Explain the working of 4-bit register with parallel load with the help of a diagram.
44. Design a 2 bit synchronous counter.
45. Design a 4-bit binary asynchronous counter using JK flipflops. Give the state diagram and
logic diagram.
46. Draw the state diagram and logic diagram of a BCD ripple counter.
47. Design a 3 bit synchronous up-down counter
48. Design a 4-bit binary asynchronous counter using JK flipflops. Give the state diagram and
logic diagram.
49. Design a synchronous BHD counter. Give the excitation table and circuit diagram
MODULE 5
50. Descrbe the working of Programmable Logic Aray (PLA) with a block diagram.
51. Convert (17.5)10 to 32-bit single precision IEEE 754 binary floating point standard.
52. Design a 4-bit shift register using D flipflops.
53. Describe Read Only Memory with the help of a block diagram.
54. When do you implement a combinational circuit using ROM and when do you implement a
combinational circuit using PLA in preference to ROM.
55. Find the modulus of 8-bit Ring, Johnson and Synchronous counter.
56. Explain the working of a 3 stage Johnson ring counter with a block diagram
57. Explain the working of a 3 bit bidirectional shift register with parallel load
58. Illustrate the algorithm for addition and subtraction of two floating point numbers.
59. Illustrate the algorithm for addition of two's complement numbers. State why 2's
complement representation is preferred for binary arithmetic operations
60. Design 4 bit Johnson counter and show its timing sequence
61. Explain the representation of floating point numbers. State the algorithm for floating point
addition.
62. Illustrate the algorithm for addition and subtraction two binary numbers in sign magnitude
form.
63. Dra{' a flowchart and explain the addition/subtraction of binary numbers in sign-rnagnitude
fonm.
64. Implernent a 4-bit bidirectionat shift register with parallel load.
65. Design a BCD to Excess -3 code& converter using ROM.
