Control Unit

UNIT-3
 CONTROL UNIT
Control Unit is the part of the computer’s central processing unit (CPU), which directs
the operation of the processor. It was included as part of the Von Neumann
Architecture by John von Neumann.
It is the responsibility of the Control Unit to tell the computer’s memory, arithmetic/logic
unit and input and output devices how to respond to the instructions that have been
sent to the processor.
It fetches internal instructions of the programs from the main memory to the processor
instruction register, and based on this register contents, the control unit generates a
control signal that supervises the execution of these instructions.
CONTROL UNIT TYPES

Hardwired Control Unit: When the control signals are generated by hardware
using conventional logic design techniques, the control unit is said to be
hardwired.
Micro programmed control unit: A control unit whose binary control variables
are stored in memory is called a micro programmed control unit.
 HARDWIRED CONTROL UNIT MICROPROGRAMMED CONTROL UNIT

Hardwired control unit generates the control signals needed for the Micrprogrammed control unit generates the control signals with the
processor using logic circuits help of micro instructions stored in control memory

Hardwired control unit is faster when compared to microprogrammed

This is slower than the other as micro instructions are used for
control unit as the required control signals are generated with the help
generating signals here
of hardwares

Difficult to modify as the control signals that need to be generated are Easy to modify as the modification need to be done only at the
hard wired instruction level

Less costlier than hardwired control as only micro instructions are

More costlier as everything has to be realized in terms of logic gates
used for generating control signals

It cannot handle complex instructions as the circuit design for it

It can handle complex instructions
becomes complex

Only limited number of instructions are used due to the hardware

Control signals for many instructions can be generated
implementation

Used in computer that makes use of Reduced Instruction Set Used in computer that makes use of Complex Instruction Set
Computers(RISC) Computers(CISC)
HARDWIRED CONTROL UNIT
MICROPROGRAMMED CONTROL UNIT
 Organization of micro programmed control unit

The general configuration of a micro-programmed control unit is demonstrated in the block

diagram of Figure The control memory is assumed to be a ROM, within which all control
information is permanently stored.

External
input
Next- Control
Control
Control Control Control
address word
word
address memory data
generator (ROM) register
(sequencer) register

Next-address information

Figure Microprogrammed control organization

The control memory address register specifies the address of the microinstruction,

Control data register (CDR)- or pipeline register

Holds microinstruction read from control memory
Allows execution of microoperations specified by control word simultaneously
with generation of next microinstruction
The microinstruction contains a control word that specifies one or more microoperations for the data processor.
Once these operations are executed, the control must determine the next address.
The location of the next microinstruction may be the one next in sequence, or it may be located somewhere else
in the control memory

Next address generator (microprogram sequencer)

Determines address sequence for control memory
Microinstruction

Thus a microinstruction contains bits for initiating microoperations in the data

processor part and bits that determine the address sequence for the control
memory.
The next address generator is sometimes called a micro-program sequencer, as
it determines the address sequence that is read from control memory.
 Microprogram Example
Computer instruction format
15 14 11 10 0
I Opcode Address

Four computer instructions

Symbol OP-code Description
EA is the effective address
ADD 0000 AC ← AC + M[EA]
BRANCH 0001 if (AC < 0) then (PC ← EA)
STORE 0010 M[EA] ← AC
EXCHANGE 0011 AC ← M[EA], M[EA] ← AC

Microinstruction Format
3 3 3 2 2 7
F1 F2 F3 CD BR AD

F1, F2, F3: Microoperation fields

CD: Condition for branching
BR: Branch field
AD: Address field

11
ADDRESS SEQUENCING

Address sequencing capabilities required in control

unit
Incrementing CAR
Unconditional or conditional branch, depending
on status bit conditions
Mapping from bits of instruction to address for
control memory
Facility for subroutine call and return
 Instruction code

Mapping
logic

Status MUX
Branch Multiplexers
bits logic select

Subroutine
Register
Control Address Register (SBR)
(CAR)

I Incrementer

Control memory (ROM)

select a status

bit

Microoperations
Branch address 14
Mapping of Instruction

Each computer instruction has its own microprogram routine stored in a given
location of the control memory

Mapping
Transformation from instruction code bits to address in control memory
where routine is located
Mapping of Instruction

A special type of branch exists when a microinstruction specifies a branch to the first
word in control memory where a microprogram routine for an instruction is located.
The status bits for this type of branch are the bits in the operation code part of the
instruction.
For example, a computer with a simple instruction format as shown in figure has an
operation code of four bits which can specify up to 16 distinct instructions.
Assume further that the control memory has 128 words, requiring an address of seven
bits.
 Contd..
One simple mapping process that converts the 4-bit operation code to a 7-bit address for control memory is
shown in figure.

This mapping consists of placing a 0 in the most significant bit of the address, transferring the four
operation code bits, and clearing the two least significant bits of the control address register.

This provides for each computer instruction a microprogram routine with a capacity of four
microinstructions.
MAPPING OF INSTRUCTIONS TO MICROROUTINES

Mapping from the OP-code of an instruction to the

address of the Microinstruction which is the starting
microinstruction of its execution microprogram

Machine OP-code
Instruction 1 0 1 1 Address

Mapping bits 0 x x x x 0 0
Microinstruction Figure : Mapping from instruction
address 0 1 0 1 1 0 0 code to microinstruction address

Mapping function implemented by ROM or PLA

OP-code

Mapping logic

Control address register

Control Memory
 Mapping of Instruction
Example
Mapping 4-bit operation code to 7-bit address

OP-codes of Instructions
ADD 0000
AND 0001
LDA 0010 Control
memory
Mapping bits 0 xxxx 00
Address
0 0000 00 ADD Routine

0 0001 00 AND Routine

0 0010 00 LDA Routine

 Design of Control Unit

MICROPROGRAM SEQUENCER
External
(MAP)

L
I0 3 2 1 0
Input Load
I1 S1 MUX1 SBR
logic
T S0

1 Incrementer
I MUX2 Test
S
Z Select
Clock CAR

Control memory

Microops CD BR AD
... ...
Microinstruction Types

HORIZONTAL MICROINSTRUCTION
VERTICAL MICRO;INSTRUCTION