Hello everyone, we are Group B, and we have selected Topic 2, **"8086 Addressing Modes and

Instruction Set"** for our presentation. Now, we will introduce the 8086 microprocessor and its
addressing modes. This is the block diagram of the 8086 microprocessor.

Next slide, please.

Now, we will look at the features of the 8086 microprocessor.

- The 8086 microprocessor is an **8-bit/16-bit** microprocessor designed by Intel in the late 1970s.

- It is based on **CISC architecture**, supporting a wide range of instructions, allowing multiple

operations in a single instruction.

- It has a **20-bit address bus**, capable of addressing up to **1 MB of memory**, and a **16-bit
data bus** for data transfer.

- The 8086 features **segmented memory architecture**, where memory is divided into segments
addressed by a **segment register** and an **offset**.

- It has two main execution units:

- **Bus Interface Unit (BIU)**: Fetches and decodes instructions.

- **Execution Unit (EU)**: Executes instructions.

- The 8086 has **general-purpose registers**, **segment registers**, and **special registers** for
data storage, arithmetic/logical operations, and memory addressing.

Next slide, please.

- The internal architecture of the 8086 is divided into two units:

- **Bus Interface Unit (BIU)**

- **Execution Unit (EU)**

**1. Bus Interface Unit (BIU):**

- Interfaces 8086 with external memory and I/O devices via the System Bus.

- **Functions of BIU:**

- Generates the **20-bit physical address** for memory access.

- Transfers data to/from memory and I/O devices.

 - Maintains a **6-byte pre-fetch instruction queue** (supports pipelining).

- **Components of BIU:**

- 4 Segment Registers: **CS**, **DS**, **SS**, **ES**.

- **Instruction Pointer (IP)**: Holds the offset of the next instruction in the Code Segment.

- **Address Generation Circuit**.

**Segment Registers:**

- **Code Segment (CS)**: Base address for the code segment.

- **Data Segment (DS)**: Base address for the data segment.

- **Stack Segment (SS)**: Base address for the stack segment.

- **Extra Segment (ES)**: Base address for the extra segment.

Next slide, please.

**Address Generation Circuit:**

- Generates the **20-bit physical address** using the formula:

- **Physical Address = Segment Address × 10H + Offset Address**

**6-Byte Pre-fetch Queue:**

- A **6-byte FIFO queue**.

- **Pipelining**: BIU fetches the next instruction from the code segment (CS) while the current
instruction is executed.

- The queue is 6 bytes because the maximum instruction size in 8086 is **6 bytes**.

**2. Decode Unit:**

- **Decodes instructions** fetched from memory.

- Converts machine code instructions into **micro-operations** for the Execution Unit.

**3. Control Unit:**

- **Manages the flow of instructions** through the microprocessor.

- Coordinates the activities of the Decode Unit, Execution Unit, and Prefetch Unit.

Next slide, please.

**4. Execution Unit (EU):**

- Main components: **General-purpose registers**, **ALU**, **Special-purpose registers**,

**Instruction Register and Decoder**, and **Flag/Status Register**.

**General-Purpose Registers (16-bit):**

- **AX (AL + AH)**: Holds operands/results for multiplication and division.

- **BX (BL + BH)**: Stores memory addresses (offset) in indirect addressing modes.

- **CX (CL + CH)**: Holds count for loop, rotate, shift, and string operations.

- **DX (DL + DH)**: Works with AX to store 32-bit values during multiplication and division.

**Arithmetic Logic Unit (ALU) (16-bit):**

- Performs **8-bit** and **16-bit** arithmetic and logic operations.

**Special-Purpose Registers (16-bit):**

- **Stack Pointer (SP)**: Points to the top of the stack (used in PUSH/POP instructions).

- **Base Pointer (BP)**: Holds offset addresses in the stack segment for random access.

- **Source Index (SI)**: Holds offset address in Data Segment for string operations.

- **Destination Index (DI)**: Holds offset address in Extra Segment for string operations.

**Instruction Register and Decoder:**

- Fetches opcode into the instruction register.

- **Instruction Decoder**: Decodes opcode and sends it to the control circuit for execution.

**Flag/Status Register (16-bit):**

- **6 Status Flags**: Carry (CF), Parity (PF), Auxiliary Carry (AF), Zero (Z), Sign (S), Overflow (O).

- **3 Control Flags**: Trap (TF), Interrupt (IF), Direction (DF).

Next slide, please.

**Data Transfer Instructions in Assembly Language:**

- **Fundamental** for moving data between registers, memory, and I/O devices.

- Critical for **managing and manipulating data** in a computer system.

**Main Data Transfer Instructions:**

- **MOV**: Moves data between registers or between memory and registers.

- **PUSH**: Places data onto the stack (LIFO - Last In, First Out).

- **POP**: Retrieves data from the stack.

Next slide, please.

**1. MOV Instruction:**

- Copies data between registers, memory, or an immediate value.

- **Examples**:

- `MOV AX, BX` ; Moves contents of BX to AX.

- `MOV AX, 5` ; Moves immediate value 5 into AX.

- `MOV [500], AX` ; Moves AX to memory location 500.

**Usage**:

- Transfer data between registers.

- Move data between registers and memory.

- Load immediate values into registers.

Next slide, please.

**2. PUSH Instruction:**

- Places data onto the stack (LIFO).

- **Usage**:

- Temporary storage during complex calculations.

- Saving register values before calling subroutines.

- Managing function parameters and local variables.

**Examples**:

- `PUSH AX` ; Pushes AX onto the stack.

- `PUSH BX` ; Pushes BX onto the stack.

Next slide, please.

**3. POP Instruction:**

- Retrieves data from the stack (LIFO).

- Removes the most recently pushed data and stores it in a register or memory location.

**Examples**:

- `POP AX` ; Pops the top value from the stack into register AX.

- `POP BX` ; Pops the next value from the stack into register BX.

**Usage**:

- Restoring saved register values after completing a subroutine or function.

- Managing return addresses in function calls.

- Retrieving function parameters or local variables stored on the stack.

Next slide, please.

**Register Addressing Mode in 8086 Microprocessor:**

- Data is accessed directly from the CPU's internal registers instead of memory.
- General-purpose registers: **AX, BX, CX, DX, SI, DI, BP, SP**.

- Segment registers: **CS, DS, SS, ES**.

- Each instruction specifies which register will hold the data.

- **Speed**: Faster than memory-based addressing; data retrieval is instantaneous as registers are
within the CPU.

**Data Access**:

- The instruction specifies a register, and the operation is performed on data stored in that register.

**Advantage**:

- Saves memory access time.

- Improves execution speed since data does not need to be fetched from external memory.

Next slide, please.

**Examples**:

- `MOV AX, BX` ; Copies contents of BX into AX (both general-purpose registers).

- `ADD AX, DX` ; Adds value in DX to AX and stores the result in AX.

- `SUB CX, DX` ; Subtracts value of DX from CX and stores the result in CX.

Next slide, please.

**Use Cases**:

- **Arithmetic Operations**: Quick access to operands improves computation speed.

- **Data Transfer**: Ideal for moving data between registers without involving memory operations.

- **Loop Control**: Registers like CX are used as counters (e.g., the LOOP instruction uses CX).

Next slide, please.

**Immediate Addressing Mode:**

**Definition:**

- The operand value is embedded directly within the instruction itself.

- Useful for constants, small values, or temporary data that doesn’t need to be stored in memory.

**Description:**

- **Operand Value**: Directly encoded within the instruction.

- **No Memory Reference**: Improves performance as there's no need to fetch from memory.

- **Limited Value Range**: Size of immediate value is limited by instruction format, restricting its
range.

- **Read-Only**: The immediate value cannot be modified after execution.

Next slide, please.

**Examples of Immediate Addressing Mode:**

**x86 Assembly:**

- **Instruction 1**: `MOV AX, 10h`

- **Purpose**: Loads immediate value **10h** into AX.

- **Breakdown**:

- `MOV`: Move instruction.

- `AX`: Destination register.

- `10h`: Immediate value (hexadecimal).

- **Instruction 2**: `ADD BX, 5`

- **Purpose**: Adds immediate value **5** to BX.

- **Breakdown**:

- `ADD`: Add instruction.

- `BX`: Destination register.

- `5`: Immediate value (decimal).

- **Instruction 3**: `CMP CX, 20`

- **Purpose**: Compares CX with immediate value **20**.

- **Breakdown**:

- `CMP`: Compare instruction.

- `CX`: First operand.

- `20`: Second operand (immediate value, decimal).

Next slide, please.

**Examples of Immediate Addressing Mode in Different Assembly Languages:**

**ARM Assembly:**

- **Instruction 1**: `LDR R0, =100`

- **Purpose**: Loads immediate value **100** into R0.

- **Breakdown**:

- `LDR`: Load Register instruction.

- `R0`: Destination register.

- `=100`: Special syntax to load value into a literal pool via PC-relative address.

- **Instruction 2**: `ADD R1, R2, #5`

- **Purpose**: Adds immediate value **5** to R2 and stores the result in R1.

- **Breakdown**:

- `ADD`: Add instruction.

- `R1`: Destination register.

- `R2`: First operand register.

- `#5`: Immediate value (decimal).

- **Instruction 3**: `CMP R3, #20`

 - **Purpose**: Compares R3 with immediate value **20**.

- **Breakdown**:

- `CMP`: Compare instruction.

- `R3`: First operand register.

- `#20`: Second operand (immediate value, decimal).

Next slide, please.

**MIPS Assembly:**

- **Instruction 1**: `ADDI $t0, $zero, 10`

- **Purpose**: Loads immediate value **10** into $t0.

- **Breakdown**:

- `ADDI`: Add Immediate instruction.

- `$t0`: Destination register.

- `$zero`: Special register always containing value **0**.

- `10`: Immediate value (decimal).

- **Instruction 2**: `SUBI $t1, $t2, 5`

- **Purpose**: Subtracts immediate value **5** from $t2 and stores the result in $t1.

- **Breakdown**:

- `SUBI`: Subtract Immediate instruction.

- `$t1`: Destination register.

- `$t2`: First operand register.

- `5`: Immediate value (decimal).

- **Instruction 3**: `BEQ $s0, $s1, 100`

- **Purpose**: Branches to label **100** if $s0 and $s1 are equal.

- **Breakdown**:

- `BEQ`: Branch Equal instruction.

- `$s0`: First operand register.

 - `$s1`: Second operand register.

- `100`: Immediate offset (in bytes) to branch if the comparison is true.

Next slide, please.

**Key Points of Immediate Addressing Mode:**

- Used for constants, small values, or temporary data.

- Improves performance by eliminating memory accesses.

- The range of immediate values is typically limited by the instruction format.

- The immediate value cannot be modified after the instruction is executed.

- Specific syntax and conventions may vary across different assembly languages.

Next slide, please.

**Now, we will look at Arithmetic Instructions in the 8086 Microprocessor.**

• Arithmetic instructions in the 8086 microprocessor perform mathematical operations such as

addition, subtraction, multiplication, division, increment, and decrement.

• These operations are essential for data processing, calculations, and algorithm implementation.

**Next slide, please.**

Now, let's understand the addition instructions. There are two different addition instructions:

1. `ADD`

2. `ADC` (Add with Carry)

In `ADD`, we add the source to the destination and store the result in the destination.

The syntax is:

`ADD destination, source`

Example: `ADD AL, 7AH` means adding `7AH` to the `AL` register.

In `ADC`, we add the source operand and the carry flag to the destination.
The syntax is:

`ADC destination, source`

Example:

`ADC AX, BX` means adding `AX`, `BX`, and the carry flag (CF).

This is used in multi-byte or multi-word additions where the carry must propagate from lower to
higher bytes.

**Next slide, please.**

Here are some additional examples of the `ADD` instruction with explanations.

**Next slide, please.**

Similarly, these are some more examples of the `ADC` (Add with Carry) instructions.

**Next slide, please.**

**Subtraction Instructions:**

There are two types of subtraction instructions:

1. Simple subtraction, represented by `SUB`

2. Subtraction with borrow, represented by `SBB`

The syntax for subtraction instructions is similar to addition instructions.

In subtraction with borrow, the carry flag acts as a borrow flag.

**Next slide, please.**

Here are some examples of the `SUB` instruction and `SBB` (Subtraction with Borrow), with
explanations.

**Next slide, please.**

**Multiplication Instructions:**

There are two types of multiplication instructions:

1. Unsigned multiplication, represented by `MUL`

2. Signed multiplication, represented by `IMUL`

In multiplication, the source operand is multiplied by the value in `AL` (for 8-bit multiplication) or
`AX` (for 16-bit multiplication).

The syntax for unsigned multiplication is:

`MUL source`

For signed multiplication:

`IMUL source`

**Next slide, please.**

Here are some more examples of `MUL` and `IMUL` instructions with explanations.

**Next slide, please.**

**Division Instructions:**

These are similar to multiplication instructions.

There are two types:

1. Unsigned division, represented by `DIV`

2. Signed division, represented by `IDIV`

In division, the value in `AX` is divided by the source operand.

The syntax for unsigned division is:

`DIV source`

Example: `DIV BX` means `AX` is divided by `BX`.

For signed division:

`IDIV source`

Example: `IDIV BX` means `AX` is divided by `BX` for signed integers.

**Next slide, please.**

Here are some examples of `DIV` and `IDIV` instructions with explanations.

**Next slide, please.**

**Increment and Decrement Instructions:**

In `INC`, we increase the value of the operand by 1. Similarly, in `DEC`, we decrease the value by 1.

The syntax for increment is:

`INC destination`

For decrement:

`DEC destination`

Example: `INC AX` means adding 1 to the `AX` register.

**Next slide, please.**

Here are some more examples of `INC` and `DEC` instructions with explanations.

**Next slide, please.**

**Negation and Comparison:**

The negation function creates the two's complement of a given number, changing the sign. The
arithmetic sign of a signed number changes from positive to negative or vice versa.

The syntax is:

`NEG destination`

The comparison function subtracts the source from the destination, but the result is not stored. Only
the flags are updated.

The syntax is:

`CMP destination, source`

**Next slide, please.**

Here are some more examples of comparison (`CMP`) instructions with explanations.

Next slide, please.

Now we will understand about

**Logical and Bit Manipulation Instructions:**

- Logical and bit manipulation instructions handle binary data and individual bits.

- Essential for logical operations, masking bits, and bit shifting/rotation.

- Key instructions include AND, OR, XOR, and NOT.

---

Next slide, please.

---

**AND Operation:**

- **Definition**: Performs a bitwise AND operation. Sets each bit to 1 if both corresponding bits are
1.

- **Example**: `AND AX, BX` ; AX = AX AND BX.

- **Use Cases**:

- **Masking bits**: Clears specific bits in a register.

- **Checking bit status**: Verifies if a specific bit is set (1) or clear (0).

- **Aligning data**: Forces specific bits to zero to align data.

---

Next slide, please.

---

**OR Operation:**

- **Definition**: Performs a bitwise OR operation. Sets each bit to 1 if either corresponding bit is 1.

- **Example**: `OR AX, BX` ; AX = AX OR BX.

- **Use Cases**:

- **Setting specific bits**: Turns certain bits on (set to 1).

- **Combining flags**: Merges multiple flag values into one variable.

- **Configuring hardware registers**: Sets configuration bits for devices.

---
Next slide, please.

---

**XOR Operation:**

- **Definition**: Performs a bitwise XOR operation. Sets the result to 1 if corresponding bits are
different.

- **Example**: `XOR AX, BX` ; AX = AX XOR BX.

- **Use Cases**:

- **Toggling bits**: Flips the state of specific bits (1 to 0 or 0 to 1).

- **Clearing a register**: XOR a register with itself to set all bits to 0.

- **Bitwise comparisons**: Used in error detection algorithms, such as parity checking.

---

Next slide, please.

---

NOT Operation:

 Definition: A unary operation that inverts all bits in the operand (turns 1 into 0 and vice
versa).

 Example: NOT AX ; Inverts all bits in AX.

 Use Cases:

o Inverting bits: Reverses all bits in a register, often for complementing a value.

o Generating the 1's complement: Useful for creating negative numbers in arithmetic
operations.

o Flipping control flags: Changes the state of a control bit from 1 to 0 or vice versa.

Shift Instructions:

 Shift instructions move bits in a register or memory to the left or right, filling emptied bits
with 0 or a copy of the most significant bit.

1. SHL (Shift Left):

 o Definition: Shifts all bits in the operand to the left by a specified number of
positions. Zeroes are inserted in the least significant bits, and the most significant
bits are discarded.

o Example: SHL AX, 1 ; Shift AX left by 1 bit.

2. SHR (Shift Right):

o Definition: Shifts bits to the right, filling the most significant bits with zeroes.

o Example: SHR AX, 1 ; Shift AX right by 1 bit.

o Use Case: Commonly used for multiplication and division by powers of two.

Rotate Instructions:

 Rotate instructions are similar to shifts but reintroduce bits shifted out of one end at the
opposite end.

1. ROL (Rotate Left):

o Definition: Rotates all bits to the left, moving the most significant bit to the least
significant bit position.

o Example: ROL AX, 1 ; Rotate AX left by 1 bit.

2. ROR (Rotate Right):

o Definition: Rotates all bits to the right, moving the least significant bit to the most
significant bit position.

o Example: ROR AX, 1 ; Rotate AX right by 1 bit.

Next slide, please

Introduction to Direct and Indirect Addressing Modes

 Addressing Modes in 8086:

o Used to specify how operands (data) are accessed or identified in an instruction.

o Control methods of addressing memory, registers, or I/O devices.

o Operands can be values in memory, registers, or immediate values embedded in the

instruction.

 Why Addressing Modes Are Important:

o Efficiency: Enable the CPU to efficiently access data, optimize memory usage, and
reduce instruction size.

o Flexibility: Support a wide range of operations, including direct memory access and
dynamic access through pointers or offsets.
Direct Addressing Mode:

 Definition:

o The instruction contains the exact memory address of the data.

o The 8086 microprocessor directly fetches or stores data from this address without
using registers for address calculation.

 Example:

o MOV AX, [5000H]

 MOV: Data transfer instruction.

 AX: Register where the data will be stored.

 [5000H]: Memory address containing the data.

 The value at 5000H is loaded directly into AX.

 How it Works:

o The CPU reads the instruction.

o Accesses memory address 5000H.

o Moves the value stored there into the AX register.

Indirect Addressing Mode:

 Definition:

o The memory address is not specified in the instruction.

o A register (like BX, SI, DI) holds the memory address, and the CPU accesses the data
from the memory location stored in that register.

 Example:

o MOV AX, [BX]

 MOV: Data transfer instruction.

 AX: Destination register.

 [BX]: Memory address stored in BX, and the value at that address is moved
to AX.

 How it Works:

o The CPU reads the instruction.

o Looks at the value inside the BX register.

o The value in BX points to a memory location.

 o The CPU fetches the data from that location and moves it to AX.

Next slide, please

Registers Used in Indirect Addressing:

1. BX (Base Register):

o Purpose: Used for indirect memory access, primarily in the data segment.

o Example: Accessing array elements or data structures in the data segment.

o Usage: Holds the memory address for indirect data access.

o Example: MOV AX, [BX]

 The address in BX points to the memory location from which data is fetched
into AX.

2. BP (Base Pointer):

o Purpose: Commonly used with the stack segment for accessing parameters or local
variables in functions.

o Usage: Helps access local variables or parameters in subroutines using the stack.

o Example: MOV AX, [BP]

 The value in BP holds the address within the stack segment for fetching data.

Next slide please

3. SI (Source Index):

o Purpose: Typically used in string operations, can also serve as an index in indirect
memory access.

o Usage: Holds the memory address from which data is fetched, especially in string or
array operations.

o Example: MOV AX, [SI]

 Data is fetched from the memory address pointed to by SI.

4. DI (Destination Index):

o Purpose: Often used in data transfer operations, especially with arrays or strings.

o Usage: Holds the address where data will be written or transferred.

o Example: MOV AX, [DI]

 Data from the memory address stored in DI is moved into AX.

Introduction to Indexed and Based Addressing Modes in 8086:

 Addressing Modes:

o Define how the microprocessor calculates the effective address of data or operands
in an instruction.

o Critical for flexible and efficient data access, particularly with arrays, structures,
strings, and stack operations.

 Key Addressing Modes:

1. Indexed Addressing Mode:

 Involves index registers (SI, DI).

 Ideal for working with arrays and strings.

2. Based Addressing Mode:

 Uses base registers (BX, BP).

 Useful for accessing structured data in memory.

 Importance:

o Understanding these addressing modes optimizes data storage and retrieval.

o Improves performance and flexibility in memory management.

Next Slide: Block Diagram: Indexed Addressing Mode in 8086. Let me know if you need further
assistance!

Next slide please

Indexed Addressing Mode:

 Definition:

o Effective memory address calculated by adding a displacement (offset) to the value

in an index register.

 Index Registers:

o SI (Source Index): Used for accessing source data, particularly in string operations.

o DI (Destination Index): Used for accessing destination data, often in string

operations.

 Formula for Effective Address:

o Effective Address = Index Register (SI/DI) + Displacement

 Example:

o MOV AX, [SI + 200H]

  Explanation:

 SI contains a base address; 200H is the offset added to access a

specific element.

 Use Case:

o Commonly used to iterate through arrays or strings.

o Index register holds the base address; displacement points to individual elements.

Indexed Addressing Mode: Detailed Example:

 Instruction:

o MOV AX, [SI + 200H]

 What Happens:

o SI holds the base address of an array or string in memory.

o 200H is the displacement pointing to a specific element, located 200H bytes away.

o Value at memory location (SI + 200H) is loaded into AX.

 Effective Address:

o Calculated by adding SI's contents to the displacement (200H).

 Use Case:

o Iterating through arrays or strings without changing the base address, allowing
access to various elements.

Based Addressing Mode:

 Definition:

o Method that utilizes a base register (BX or BP) combined with a displacement to
access specific memory locations.

 Base Registers:

o BX (Base Register): Used for accessing data in the Data Segment (DS).

o BP (Base Pointer): Used for accessing data in the Stack Segment (SS), particularly for
local variables or function parameters.

 Effective Address Calculation:

o Effective Address = Base Register (BX/BP) + Displacement

 Provides flexible access to memory locations relative to a specified base

address.

 Applications:
 o Useful for accessing records and structured data in memory, such as arrays or linked
lists.

Next Slide

Based Addressing Mode: Detailed Example:

 Instruction:

o MOV AX, [BX + 100H]

 Explanation:

o BX holds the base address of a data structure or array.

o Displacement 100H refers to the offset within the data structure, pointing to a
specific element or field.

o Instruction moves data from memory address BX + 100H into AX.

 Effective Address Calculation:

o Calculated by adding the base address in BX and the displacement 100H.

o Efficiently accesses fields or elements within records and arrays.

Combined Indexed and Based Addressing Mode:

 Definition:

o Uses both an index register (SI or DI) and a base register (BX or BP) with a
displacement to calculate the effective memory address.

 Effective Address Calculation:

o Effective Address = Base Register (BX/BP) + Index Register (SI/DI) + Displacement

 Application:

o Useful for multi-dimensional arrays or records in arrays.

o One register holds the base address, while the other iterates over individual
elements.

Example of Combined Addressing:

 Instruction:

o MOV AX, [BX + SI + 50H]

 Explanation:

o BX: Base register containing the address of the beginning of the array or structure.
 o SI: Index register used to access a specific element within the array.

o Displacement 50H: Further refines the location within the element or structure.

 Result:

o Accesses memory location calculated as BX + SI + 50H and moves data into AX.

 Use Case:

o Ideal for accessing nested arrays or records, where both a base and index are
necessary.

Practical Applications:

 Indexed Addressing:

o Use Case: Primarily for array processing and string manipulation.

o Example: Iterating over an array or accessing string elements by incrementing index

register (SI/DI).

 Based Addressing:

o Use Case: Access fields within records or structures.

o Example: Retrieving specific elements or fields from structured data records (e.g.,
customer details).

 Combined Indexed and Based Addressing:

o Use Case: Efficient for complex data structures like multi-dimensional arrays.

o Example: Accessing elements in a two-dimensional array by combining base and

index registers with a displacement.

Next Slide

String Operations Overview:

 MOVS (Move String):

o Moves data from the Source Index (SI) to the Destination Index (DI).

o Supports both byte (MOVSB) and word (MOVSW) transfers.

 CMPS (Compare String):

o Compares the source string (pointed by SI) with the destination string (pointed by
DI).

o Updates the flags based on the comparison result.

 SCAS (Scan String):

 o Compares the value in AL/AX with string data pointed by DI.

o Scans for matches within the string.

Processor Control Instructions Overview:

 HLT (Halt):

o Stops execution until a hardware interrupt occurs.

 NOP (No Operation):

o Does nothing and increments the instruction pointer.

 WAIT:

o Pauses execution until the TEST pin is low.

Branching and Control Instructions:

 Definition:

o Control the flow of execution in assembly and low-level programming languages.

o Used for decision-making and managing repetitive tasks.

 Categories:

o Conditional and Unconditional Jumps.

o CALL and RET instructions.

Unconditional Jump (JMP):

 Definition:

o Transfers control to a specified location unconditionally.

 Syntax:

o JMP destination

 Example:

o (To be provided on the next slide)

Conditional Jumps (JE, JNE):

 JE (Jump if Equal):

o Definition: Jumps to a label if two operands are equal.

o Syntax:
  JE destination

Next Slide

JNE (Jump if Not Equal):

 Definition:

o Jumps to a label if two operands are not equal.

 Syntax:

o JNE destination

 Example:

o (To be provided on the next slide)

Comparison Between JMP, JE, and JNE:

 JMP:

o Unconditional jump to a specified location.

 JE (Jump if Equal):

o Jumps if two operands are equal.

 JNE (Jump if Not Equal):

o Jumps if two operands are not equal.

CALL Instruction:

 Definition:

o Transfers control to a subroutine (function) while saving the return address on the
stack.

 Syntax:

o CALL subroutine

 Example:

o (To be provided on the next slide)

RET Instruction:

 Definition:
 o Returns control back to the calling function by popping the saved return address
from the stack.

 Syntax:

o RET

 Example:

o (To be provided on the next slide)

Differences Between CALL and JMP:

 CALL:

o Used to call a subroutine and saves the return address.

 JMP:

o Used for unconditional jumps without saving the return address.

Next Slide

Conclusion:

 Control Flow:

o Unconditional Jumps (JMP): Manage control flow by jumping to specified locations.

o Conditional Jumps (JE, JNE): Allow decision-making based on operand comparisons.

 Subroutine Management:

o CALL: Enables calling of subroutines while saving return addresses.

o RET: Facilitates returning control from subroutines.

Applications:

 Used in:

o Low-level system programming

o Embedded systems

o Performance-critical applications

Here are our Team Members for Group B Presentation:

 (List of team members)

Thank you for listening to our presentation.