1/Chapter2

Chapter 2: Intel 8088/8086 Microprocessors

• Inside architecture
• Pin Diagram
• Memory map of IBM-PC
• Addressing modes of 8086
• Operation Code instruction 8086
• Several instructions of 8086
• Memory addressing in protect mode from 80286
 2/Chapter2

Chapter 2: Intel 8088/8086 Microprocessors

• Inside architecture
 Diagram
 Multipurpose Registers
 Code segments
 Pointer and Index registers
 Flag register
 Instruction waiting list
 3/Chapter2

Diagram of 8088/8086

EU
Address bus: BIU
Multipurpose AX 20 bit 
BX
Registers Stack
CX
DX
segments Internal Bus
SP and CS
of CPU:
Pointer and BP Instruction DS
16 bit data
SS
Index SI
Pointer 20 bit address
ES
Registers DI
IP

Data Bus Logic

ALU 16 bit
điều khiển
Temporary registers bus
External
Control
Bus
Unit of
ALU EU
Instruction waiting list
Flag Register
 Multipurpose Registers
4/Chapter2

in 8088/8086
8 high bit 8 low bit

•8088/8086 to 80286 : 16 bits

AX AH AL •From 80386: 32 bits EAX, EBX,
BX BH BL ECX, EDX

CX CH CL
DX DH DL

• AX (accumulator): accumulator is used for instructions such as multiplication,

division, and some of the adjustment instructions.
• BX (base): sometimes holds offset address of a location in the memory system in all
versions of the microprocessor
• CX (count): general-purpose register that also holds the count for various instructions
• DX (data): general-purpose register, holds a part of the result from a multiplication
or part of dividend before a division
 5/Chapter2

Segment Registers
• Generate memory addresses when combined with other
registers in the microprocessor.
• Four or six segment registers in various versions of the
microprocessor.
• A segment register functions differently in real mode than in
protected mode.
• Following is a list of each segment register, along with its
function in the system.
 6/Chapter2

Segment Registers
• CS (code) segment holds code (programs and procedures)
used by the microprocessor.
• DS (data) contains most data used by a program.
 Data are accessed by an offset address or contents of other registers
that hold the offset address
• ES (extra) an additional data segment used by some
instructions to hold destination data.
• SS (stack) defines the area of memory used for the stack.
 stack entry point is determined by the stack segment and stack pointer
registers
 the BP register also addresses data within
the stack segment
 7/Chapter2

REAL MODE MEMORY ADDRESSING

• 80286 and above operate in either the real or protected mode.
• Real mode operation allows addressing of only the first 1M
byte of memory space—even in Pentium 4 or Core2
microprocessor.
the first 1M byte of memory is called the real memory,
conventional memory, or DOS memory system
 8/Chapter2

REAL MODE MEMORY ADDRESSING

• Organization of 1 Mbytes Memory
 segment FFFFFH
 216bytes =64 KB
 Segment 1:
beginning address 00000 H
 Segment 2:
beginning address 10000 H
 Last segment: FFFF0 H
 Displacement (Ô nhớ trong đoạn):
 offset address,
 Cell 1: offset: 0000 1FFFFH
 Last Cell: offset: FFFF Offset=F000
1F000H
 Physical address:
 Segment : offset 10000H 1000
Physical address=Segment*16 + offset
code segment
Chế độ thực (real mode) 00000H
 9/Chapter2

Segment Registers
• E.g: Physical Address 12345H
code segment offset

1000 H 2345H

1200 H 0345H

1004 H ?

0300 H ?

• E.g: beginning address of a segment is 49000H, determine the last address

 10/Chapter2

Segment Registers
• Segment Registers: store the segment addresses
FFFFF
.............
58FFF
extra segment

49000 4900 ES
43FFF
Stack segment
34000 3400 SS
30000
2FFFF Code segment

20000 2000 CS
1FFFF Data segment

10000 1000 DS

00000
 11/Chapter2

Segment Registers
• Overlapped segments
FFFFF

s
t
a d
c a
k 0A480
t 0A47F
a c Stack
o 0A280
d 0A28 SS
0A27F
e Data
0A0F0 0A0F DS
0A0EF
Code
090F0 090F CS

00000
 12/Chapter2

Pointer and Index registers

• Chứa địa chỉ lệch (offset)
 IP (instruction pointer): store the next instruction’s address in CS.
 CS:IP
 BP (Base Pointer): store the data’s address in SS or other segments
 SS:BP
 SP (Stack Pointer): A stack pointer is a register that stores the address of
the last program request
 SS:SP
 SI (Source Index): is a 16-bit register. SI is used for indexed, based
indexed and register indirect addressing, as well as a source data
address in string manipulation instructions.
 DS:SI
 DI (Destination Index): is a 16-bit register. DI is used for indexed, based
indexed and register indirect addressing, as well as a destination data
address in string manipulation instructions.
 DS:DI
 SI and DI can be used as general purpose reggisters.
 From 80386: 32 bit: EIP, EBP, ESP, EDI, ESI
 13/Chapter2

Pointer and Index registers

• Default Segment and Offset registers

Segment Offset Note

CS IP Instruction’s
address
SS SP or BP Stack address

DS BX, DI, SI, 8 bit or Data address

16 bit numbers

ES DI Destination’s
address
 14/Chapter2

Flag Register

15 14 2 1 0
O D I T S Z A P C

• 9 bits are used, 6 flag bits which show some following status:
 C or CF (carry flag)): holds the carry after addition or borrow after
subtraction. (CF=1 khi có nhớ hoặc mượn từ MSB)
 P or PF (parity flag): is the count of ones in a number expressed as even
or odd. Logic 0 for odd parity; logic 1 for even parity.
 if a number contains three binary one bits, it has odd parity
 if a number contains no one bits, it has even parity
 A or AF (auxilary carry flag): holds the carry (half-carry) after addition or
the borrow after subtraction between bit positions 3 and 4 of the result.
 Z or ZF (zero flag): shows that the result of an arithmetic or logic
operation is zero.
 15/Chapter2

Flag Register

15 14 2 1 0
O D I T S Z A P C

• 9 bits are used, 6 flag bits which show some following status:
 S or SF (Sign flag): flag holds the arithmetic sign of the result after an
arithmetic or logic instruction executes.
 O or OF (Overflow flag): occurs when signed numbers are added or
subtracted.
 an overflow indicates the result has exceeded
the capacity of the machine
 16/Chapter2

Flag Register

15 14 2 1 0
O D I T S Z A P C

• 3 controlled flags
 T or TF (trap flag)): The trap flag enables trapping through an on-chip
debugging feature.
 I or IF (Interrupt enable flag): controls operation of the INTR (interrupt
request) input pin.
 D or DF (direction flag): selects increment or decrement mode for the DI
and/or SI registers.
 17/Chapter2

Flag Register
• E.g.: 80h
+
80h

100h

 SF=0 because msb = 0

 PF=1 because sum of bits is 0 (even)
 ZF=1 because the result is 0
 CF=1 a carry from msb bit in this addition
 OF=1 overflow in this sum of two negative numbers
 18/Chapter2

Instruction cycle
• 4 bytes for 8088 and 6 bytes for 8086
• Pipeline processing

without
pipelining F1 D1 E1 F2 D2 E2 F3 D3 E3

Fetch
F1 D1 E1
with pipelining F2 D2 E2
F3 D3 E3 Decode

Execute

1 instruction cycle
 19/Chapter2

Chapter 2: Intel 8088/8086 Microprocessors

• Inside architecture
• Pin Diagram
• Memory map of IBM-PC
• Addressing modes of 8086
• OpCode instruction 8086
• Several instructions of 8086
• Memory addressing in protect mode from 80286
 20/Chapter2

Intel 8088

• 16-bit processor
• introduced in 1979
• 3 mm, 5 to 8 MHz, 29 KTOR,
0.33 to 0.66 MIPS
 21/Chapter2

Intel 8088

•Modes: Min and Max:

MN/MX = 1 Min mode

= 0 Max mode with bus
controller 8288
 22/Chapter2

Intel 8086
 23/Chapter2

Chapter 2: Intel 8088/8086 Microprocessors

• Inside architecture
• Pin Diagram
• Memory map of IBM-PC
• Addressing modes of 8086
• Operation Code instruction 8086
• Several instructions of 8086
• Memory addressing in protect mode from 80286
 24/Chapter2

Memory map of IBM-PC

Extended
memory

FFFFF Systematic
Memory
A0000 484 Kbytes 1 Mbytes
9FFFF of real memory
Program
Memory
640 Kbytes
00000
 25/Chapter2

Memory map of some programs

9FFFF
MSDOS
9FFF0

Memory for
application’s
programs

08E30
COMMAND.COM
08490
Device drivers (mouse.sys)
02530
MSDOS
01160
IO.SYS
00700
Vùng DOS
00500
Vùng BIOS
00400
00000 Interrupt vector
 26/Chapter2

Memory map of the system

FFFFF
ROM BIOS
F0000
ROM BASIC
E0000

Reserve area

C8000
Video BIOS ROM
C0000
Video RAM (text)
B0000
Video RAM (visual)
A0000
 27/Chapter2

I/O ports
• Address: 0000H –FFFFH, M/IO =0
FFFF

Extended area

COM1
03F8
Điều khiển đĩa mềm
03F0
CGA adapter
03D0
LPT1
0378
Hard disk controller
0320
COM2
02F8
8255
0060
Timer (8253)
0040
Interrupt controller
0020
0000 DMA
 28/Chapter2

Reserved memory of 8088/8086

FFFFF
Reset Bootstrap
FFFF0 program jump

003FF
Interrupt vectors
00000
 29/Chapter2

Chapter 2: Intel 8088/8086 Microprocessors

• Inside architecture
• Pin Diagram
• Memory map of IBM-PC
• Addressing modes of 8086
• Operation Code instruction 8086
• Several instructions of 8086
• Memory addressing in protect mode from 80286
 30/Chapter2

1, Register Addressing Mode

• Uses register as an operand/input
• High speed
• E.g:
 MOV BX, DX ; Copy content of DX to BX
 MOV AL, BL ; Copy content of BL to AL
 MOV AL, BX ; Invalid, sizes of registers are different
 MOV ES, DS ; Invalid, (segment to segment)
 MOV CS, AX ; Invalid, because CS can not be used for destination
register

 ADD AL, DL ; Sum of AL and DL, then copy to AL

 31/Chapter2

2, Immediate Addressing Mode

• Destination operand is a register of memory cell
• Source operand is constant
• Use to copy a constant to a register (except the code and flag
registers) or a memory cell in DS
• E.g:
 MOV BL, 44 ; Copy 44 (decimal number) to BL
 MOV AX, 44H ; Copy 0044H to AX
 MOV AL, ‘A’ ; Copy ASCII code of A to AL
 MOV DS, 0FF0H ; Invalid
 MOV AX, 0FF0H ;
 MOV DS, AX ; Invalid
 MOV [BX], 10 ; copy 10 (decimal number) to the memory cell DS:BX
 32/Chapter2

3, Direct Addressing Mode

• One operand is an address of memory cell which store data
• The second operand must be a register

• E.g:
 MOV AL, [1234H] ; Copy content of a memory cell whose address is DS:1234
to AL
 MOV [ 4320H ], CX ; Copy content of CX to continuous memory cells DS:
4320 and DS: 4321
 MOV [ 4321H ], CL ; ?
 33/Chapter2

4, Register indirect Addressing Mode

• One operand is a register which store the address of a memory
cell
• The second operand must be a register

• E.g:
 MOV AL, [BX] ; Copy content of the memory cell whose address is DS:BX to
AL
 MOV [ SI ], CL ; Copy content of CL to of the memory cell whose address is
DS:SI
 MOV [ DI ], AX ; Copy content of AX to continuous memory cells DS: DI và
DS: (DI +1)
 34/Chapter2

5, Based relative Addressing Mode

• One operand is BX/BP and a constant which represents the
displacement
• The second operand must be a register

• E.g:
 MOV CX, [BX]+10 ; Copy content of 2 continuous memory cells DS:BX+10
and DS:BX+11 to CX
 MOV CX, [BX+10] ; equal to the previous command
 MOV AL, [BP]+5 ; copy content of memory cell SS:BP+5 to AL
 35/Chapter2

6, Indexed relative Addressing Mode

• One operand is SI/DI and a constant which represents the
displacement
• The second operand must be a register

• E.g:
 MOV AX, [SI]+10 ; Copy content of 2 continuous memory cells DS:SI+10
and DS:SI+11 to AX
 MOV AX, [SI+10] ; equal to the previous command
 MOV AL, [DI]+5 ; copy content of memory cell DS:DI+5 to AL
 36/Chapter2

7, Based Indexed relative Addressing Mode

• One operand is BX/BP, SI/DI, and a constant which

represents the displacement
• The second operand must be a register

• E.g:
MOV AX, [BX] [SI]+8 ; Copy content of 2 continuous memory
cells DS:BX+SI+8 and DS:BX+SI+9 to AX

MOV AX, [BX+SI+8] ; equal to the previous command

MOV CL, [BP+DI+5] ; copy content of memory cell

SS:BP+DI+5 to CL
 37/Chapter2

Summary
Addressing mode Operand Default segment reggister

Thanh ghi Register

Tức thì Data

Trực tiếp [offset] DS

Gián tiếp qua thanh ghi [BX] DS

[SI] DS
[DI] DS

Tương đối cơ sở [BX] + displacement DS

[BP] + displacement SS
Tương đối chỉ số [DI] + displacement DS
[SI] + displacement DS
Tương đối chỉ số cơ sở [BX] + [DI]+ displacement DS
[BX] + [SI]+ displacement DS
[BP] + [DI]+ displacement SS
[BP] + [SI]+ displacement SS