ECE131: BASIC ELECTRICAL AND ELECTRONICS ENGINEERING

Fundamental of Semiconductor Devices

UNIT-3
Dr. Krishan Kumar
LECTURE-15/16/17
 Topics

Unit III
Fundamental of semiconductor devices : PN junction
diode and its applications, Bipolar junction
transistor (PNP and NPN), MOSFET (working and
applications), Op-amp (features and virtual ground
concept), Op-amp (inverting and non-inverting)
 KEY WORDS

• FET
• N Channel
• P Channel
• MOSFET
• IGMOSFET
• VGS
• VDS
A Field Effect Transistor (FET) is a three-
terminal semiconductor device.
Its operation is based on a controlled input
voltage.
 Junction Field Effect Transistor
The functioning of Junction Field Effect Transistor depends upon
the flow of majority carriers (electrons or holes) only. Basically,
JFETs consist of an N type or P type silicon bar containing PN
junctions at the sides.
•Gate − By using diffusion or alloying technique, both sides of N
type bar are heavily doped to create PN junction. These doped
regions are called gate (G).
•Source − It is the entry point for majority carriers through which
they enter into the semiconductor bar.
•Drain − It is the exit point for majority carriers through which they
leave the semiconductor bar.
•Channel − It is the area of N type material through which majority
carriers pass from the source to drain.
There are two types of JFETs commonly used in the field
semiconductor devices: N-Channel JFET and P-Channel JFET.
 N-Channel JFET

• It has a thin layer of N type material formed on P

type substrate. Then the gate is formed on top of
the N channel with P type material.
• When a DC voltage source is connected to the
source and the drain leads of a JFET, maximum
current will flow through the channel.
• The same amount of current will flow from the
source and the drain terminals.
The amount of channel current flow will be
determined by the value of VDD and the
internal resistance of the channel.
 A typical value of source-drain resistance of a JFET is
quite a few hundred ohms. It is clear that even when the
gate is open full current conduction will take place in the
channel. Essentially, the amount of bias voltage applied
at ID, controls the flow of current carriers passing
through the channel of a JFET. With a small change in
gate voltage, JFET can be controlled anywhere between
full conduction and cutoff state.
Amplification Factor (u) − It is the ratio of change in drain-source
voltage (ΔVDS) to the change in gate source voltage (ΔVGS)
constant drain current (ΔID).
It can be expressed as,
u = (ΔVDS)/(ΔVGS) at constant ID
 Output Characteristics of JFET

The output characteristics of JFET are drawn between drain

current (ID) and drain source voltage (VDS) at constant gate
source voltage (VGS) as shown in the following figure.
MOSFET
 MOSFET

FETs have a few disadvantages like high drain resistance, moderate

input impedance and slower operation.
To overcome these disadvantages, the MOSFET which is an advanced
FET is invented.
MOSFET stands for Metal Oxide Silicon Field Effect Transistor or
Metal Oxide Semiconductor Field Effect Transistor.
This is also called as IGFET meaning Insulated Gate Field Effect
Transistor. The FET is operated in both depletion and enhancement
modes of operation. The following figure shows how a practical
MOSFET looks like.
Construction of a MOSFET

The construction of a MOSFET is a bit similar to the

FET. An oxide layer is deposited on the substrate to
which the gate terminal is connected.
This oxide layer acts as an insulator (sio2 insulates
from the substrate), and hence the MOSFET has
another name as IGFET. In the construction of
MOSFET, a lightly doped substrate, is diffused with
a heavily doped region. Depending upon the
substrate used, they are called as P-type and N-
type MOSFETs.
The voltage at gate controls the operation of the
MOSFET. In this case, both positive and negative voltages
can be applied on the gate as it is insulated from the
channel. With negative gate bias voltage, it acts as
depletion MOSFET while with positive gate bias voltage
it acts as an Enhancement MOSFET.
 Construction of N- Channel MOSFET

A lightly doped P-type substrate is taken into which two heavily

doped N-type regions are diffused, which act as source and drain.
Between these two N+ regions, there occurs diffusion to form an N
channel, connecting drain and source.

A thin layer of Silicon dioxide (SiO2) is grown

over the entire surface and holes are made
to draw ohmic contacts for drain and source
terminals. A conducting layer of aluminum is
laid over the entire channel, upon this SiO2
layer from source to drain which constitutes
the gate. The SiO2 substrate is connected to
the common or ground terminals.
This device can be operated in modes. They
are depletion and enhancement modes.
 Working of N-Channel MOSFET Enhancement Mode

The same MOSFET can be worked in enhancement mode, if we can change the
polarities of the voltage VGG. So, let us consider the MOSFET with gate source voltage
VGG being positive as shown in the following figure.

When no voltage is applied between gate and source,

some current flows due to the voltage between drain
and source. Let some positive voltage is applied at VGG.
Then the minority carriers i.e. holes, get repelled and
the majority carriers i.e. electrons gets attracted
towards the SiO2 layer.
With some amount of positive potential at VGG a
certain amount of drain current ID flows through source
to drain. When this positive potential is further
increased, the current ID increases due to the flow of
electrons from source and these are pushed further due
to the voltage applied at VGG. Hence the more positive
the applied VGG, the more the value of drain current ID
will be. The current flow gets enhanced due to the
increase in electron flow better than in depletion mode.
Hence this mode is termed as Enhanced Mode MOSFET.
 Working of N - Channel depletion mode
MOSFET
For now, we have an idea that there is no PN junction present between gate
and channel in this, unlike a FET. We can also observe that, the diffused
channel N between Two N+ Regions
, the insulating dielectric SiO2 and the aluminum metal layer of the gate
together form a parallel plate capacitor.
If the NMOS has to be worked in depletion mode, the gate terminal should be
at negative potential while drain is at positive potential, as shown in the
following figure.
When no voltage is applied between gate and source, some current flows
due to the voltage between drain and source. Let some negative voltage is
applied at VGG. Then the minority carriers i.e. holes, get attracted and settle
near SiO2 layer. But the majority carriers, i.e., electrons get repelled.
With some amount of negative potential at VGG a certain amount of drain
current ID flows through source to drain. When this negative potential is
further increased, the electrons get depleted and the current ID decreases.
Hence the more negative the applied VGG, the lesser the value of drain
current ID will be.
The channel nearer to drain gets more depleted than at source likeinFET
and the current flow decreases due to this effect. Hence it is called as
depletion mode MOSFET.
 Drain Characteristics

The drain characteristics of a MOSFET are drawn between the drain current ID and the drain
source voltage VDS. The characteristic curve is as shown below for different values of inputs.

Actually when VDS is increased, the drain current ID should

increase, but due to the applied VGS, the drain current is
controlled at certain level. Hence the gate current controls
the output drain current.
 Transfer Characteristics

Transfer characteristics define the change in the value of VDS with the change
in ID and VGS in both depletion and enhancement modes. The below transfer
characteristic curve is drawn for drain current versus gate to source voltage.
The conversion of alternating current into direct current is known as
rectification. A p-n junction diode allows electric current when it is
forward biased and blocks electric current when it is reverse biased.
This action of p-n junction diode enables us to use it as a rectifier.
•Diodes are used in clamping circuits for DC restoration.
•Diodes are used in clipping circuits for wave shaping.
•Diodes are used in voltage multipliers.
•Diodes are used as switch in digital logic circuits used in
computers.
•Diodes are used in demodulation circuits.
•Laser diodes are used in optical communications.
•Light Emitting Diodes (LEDs) are used in digital displays.
•Diodes are used in voltage regulators.
In reverse biasing, the positive terminal of battery is connected to
the N side and the negative terminal of battery is connected to the P
side of a diode. In reverse biasing, the diode does not conduct
electricity, since reverse biasing leads to an increase in the depletion
region width; hence current carrier charges find it more difficult to
overcome the barrier potential. The diode will act like an open switch
and there is no current flow.
A transistor also acts as a switch to choose between available options. It
also regulates the incoming current and voltage of the signals.
-----Constructional Details of a Transistor------
The Transistor is a three terminal solid state device which is formed by
connecting two diodes back to back. Hence it has got two PN junctions. Three
terminals are drawn out of the three semiconductor materials present in it. This
type of connection offers two types of transistors.
They are PNP and NPN which means an N-type material between two Ptypes
and the other is a P-type material between two N-types respectively.
Emitter
•The left hand side of the above shown structure can be understood as Emitter.
•This has a moderate size and is heavily doped as its main function is to supply a
number of majority carriers, i.e. either electrons or holes.
•As this emits electrons, it is called as an Emitter.
•This is simply indicated with the letter E.
Base
•The middle material in the above figure is the Base.
•This is thin and lightly doped.
•Its main function is to pass the majority carriers from the emitter to the
collector.
•This is indicated by the letter B.
Collector
•The right side material in the above figure can be understood as a Collector.
•Its name implies its function of collecting the carriers.
•This is a bit larger in size than emitter and base. It is moderately doped.
•This is indicated by the letter C.
Transistor Biasing
As we know that a transistor is a combination of two diodes, we
have two junctions here. As one junction is between the emitter
and base, that is called as Emitter-Base junction and likewise, the
other is Collector-Base junction.
Biasing is controlling the operation of the circuit by providing
power supply. The function of both the PN junctions is controlled
by providing bias to the circuit through some dc supply. The figure
below shows how a transistor is biased.
it is understood that
The N-type material is provided
negative supply and P-type material
is given positive supply to make the
circuit Forward bias.
The N-type material is provided
positive supply and P-type material
is given negative supply to make the
circuit Reverse bias.
By applying the power, the emitter base junction is always forward biased as the
emitter resistance is very small. The collector base junction is reverse biased and its
resistance is a bit higher. A small forward bias is sufficient at the emitter junction
whereas a high reverse bias has to be applied at the collector junction.
The direction of current indicated in the circuits above, also called as the Conventional
Current, is the movement of hole current which is opposite to the electron current.
Operation NPN Transistor
The operation of an NPN transistor can be explained by having a look at the following figure, in
which emitter-base junction is forward biased and collector-base junction is reverse biased.
The voltage VEE provides a negative potential at the emitter which repels the electrons in the N-
type material and these electrons cross the emitter-base junction, to reach the base region.
There a very low percent of electrons recombine with free holes of P-region. This provides very
low current which constitutes the base current IB. The remaining holes cross the collector-base
junction, to constitute the collector current IC.
As an electron reaches out of the collector terminal, and enters the positive terminal of the
battery, an electron from the negative terminal of the battery VEE enters the emitter region. This
flow slowly increases and the electron current flows through the transistor.
Hence we can understand that −
•The conduction in a NPN transistor takes place through electrons.
•The collector current is higher than the emitter current.
•The increase or decrease in the emitter current affects the collector current.
Advantages
There are many advantages of a transistor such as −
•High voltage gain.
•Lower supply voltage is sufficient.
•Most suitable for low power applications.
•Smaller and lighter in weight.
•Mechanically stronger than vacuum tubes.
•No external heating required like vacuum tubes.
•Very suitable to integrate with resistors and diodes to produce ICs.
Common Emitter CE Configuration
The name itself implies that the Emitter terminal is taken as
common terminal for both input and output of the transistor. The
common emitter connection for both NPN and PNP transistors is
as shown in the following figure.
the emitter junction is forward biased and the collector junction is
reverse biased. The flow of electrons is controlled in the same
manner. The input current is the base current IB and the output
current is the collector current IC here.
Base Current Amplification factor β
The ratio of change in collector current to the change in base
current
is known as Base Current Amplification Factor. It is denoted by β

β=ΔIC/ΔIB
Question : A transistor has a current gain of 30 Ampere. If the collector
resistance is 6 kΩ, the input resistance is 1 kΩ, calculate its voltage gain.

Answer:

Given,

Rin =1 kΩ and Rout = 6k Ω

∴ Rgain = Rout/Rin = 6/1 = 6

Voltage gain = current gain × Resistance gain

= 30 × 6 =180
Any Queries