® L294

SWITCH-MODE SOLENOID DRIVER

HIGH VOLTAGE OPERATION (UP TO 50V)

HIGH OUTPUT CURRENT CAPABILITY (UP TO 4A)
LOW SATURATION VOLTAGE
TTL-COMPATIBLE INPUT Multiwatt 11
OUTPUT SHORT CIRCUIT PROTECTION (TO
GROUND, TO SUPPLY AND ACROSS THE
LOAD)
THERMAL SHUTDOWN
OVERDRIVING PROTECTION ORDER CODE : L294
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LATCHED DIAGNOSTIC OUTPUT

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DESCRIPTION
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The L294 is a monolithic switched mode solenoid
driver designed for fast, high current applications r o
feature of the L294 is a latched diagnostic output
which indicates when the output is short circuited.
such as hummer and needle driving in printers and
P
The L294 is supplied in a 11-lead Multiwatt® plas-
e
electronic typewriters. Power dissipation is reduced
by efficient switchmode operation. An extra t
tic power package.

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BLOCK DIAGRAM
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September 2003 1/8

 L294

ABSOLUTE MAXIMUM RATING

Symbol Parameter Value Unit

Vs Power Supply Voltage 50 V

VSS Logic Supply Voltage 7 V

VEN Enable Voltage 7 V

Ip Peak Output Current (repetitive) 4.5 A

Ptot Total Power Dissipation (at Tcase = 75 °C) 25 W

Tstg, Tj Storage and Junction Temperature - 40 to 150 °C

CONNECTION DIAGRAM (top view)

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THERMAL DATA
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Symbol
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Rth-j-case
Pr
Thermal resistance junction-case Max 3 °C/W

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 L294

ELECTRICAL CHARACTERISTICS (refer to the test circuit, Vs = 40 V, Vss = 5V, Tamb = 25 °C, unless
otherwise specified)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Vs Power Supply Voltage (pin 1) Operative Condition 12 46 V
Id Quiescent Drain Current (pin 1) VENABLE = H 20 30
mA
Vi ≥ 0.6V; VENABLE = L 70
Vss Logic Suply Voltage (pin 4) 4.5 7 V
Iss Quiescent Logic Supply VDIAG = L 5 8 mA
Current
DIAG Output at High Impedance 10 100 µA
Vi Input Voltage (pin 7) Operating Output 0.6 V
Non-operative Output 0.45
Ii Input Current (pin 7) Vi ≥ 0.6V -1
µA
Vi ≤ 0.45V -3
VENABLE Enable Input Voltage (pin 9) Low Level -0.3 0.8
V
High Level 2.4
s)
IENABLE Enable Input Current (pin 9) VENABLE = L

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-100 µA

Iload/ Vi Trasconductance
VENABLE = H
RS = 0.2 Ω Vi = 1V 0.95
d1u 100
1.05

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A/V
Vi = 4V 0.97 1 1.3
Vsat H Source Output Saturation Ip = 4A

e P 1.7 V

let
Voltage
Vsat L Sink Output Saturation Voltage Ip = 4A 2 V

so
Vsat H + VsatL Total Saturation Voltage Ip = 4A 4.5 V
Ileakage
K
Output Leakage Current
On Time Limiter Constant (°)
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VENABLE = L
b
Rs = 0.2Ω; Vi ≤ 0.45 V 1
120
mA

VDIAG Diagnostic Output Voltage

) -
IDIAG = 10 mA 0.4 V
(pin 5)

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IDIAG Diagnostic Leakage Current VDIAG = 40V 10 µA
(pin 5)
Vpin 8
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OP AMP and OTA CD Voltage Vpin 10 = 100 to 800 mV 5
Vpin 10 Gain (°°)
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VSENS

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Sensing Voltage (pin 10) (°°°) 0.9 V

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(°) After a time interval tmax = KC2, the output stages are disabled.

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(°°) See the block diagram.
(°°°) Allowed range of VSENS without intervention of the short circuit protection.

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 L294

CIRCUIT OPERATION
The L294 work as a trasconductance amplifier: it to t1. The peak current Ip depends on Vi as shown
can supply an output current directly proportional in the typical transfer function of fig.3.
to an input voltage level (Vi). Fyrthermore, it allows It can be seen that for Vi lower than 450 mV the
complete switching control of the output current device is not operating.
waveform (see fig. 1).
For Vi greater than 600 mV, the L294 has a tran-
The following explanation refers to the Block Dia- sconductance of 1A/V with Rs = 0.2Ω. For Vi in-
gram, to fig. 1 and to the typical application circuit cluded between 450 and 600 mV, the operation is
of fig. 2. not guaranteed.
The ton time is fixed by the width of the Enable input The order parts of the device have protection and
signal (TTL compatible): it is active low and enables diagnostic functions. At pin 3 is connected an ex-
the output stages "source" and "sink". At the end of ternal capacitor C2, charged at costant current
ton, the load current Iload recirculates through D1 when the Enable is low.
and D2, allowing fast current turn-off.
After a time interval equal to K C2 (K is defined in
The rise time tr, depends on the load charac- the table of Electrical Characteristics and has the
teristics, on Vi and on the supply voltage value (Vs, dimensions of ohms) the output stages are
pin 1). During the ton time, Iload is converter into a switched off independently by the Input signal.
voltage signal by means of the external sensing
This avoids the load being driven in conduction for
resistance Rs connected to pin 10. This signal,
amplified by the op amp and converted by the
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an excessive period of time (overdriving protection).
transconductance amplifier OTA, charges the exter-
nal RC network at pin 8 (R1, C1). The voltage at this
c t(
The action of this protection is shown in fig. 1b. Note
that the voltage ramp at pin 3 starts whenever the
pin is sensed by the inverting input of a comparator.
The voltage on the non-inverting input of this one
d u
Enable signal becomes active (low state), regard-
less of the Input signal. To reset pin 3 and to restore
is fixed by the external voltage Vi (pin 7).
r o
the normal conditions, pin 9 must return high.
After tr, the comparator switches and the output
stage "source" is switched off. The comaprator out-
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This protection can be disabled by grounding pin 3.
The thermal protection included in the L294 has a
put is confirmed by the voltage on the non-inverting
input, which decreases of a costant fraction of Vi
hysteresis.

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It switches off the output stages whenever the
(1/10), allowing hysteresis operation. The current in
the load now flow through D1. o
junction temperature increases too much. After a
s
Two Cases are possible: the time constant of the
recirculation phase is higher than R1.C1; the time
Ob fall of about 20°C, the circuit starts again.
Finally, the device is protected against any type of
constant is lower than R1.C1. In the first case, the
)
voltage sensed in the non-inverting input of the - short circuit at the outputs: to ground, to supply and
across the load.

( s
comparator is just the value proportional to Iload. In
When the source stage current is higher than 5A

ct
and/or when the pin 10 voltage is higher then 1V
the second case, when the current decreases too
(i.e. for a sink current greater than 1V/Rs) the output
stored in the R1 C1 network.
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quickly, the comparator senses the voltage signal stages are switched off and the device is inhibited.

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In the first case t1 depends on the load charac-
This condition is indicated at the open-collector
output DIAG (pin 5); the internal flip-flop F/F
P
teristics, while in the second case it depends only
on the value of R1. C1.
e
changes and forces the output transistor into satu-
ration. The F/F must be supplied independently

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In the other words, R1. C1 fixes the minimum value
of t1 )t1 ≥ 1/10 R1.C1. Note that C1 should be
through Vss (pin 4). The DIAG signal is reset and
the output stages are still operative by switching the

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chosen in the range 2.7 to 10 nF for stability reasons
of the OTA).
device on again. After that, two cases are possible:
the reason for the "bad operation" is still present

O b
After t1, the comparator switches again: the output
is confirmed by the voltage on the non-inverting
and the protection acts again; the reason has been
removed and the device starts to work properly.
input, which reaches Vi again (hysteresis).
Now the cycle starts again: t2, t4 and t6 have the
same characteristics as tr, while t3 and t5 are similar

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 L294

Figure 1. Output Current Waveforms.

Figure 2. Test and Typical Application Circuit.

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D1 : 3A fast diode
} trr ≤
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200 ns

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Voltage.
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Figure 3. Peak Output Current vs. Input Figure 4. Output Saturation Voltage vs.
Peak Output Current.

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L294

Figure 5. Safe Operating Areas. Figure 6. Turn-off Phase.

CALCULATION OF THE SWITCHING TIMES

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Referring to the block diagram and to the waveforms of fig. 1, it is possible to calculate the switching times
by means of the following relationships.

tr = −
L
In (1 −
RL
• Ip )
where : V1 = Vs - Vsat L - Vsat H _ VR sens
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RL V1
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tf = −
L
In
V2
V2 + RL • Io
where : V2 = Vs + VD1 + VD2
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RL
IK ≤ Io ≤ Ip
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t
Io is the value of the load current at the end of ton.
le
so
t1 = t3 = t5 = ... L 0.9 Ip • RL + V3 where
 a) − In V3 = Vsat L + VR sens + VD1
=


RL

Ob
Ip RL + V3

b) − R1 C1 In 0.9 ≅
1

) - 10
R1 C1

t2 = t4 = t6 = ...
= −
L
(
In ( s
V1 − Ip RL
)

u
RL
ct V1 − IK RL
Note that the time interval t1 = t3 = t5 = ... takes the longer value between case a) and case b). The switching
frequency is always :
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Pr fswitching =
1
t1 + t2

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In the case a) the main regulation loop is always closed and it forces :

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IK = (0.9 ± S) Ip where : S = 3 % @ Vi = 1 V
S = 1.5 % @ Vi = 4 V

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In the case b), the same loop is open in the recirculation phase and IK, which is always lower than 0.9 Ip,
is obtained by means of the following relationship.
t1 RL V3 t1 RL
IK = Ip e − − (1 − e − )
L RL L
With the typical application circuit, in the conditions Vs = 40V, Ip = 4A, the following switching times result:
tr = 255 µs tf = 174 µs @ Io = Ip

a) 70 µs
t1 = b) 16 µs t2 = 29 µs f = 10.2 KHz

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 L294

mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX. OUTLINE AND
A 5 0.197 MECHANICAL DATA
B 2.65 0.104
C 1.6 0.063
D 1 0.039
E 0.49 0.55 0.019 0.022
F 0.88 0.95 0.035 0.037
G 1.45 1.7 1.95 0.057 0.067 0.077
G1 16.75 17 17.25 0.659 0.669 0.679
H1 19.6 0.772
H2 20.2 0.795
L 21.9 22.2 22.5 0.862 0.874 0.886
L1 21.7 22.1 22.5 0.854 0.87 0.886
L2 17.4 18.1 0.685 0.713
L3 17.25 17.5 17.75 0.679 0.689 0.699

s)
t(
L4 10.3 10.7 10.9 0.406 0.421 0.429
L7
M
2.65
4.25 4.55
2.9
4.85
0.104
0.167 0.179
0.114
0.191
u c
M1 4.73 5.08 5.43 0.186 0.200 0.214
od
S
S1
1.9
1.9
2.6
2.6
0.075
0.075
0.102
0.102
P r
Multiwatt11 V
Dia1 3.65 3.85 0.144 0.152
te
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 L294

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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted

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by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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© 2003 STMicroelectronics - All rights reserved

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