XDPL8105 - Digital Flyback Controller IC: About This Document

XDPL8105 - Digital Flyback Controller IC
XDP™ digital power
Datasheet
About this document

Scope and purpose
This document contains information about Infineon high-performance single-stage digital flyback controller
XDPL8105 for LED lighting applications. Features and electrical characteristics are listed and explained.
Intended audience
This document is intended for customers wishing to design high-performance single-stage digital flyback AC-
DC converters for LED lighting based on the XDPL8105 controller
2016-09-28 1 Rev. 1.0

Datasheet
Revision History
Revision History
Page or Item Subjects (major changes since previous revision)
Rev. 1.0, 2016-09-28
Datasheet 2 Rev. 1.0

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Datasheet
Table of Contents
About this document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1 Pin configuration and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Controller features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.1 Primary side voltage and current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2.1.1 Input current sensing via pin CS and output current calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1.2 Input voltage sensing via pin ZCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1.3 Output voltage sensing via pin ZCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.2 Primary side control scheme for output current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2.3 Power factor correction (PFC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.4 Dimming via pin DIM/UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.5 Isolated dimming interface with CDM10V (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.6 Wide output load voltage range circuit (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.7 Automatic output discharge circuit (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.8 VCC startup function combined with direct input monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.9 Configurable soft start and output charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.10 Configurable gate voltage rising slope at pin GD (Lower EMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.1 Undervoltage lockout for VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.2 Overvoltage protection for VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.3 Over / undervoltage protection for output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.4 Over / undervoltage protection for input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.5 Input overcurrent detection level 1 (OCP1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.6 Input overcurrent protection level 2 (OCP2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.7 Output overcurrent protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.8 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.3.9 Firmware protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.4 Configuration and support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.4.1 Configuration procedure and design-in support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.4.2 Overview configurable parameters and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.4.3 Debug mode support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.1 Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
3.4 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4 Outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

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Overview
Product highlights
• Highly accurate primary side controlled output current (Line/load regulation typical within +/- 3%)
• High power quality (typical PF up to 0.99 and THD < 10%)
• High Efficiency (up to 91%)
• Configurable output current with no BOM change
• Supports universal input voltage (85 – 305 V AC)
• Supports wide output load voltage (up to 4 times of minimum output load voltage)
• Ideal for application with dimming signal from micro-controller on primary side
• Supports fully isolated 0 – 10 V dimming with Infineon CDM10V
• Supports low output current dimming.
• Low standby power
Features
• Single stage QR Flyback with PFC and high precision primary side controlled constant current output
• Excellent line and load regulation
• Supports AC input (45 ~ 65 Hz) and/or DC input voltage operation
• Integrated 600 V startup cell
• Low Bill Of Material (BOM)
• Configurable parameters, e.g. adjustable voltage and current ranges, protection modes
• Supports non-dimmed and/or dimmed applications.
• Intelligent thermal management with adaptive thermal protection
Applications
• Electronic control gear for LED luminaires (5 W to 80 W)
Description
The XDPL8105 is a high performance microcontroller-based digital single-stage flyback controller with power
factor correction (PFC) for constant output current applications. The IC is available in a DSO-8 package and
supports a wide feature set, requiring a minimum of external components. The digital engine offers the
possibility to configure operational parameters and protection modes, which helps to ease the design phase
and allows a reduced number of hardware variants in production. Accurate primary side output current
control is implemented to eliminate the need for secondary side feedback circuitry.
Table 1
Product Type Package
XDPL8105 PG-DSO-8

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85 … 305 Vac
Output
External Vcc supply
VCC
Internal
HV Zero crossing ZCD
temperature
detection
sensor
Startup cell GD
control
XDPL8105 PWM
Square wave Dimming / Current CS

generator UART sensing
SQW DIM/UART GND
PWM
Dimming
signal
Primary side RC Low

Micro-controller Pass Filter
Parameters
Configuration
Figure 1 Typical application 1 (Primary side micro-controller dimming)
85 … 305 Vac
Output
VCC
Internal
HV Zero crossing ZCD
temperature
detection
sensor
Startup cell GD
control
XDPL8105 PWM
Square wave Dimming / Current CS

generator UART sensing Isolated Dimming
Circuit with CDM10V
Vcc
SQW DIM/UART GND
Iout Rdim+
CDM10V
Digital to
Analog 0 – 10 V
conversion input
Parameters
Configuration
Figure 2 Typical application 2 (Secondary side 0-10V dimming)

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Pin configuration and description
1 Pin configuration and description

The pin configuration is shown in Figure 3. The pin functions are listed and described in Table 2.
ZCD 1 8 GND
DIM/UART 2 7 VCC
CS 3 6 SQW
GD 4 5 HV
PG-DSO-8 (150mil)
Figure 3 Pin configuration
Table 2 Pin definitions and functions

Symbol Pin Type Function
ZCD 1 I Zero crossing detection
Pin ZCD is connected to an auxiliary winding via the resistor divider for zero
crossing detection. Output & input voltage are also measured with the
sampled positive & negative voltage sensing.
DIM/UART 2 I/O Dimming / UART
Shared functioning pin with either as dimming Input or UART configuration.
The dimming input voltage, VDIM sensing range is from 0.1 to 2V. Once the pin
voltage exceeds 2.2V (for example when the isolated USB interface board is
connected to the IC), this pin will function as UART configuration and the IC
will stay in non-dimming operation unless it is reset or restarted.
CS 3 I Current sense
Pin CS is connected to an external shunt resistor and the source of the power
MOSFET.
GD 4 O Gate driver
Output signal to drive an external power MOSFET.
HV 5 I High voltage
Pin HV is connected to the rectified input voltage via external resistor. An
internal 600 V HV startup-cell is used to pre-charge VCC for IC startup once the
mains input voltage is applied. Furthermore sampled high voltage sensing is
used for synchronization with the input voltage frequency.
SQW 6 O Square wave generator
Pin SQW is capable of providing a square wave signal for driving the isolated
dimming transformer circuit, if necessary. Otherwise, this signal can be
turned off by parameter configuration.
VCC 7 I Voltage supply
IC power supply
GND 8 — Power and signal ground

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Functional description
2 Functional description
The functional description provides an overview about the integrated functions and features as well as their
relationship. The mentioned parameters and equations are based on typical values at TA = 25 °C. The
corresponding min. and max. values are shown in the electrical characteristics.
2.1 Introduction
The XDPL8105 is a digital AC/DC flyback controller with Power Factor Correction (PFC). The PFC function
enables a rectified sinusoidal input current waveform with a power factor typically up to 0.99 and THD < 10%
for a wide range of operating conditions. XDPL8105 provides primary side constant output current control that
avoids the secondary side control feedback loop circuitry usually needed in isolated power converters. This
approach supports a low part count that is necessary to build up the application. XDPL8105 has multi-mode
operations and it selects the best mode of operation based on operating conditions. The multi-mode
operation will automatically switch between quasi-resonant mode (QRM) and discontinuous mode (DCM) and
active burst mode (ABM). In addition, XDPL8105 supports both secondary side 0 - 10 V dimming and primary
side micro-controller dimming application. Digital and RF interfaces can be supported by a microcontroller
using a digital-to-analog converter.
The XDPL8105 provides a high flexibility in the design-in of the application. A graphic user interface (GUI) tool
called .dp Vision supports users to tune a set of configurable parameters. The configuration can be done via a
single pin UART interface at pin DIM/UART.
2.2 Controller features

Table 3 gives an overview about the controller features that are described in the mentioned chapters.
Table 3 Controller features

Primary side voltage and current sensing Chapter 2.2.1
Primary side control scheme for output current control Chapter 2.2.2
Power factor correction (PFC) Chapter 2.2.3
Dimming via pin DIM/UART Chapter 2.2.4
Isolated dimming interface with CDM10V (optional) Chapter 2.2.5
Wide output load voltage range circuit (optional) Chapter 2.2.6
Automatic output discharge circuit (optional) Chapter 2.2.7
VCC startup function combined with direct input monitoring Chapter 2.2.8
Configurable soft start and output charging Chapter 2.2.9
Configurable gate voltage rising slope at pin GD (Lower EMI) Chapter 2.2.10

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2.2.1 Primary side voltage and current sensing

The XDPL8105 provides a primary side control of the output current by means of measuring the input peak
current and measuring the conduction period of the output diode. Input and output voltages are measured at
pin ZCD using an external resistor divider and an auxiliary winding of the transformer. The voltage signal VAUX
contains the information of the rectified input voltage Vin and the output voltage Vout at the secondary side.
Figure 4 shows typical current and voltage waveforms of the Quasi-Resonant flyback application.
The following topics are described:
• Input current sensing via pin CS and output current calculation (Chapter 2.2.1.1)
• Input voltage sensing via pin ZCD (Chapter 2.2.1.2)
• Output voltage sensing via pin ZCD (Chapter 2.2.1.3)
VAUX
N_a
V AUX = VOut ×
N_s
Zero crossing detection
0V
N _a `
V AUX = −Vin × Valley switching
N_p
Ip Is
t + +
Vin Vout
tsample1 tsample2
- -
ITrafo N_p N_s

Tperiod N_a
Is(pk) +
VAUX
Ip(pk) -
Is
Ip Ip
t
tdemag
VGD
ton
t
Figure 4 Typical waveforms (Example with QRM valley switching)

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2.2.1.1 Input current sensing via pin CS and output current calculation
The output current Iout is determined by the primary input peak current Ip,pk which is sensed at pin CS at time
tsample1, by the duration of conduction of the output diode (tsample2 - tsample1) and by the switching period tperiod.
The result is used for the control loop and for output overcurrent protections (Chapter 2.3.7).
2.2.1.2 Input voltage sensing via pin ZCD

The input voltage is measured using current IIV at pin ZCD at time tsample1. As the voltage VAUX is a negative
voltage, pin ZCD is clamped to a fixed negative voltage VINPCLN (Figure 5). The negative current IIV (flowing out
of pin ZCD) is proportional to the input voltage. The monitored input voltage is used for input over- and
undervoltage protection (Chapter 2.3.4).
N_a N_p
Input
R_ZCD_1 VIN filter cap
ZCD IIV
VAUX
VINPCLN R_ZCD_2 GD
Figure 5 Input voltage sensing via pin ZCD
2.2.1.3 Output voltage sensing via pin ZCD

The output voltage is measured using voltage VZCDSH at pin ZCD at time tsample2 (Figure 6). The measured
voltage at pin ZCD and the dimensioning of the resistor divider are used to calculate the reflected output
voltage at the auxiliary winding. The sensed output voltage is used for output over- and undervoltage
protection (Chapter 2.3.3). The relation between VCC and ZCD can be decoupled by adding a voltage
regulator for VCC (Chapter 2.2.6).
V _out_diode_drop
N _a N _s
R _ZCD_1
ZCD V Out
V AUX
R _ZCD_2
V ZCDSH
Figure 6 Output voltage sensing via pin ZCD
Note: Please note that the time (tsample2 - tsample1) has to be longer than 2.0 µs to ensure that the reflected output
voltage can be correctly sensed at pin ZCD!

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2.2.2 Primary side control scheme for output current control

The basic control scheme for the primary side constant current control is shown in Figure 7.
R_ZCD_1 Zero crossing
ZCD
detection
R_ZCD_2
N_a
Output current Moving

PI PWM GD
calculation average filter -
+
Peak input
CS min
current detection
Intelligent
N_p R_CS
thermal
management
VIN
DIM/ Dimming
UART curve
Figure 7 Integrated PI control scheme for output current control
The sampled signal VCS at pin CS and zero crossing detection at pin ZCD are used to estimate the output
current Iout as described in Chapter 2.2.1.1. The internal reference current I_out_set is weighted according to
thermal management and dimming curve. The average estimated output current is compared with the
weighted reference current to generate an error signal. The error signal is fed into a PI regulator to control the
PWM at pin GD for the power MOSFET. The coefficients of the PI regulator are configurable.
The PI regulator allows different modes of operation as shown in Figure 8:
• Quasi-resonant mode (QRM)
This mode controls the on-time and maximizes the efficiency by switching on at the 1st valley of the VAUX
signal. This ensures zero-current switching with a minimum of switching losses.
• Discontinuous mode (DCM)
This mode is used if the on-time cannot be reduced further in QRM while the output is being dimmed. The
controller will extend the switching period later than the 1st valley to control the output power.
• Active-Burst mode (ABM)
To extend the dimming range even further, XDPL8105 features an ABM which is automatically aligned with
the input frequency to avoid any undesired effects like flicker or shimmer as well as to reduce any audible
noise.
The controller will autonomously select the best mode of operation based on operation conditions like input
voltage, input frequency and dimming input voltage which defines the output power.

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Power
t_on_max
On-time controlled
QRM
t_on_min
f_sw_max or QR switching frequency (with t_on_min)

DCM Frequency controlled
f_sw_min_DCM
ABM Pulse number controlled
Figure 8 Overview of operation modes
2.2.3 Power factor correction (PFC)

The gate driver GD is used for driving the power MOSFET of the flyback. Constant output current regulation
and a sinusoidally shaped input current are achieved by on-time control. The quasi-constant on-time ton
ensures high PF and low THD performance. The internal control signal ton is calculated by the digital engine so
that the output current is close to the target current (Chapter 2.2.2).
Optionally, an enhanced PFC (EPFC) scheme can be enabled to compensate the input current distortion
caused by the EMI filter1). In this scheme, the on-time is a function of the internal controller signal ton, the input
voltage Vin, output voltage Vout, output current Iout, phase angle and a configurable gain parameter (C_EMI)
optimizing the input current waveform (Chapter 2.4).
2.2.4 Dimming via pin DIM/UART

The voltage sensed at pin DIM/UART is used to determine the output current level. Figure 9 shows the relation
of DIM/UART voltage to the output current target value. Levels of V_DIM_min and V_DIM_max2) ensure that
minimum current I_out_dim_min and maximum current I_out_set can always be achieved, making the application
robust against dimmer and other component tolerances. The sampled voltage VDIM at pin DIM/UART is digitally
filtered to stabilize light output. The XDPL8105 can also be configured to use a linear or a quadratic dimming
curve.
Iout Iout
I_out_set I_out_set
I_out_dim_min I_out_dim_min
VDIM/UART VDIM/UART
2.0V 2.0V
V_DIM_max
V_DIM_max
V_DIM_min
V_DIM_min
Figure 9 Dimming curves based on pin DIM/UART voltage
1) Patent pending
2) fixed at 1.72V

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Optionally, the dim-to-off feature can be enabled by parameter EN_DIM_TO_OFF, so that the output current can
be turned off and on with DIM/UART pin voltage of V_DIM_off and V_DIM_on respectively.
Iout Iout
I_out_set I_out_set
I_out_dim_min I_out_dim_min
VDIM/UART VDIM/UART
V_DIM_max
2.0V 2.0V
V_DIM_max
V_DIM_min
V_DIM_min
V_DIM_off
V_DIM_on
V_DIM_off
V_DIM_on
Figure 10 Dimming curves based on pin DIM/UART voltage (with dim-to-off feature enabled)
Note: The dim-to-off feature requires an active voltage source to exit the dim-to-off state.
In some cases where the dimming control circuitry is on the primary side and it is using PWM control, please
use the RC low pass filter circuit which will convert the PWM dimming signal to an analog dimming voltage for
measurement on pin DIM/UART.
2.2.5 Isolated dimming interface with CDM10V (optional)

Figure 11 shows an exemplary schematic of a 0-10V dimming interface for low BOM cost, using CDM10V by
Infineon. CDM10V is a fully integrated 0-10V dimming interface IC which transmits secondary side analog
voltage based signals from 0-10V dimmer to primary side, by driving an external opto-coupler with a 5mA
current based PWM signal. The secondary auxiliary winding is necessary to supply the operating voltage of
CDM10V. For more details about CDM10V, please visit Infineon website: http://www.infineon.com/cdm10v
Figure 11 Optional circuit for isolated dimming with CDM10V

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2.2.6 Wide output load voltage range circuit (optional)

If wide output load voltage is required, a regulator for VCC is required. This regulator limits the maximum
voltage at pin VCC during steady state operation. Figure 12 shows an exemplary schematic for the optional
wide output voltage range support. A wide output voltage range impacts efficiency due to the necessary
voltage regulator for VCC.
RVCCreg
CVCCreg
ZDVCCreg
VCC
CVCC
GND
Figure 12 Optional wide output voltage range circuit
2.2.7 Automatic output discharge circuit (optional)

In case of a fault (e.g. Open Load) the output capacitors stay charged and may keep a high voltage. It is
therefore recommended to add an automatic output discharge circuit. This circuit discharges the output
capacitors if the main switch stops switching. For the circuit design, please refer the schematic in the
application note of the XDPL8105 40W reference design with CDM10V.
2.2.8 VCC startup function combined with direct input monitoring

There are two main functions supported at pin HV which needs to be connected to the input voltage via
resistor and two diodes.
The integrated HV startup-cell is switched on during the VCC startup phase before the IC is activated. Current
flows from pin HV to pin VCC via an internal diode, which charges the capacitor at pin VCC. Once the voltage
at pin VCC exceeds the VVCCon threshold, the IC enables the active operating phase and switches off the HV
startup-cell.
Furthermore, a direct input monitoring is supported that is controlled by an internal timer. The timer switches
on the HV startup cell for a very short time after a defined period. During this short on-time the current is
sensed at pin HV by a comparator to synchronize to frequency and phase of the input voltage.
2.2.9 Configurable soft start and output charging

After startup condition(e.g. input voltage, junction temperature) is checked within the limits, the IC initiates a
soft-start. During soft-start, the switching stress for the power MOSFET, diode and transformer is minimized.
The cycle-by-cycle current limit is increased in steps with a configurable time t_ss for each step. The number of
soft start steps is defined by parameter n_ss1). After startup pin CS maximum voltage limit of V_start_OCP1 level
has been reached, the output will be charged up with maximum on-time and V_start_OCP1 level to the minimum
output voltage that ensures self-supply, V_out_start but below the fully dimmed minimum output LED voltage,
V_out_dim_min. After the output voltage reaches V_out_start level, the output constant current control loop
1) fixed at 3

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Datasheet
(Chapter 2.2.2) takes over and the pin CS maximum voltage limit will be changed from V_start_OCP1 to V_OCP1
level.
Voltage Startup
Soft start phase Output charging Output current
phase Regulated Mode Vout
V_out_dim_min
V_out_start
Control loop
initialization
V_OCP1 CS pin max voltage limit
Startup Check V_start_OCP1
(e.g. input voltage,
IC temperature)
0 tSS 2 tSS 3 tSS tout,charge time
Figure 13 Configurable soft start and output charging phase
2.2.10 Configurable gate voltage rising slope at pin GD (Lower EMI)

The gate driver output signal can be configured with respect to the rising slope for switching on the power
MOSFET. This feature can save BOM components (1 diode & 1 resistor) which are conventionally added to
achieve the same purpose for EMI improvement. The maximum gate drive current I_GD_pk for the gate driver
slope can be set between 30 mA and 118 mA (Chapter 2.4). Figure 14 shows the gate driver output signal.
V GD
10.5V
I _GD_pk
=118m A
I _GD_pk
= 30m A
t
Figure 14 Configurable gate voltage rising slope for lower EMI

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2.3 Protection features

Table 4 gives an overview about the available protection features and corresponding default actions in case
a protection feature is triggered. Two protection reactions (auto restart mode and latch mode) are
implemented.
Auto restart mode

Once the auto restart mode is activated, the IC stops the power MOSFET switching at pin GD and reduces the
current consumption to a minimum. After the configurable auto restart time t_auto_restart the IC initiates a new
start-up1). During this auto restart, the HV startup-cell is switched on and off in order to keep the VCC between
VUVLO and VOVLO thresholds2). The auto restart cycle starts first with charging the VCC capacitor by means of
switching on the HV startup cell until the VVCCon threshold is exceeded. A regular startup procedure with soft
start is initiated afterwards.
Latch mode
When latch mode is activated, the power MOSFET switching at pin GD is immediately stopped. The HV startup-
cell is switched on and off in order to keep the VCC between VUVLO and VOVLO thresholds. The device stays in this
state until input voltage is completely removed and the VCC voltage drops below the VUVLO threshold. The IC
can then be re-started by applying input voltage.
Table 4 Protection Features

Protection Feature Active Period Reaction Description
(if enabled)
Undervoltage lockout for VCC Always on Hardware restart Chapter 2.3.1
1)
Overvoltage protection for VCC Always on Latch mode Chapter 2.3.2
Overvoltage protection for Vout Always on Auto restart1) Chapter 2.3.3
2)
Undervoltage protection for Vout Activated after startup Auto restart Chapter 2.3.3
Startup Undervoltage protection for Vout During startup Auto restart Chapter 2.3.3
Overvoltage protection for Vin Always on 2)
Latch mode Chapter 2.3.4
Undervoltage protection for Vin Always on 2)
Auto restart Chapter 2.3.4
Input overcurrent detection level 1 Always on Current limiting Chapter 2.3.5
Input overcurrent protection level 2 Always on Latch mode Chapter 2.3.6
Output current protection (average) Activated after startup 2)
Auto restart Chapter 2.3.7
Output current protection (peak) Activated after startup2) Auto restart Chapter 2.3.7
Overtemperature protection Always on Latch mode Chapter 2.3.8
Firmware protections Always on Auto restart Chapter 2.3.9
(1st Watchdog & RAM Parity)
1) Protection which its reaction can be configured to either auto restart mode or latch mode.
2) Protection which can be disabled or enabled by configuration.
1) After t_auto_restart, the VCC will be charged to VVCCon again(see Chapter 2.2.8). Therefore, the effective auto-restart time is longer
than t_auto_restart
2) This feature can be disabled for applications with externally supplied VCC.

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2.3.1 Undervoltage lockout for VCC

An undervoltage lockout unit (UVLO) is implemented which ensures a defined enabling and disabling of the IC
operation depending on the supply voltage at pin VCC. The UVLO contains a hysteresis with the voltage
thresholds VVCCon for enabling the IC and VUVOFF for disabling the IC. Once the mains input voltage is applied,
current flows through an external resistor into pin HV via the integrated diode to pin VCC. The IC is enabled
once VCC exceeds the threshold VVCCon and enters normal operation if no fault condition is detected. In this
phase VCC will drop until the self supply via the auxiliary winding takes over the supply at pin VCC. For proper
startup, the output voltage of V_out_start level for Vcc self supply via auxiliary winding must be in place before
VCC falls below VUVOFF threshold and before timeout of t_start_max for the startup output undervoltage
detectionoccurs (See Chapter 2.3.3)
2.3.2 Overvoltage protection for VCC

Overvoltage detection at pin VCC is implemented via a threshold of V_VCC_max.
2.3.3 Over / undervoltage protection for output voltage

Overvoltage (e.g. Open Load) or undervoltage (e.g. Output short) detection of the output voltage Vout is
provided by the measurement and calculation as described in Chapter 2.2.1.3. The overvoltage protection
reaction (auto-restart or latch) and detection thresholds V_outOV are configurable. For output overvoltage
protection in auto-restart reaction, either slow or fast auto-restart can also be selected.
Please note that there are possibilities where critical protection like output over-voltage not working properly
(example: wrong parameter configurations loaded). Thus, please consider adding zener diode or any voltage
suppressor device/circuit on output for reinforced safety purpose.
Note: It is mandatory to have output discharge resistor/circuit which discharges the output capacitor after
triggering open load protection at V_outOV. Latch reaction is recommended for open load protection as
it can shut down the unit to prevent output overcharged if the discharge resistor ohmic value is too high.
Vout
Triggering of output OVP With fast auto‐restart enabled and

with output dummy resistor (passive)
V_outOV
With slow auto‐restart and with
output dummy resistor (passive)
Removal of LED load (output open)
With slow auto‐restart and with
output discharge circuit (active)
Start of control-loop
V_out_dim_min
V_out_start
Turn-on
time
Startup Regulated Mode Auto-restart
protection
Figure 15 Voltage threshold for output overvoltage protection

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The undervoltage protection reaction is fixed as auto-restart and its detection threshold V_outUV is fixed at 50%
of the configurable fully dimmed minimum output load voltage parameter, V_out_dim_min. Output undervoltage
protection is disabled during the startup phase.
Vout
Output short
Start of control-loop
V_out_dim_min Output UVP
V_out_start triggered after
t_Vout_blank
V_outUV
Turn-on
time
Startup Regulated Mode
Figure 16 Voltage threshold for output undervoltage protection
In case of output short/undervoltage, the auxiliary winding cannot provide power to VCC during startup
because the output voltage stays below V_out_start or V_outUV. Therefore, the startup output undervoltage
protection is triggered if the output voltage has not reached V_out_start before a configurable timeout of
t_start_max occurs during the startup phase. To ensure that the startup undervoltage protection is in auto-
restart reaction, the pin VCC capacitance has to be high enough to maintain the VCC above VUVOFF threshold
long enough until the timeout of t_start_max occurs during the startup phase.
Vout
Startup Output
UVP triggered
V_out_dim_min
V_out_start
V_outUV
Turn-on
time
t_start_max
Figure 17 Voltage and timing threshold for startup output undervoltage protection
2.3.4 Over / undervoltage protection for input voltage

An over / undervoltage detection of the input voltage Vin is provided by the measurement and calculation as
described in Chapter 2.2.1.2. The Vin rms value is calculated based on the measured Vin peak value and
compared to the configurable internal input over / undervoltage protection thresholds V_inOV and V_inUV
(Chapter 2.4).

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Figure 18 shows an exemplary setting of both over- and undervoltage thresholds together with configurable
startup thresholds V_in_start_min and V_in_start_max to create hysteresis for flicker-free operation at auto-restart.
V in
Shut-off
V_inOV
V_in_start_max
Turn-on
Turn-on Turn-on
V_in_start_min (Brown-in level)

V_inUV (Brown-out protection level)
Shut-off
Figure 18 Voltage threshold for input over / undervoltage protection
2.3.5 Input overcurrent detection level 1 (OCP1)

The input overcurrent protection level 1 is performed by means of the cycle-by-cycle peak current limitation
to V_OCP1. A leading edge blanking, t_CSLEB prevents the IC from falsely switching off the power MOSFET due to
a leading edge spike.
2.3.6 Input overcurrent protection level 2 (OCP2)

The input overcurrent protection level 2 is meant for covering fault conditions like a short in the transformer
primary winding. In this case overcurrent protection level 1 will not limit properly the peak current due to the
very steep slope of the peak current. Once the threshold V_OCP2 is exceeded for longer than t_CSOCP2, the
protection is triggered.
2.3.7 Output overcurrent protections

The XDPL8105 includes protections against exceeding an average and peak current limit. The average output
current is calculated over one half cycle of the input frequency to remove the output current ripple. With auto-
restart reaction, either slow auto-restart or fast auto-restart can be selected.
2.3.8 Overtemperature protection

XDPL8105 offers a conventional as well as an adaptive overtemperature protection scheme using an internal
temperature sensor.
Note: Please note that the internal temperature sensor may not be able to sense and protect the temperature
of external components (e.g. power MOSFET, VCC regulator) without sufficient thermal coupling.
Conventional overtemperature protection

The overtemperature protection initiates a thermal shutdown once the internal temperature detection level
T_critical is reached. With latch mode protection, IC will turn off and only restart after recycling of input power.
At startup, junction temperature has to be below T_start.

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Iout
Latch Reset
TJ
T_start T_critical
Or below
Figure 19 Conventional temperature protection
Adaptive temperature protection

To protect load and driver against overtemperature, XDPL8105 features a reduction of output current below
maximum current I_out_set. As long as temperature T_hot is exceeded, the current is gradually reduced as shown
in Figure 20. If a reduction down to a minimum current I_out_red is not able to compensate the increase of
temperature, the overtemperature protection (with latch mode) is entered when T_critical is reached.
Iout Iout
I_out_red … I _out_set I_out_red … I _out_set t_step

I_out_step
I _out_red I _out_red
TJ = T_hot T_hot <TJ<T_critical T_hot =TJ<T_critical TJ<T_hot TJ =T_hot
Latch Reset
TJ time
T_start T_hot T_critical
Or below
Figure 20 Adaptive temperature protection
2.3.9 Firmware protections

XDPL8105 includes several protections to ensure the integrity and flow of the firmware:
• A hardware watchdog triggers a protection in case the firmware does not service the watchdog within a
defined time period.
• A RAM parity check triggers a protection in case a bit in the memory flips.
• A cyclic redundancy check (CRC) at each startup verifies the integrity of firmware and parameters.
• A first firmware watchdog triggers a protection if the ADC hardware cannot provide all necessary
information within a defined time period. This may occur if timing requirements for the ADC are exceeded.
• A second firmware watchdog triggers a protection if the execution of protection checks and the control
loop are not matching a defined time period. This may occur if timing requirements are exceeded (e.g.
operation beyond frequency limits).

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2.4 Configuration and support

The configuration of XDPL8105 is supported by the GUI tool .dp vision provided by Infineon. This chapter
describes the configuration procedure via the UART interface. Furthermore, it contains an overview about the
parameters and functions that can be configured.
2.4.1 Configuration procedure and design-in support

Figure 21 shows the setup for the configuration of XDPL8105. The Infineon graphic user interface (GUI)
.dpVision connects to XDPL8105 via the isolated USB interface board called .dp Interface Gen2. The .dp
interface Gen 2 provides power via VCC to XDPL8105 and connects via UART interface at pin DIM/UART. The
common UART interface enables communication with the IC even without the interactive GUI tool. This allows
easy configuration during mass production.
When VCC exceeds the VVCCon threshold, XDPL8105 will sense pin DIM/UART for a UART connection. If power is
provided by VCC and no input voltage is applied at startup, XDPL8105 will enter configuration mode. Also,
XDPL8105 will enter configuration mode if no parameters have been programmed so far, regardless of input
voltage being applied or not.
Isolated USB VCC

PC with USB
interface DIM/UART IC
GUI tool
board GND
Figure 21 Setup for configuration of the IC
For project development, a graphic user interface called .dp Vision guides the designer through the
configuration of parameters. Further information on .dp Vision can be found in the .dp Vision User Manual
provided by Infineon.
For production and end user configuration, a simpler graphic user interface called XDP™ GUI is also available.
The configurable parameters and configuration range of each parameter in the XDP™ GUI can be customized
using the XDP™ GUI Builder software provided by Infineon. Please refer the user manual of this GUI Builder for
more details.
The dimensioning of the application design(e.g. transformer design, BOM selection, IC parameterization) can
be done easily with an excel tool named XDPL8105 system simulation & design creation tool. A XDPL8105
reference design with CDM10V is available from Infineon to demonstrate the features and performance. The
design guide presents the dimensioning process while the reference design application note presents the
board performance, fine tuning guide, debugging guide and frequently asked questions.
2.4.2 Overview configurable parameters and functions

The XDPL8105 provides a generic firmware version that includes all configurable parameters set to zero. The
parameter values need to be specified by the user according to the target application. Table 5 lists the
configurable parameters. Table 6 lists the non configurable parameters which the values are constant or
adapted internally according to the configurable parameters settings.
Table 5 List of configurable parameters

Description Parameter Example Configuration Range
Hardware configuration
Iout set point (non-dimmed) I_out_set 880 mA Calculated by GUI

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Table 5 List of configurable parameters (cont’d)

Transformer primary winding turns N_p 58 >0
Transformer secondary winding turns N_s 15 >0
Transformer auxiliary winding turns N_a 15 >0
Transformer nominal primary Inductance L_p 0.544 mH Calculated by GUI
Current sense resistor R_CS 0.22 ohm Calculated by GUI
Pin CS OCP1 limit during regulated mode V_OCP1 0.49 V Calculated by GUI
Pin ZCD series resistor R_ZCD_1 56.2 kohm Calculated by GUI
Pin ZCD shunt resistor R_ZCD_2 2.00 kohm Calculated by GUI
Vcc Voltage Supply Type VCC_SUPPLY Wide [External, Narrow,
Narrow_24.9V, Wide]
Vcc capacitor total capacitance C_VCC 15.0 uF Calculated by GUI
Output capacitor maximum Voltage Rating V_out_cap_rating 63 V ≥0
Pin HV series resistor R_HV 66 kohm Calculated by GUI
Gate driver peak source current I_GD_pk 49 mA 30 mA to 118 mA (with few
mA change per step)
Protections
Auto restart time t_auto_restart 1s 0.1 s to 25.5 s1)
Fast auto restart time t_auto_restart_fast 0.4 s 0.1 s to 25.5 s1)
Output OVP / Open Reaction Reaction_OVP_Vout Auto restart [Auto restart, Latch mode]
Auto restart speed for output OVP Speed_OVP_Vout Slow [Slow, Fast]
Output OVP threshold V_outOV 48.4 V V_out_dim_min to V_out_cap_rating
Enable output UVP / Short Protection EN_UVP_Vout Enabled [Enabled, Disabled]
Timeout for short detection at startup t_start_max 10.0 ms Calculated by GUI
Enable Maximum Average output OCP EN_Iout_max_avg Enabled [Enabled, Disabled]
Enable Maximum Peak output OCP EN_Iout_max_peak Enabled [Enabled, Disabled]
Maximum peak Output OCP threshold I_out_max_peak 1980 mA Calculated by GUI
Auto restart speed for output OCP Speed_OCP_Iout Slow [Slow, Fast]
Enable Input OVP EN_OVP_In Enabled [Enabled, Disabled]
Enable Input UVP EN_UVP_In Enabled [Enabled, Disabled]
2)
Input OVP threshold V_inOV 329 Vrms Calculated by GUI
2)
Maximum startup input voltage V_in_start_max 329 Vrms V_in_start_min to V_inOV
2)
Minimum startup input voltage V_in_start_min 72 Vrms V_inUV to V_in_start_max
2)
Input UVP threshold V_inUV 62 Vrms Calculated by GUI
Vcc OVP Reaction Reaction_VCCP Latch mode [Auto restart, Latch mode]
Enable Debug mode Debug_mode Disabled [Enabled, Disabled]
Temperature guard

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Overtemperature detection threshold T_critical 119 °C 110°C to (TJ(max) - 6°C)
Enable adaptive temperature protection EN_ITP Enabled [Enabled, Disabled]
Temperature to start derating of Iout T_hot 110 °C 0 °C to T_critical
Minimum Iout for adaptive temperature I_out_red 220 mA 0 mA to I_out_set
protection
Time step for each Iout derating t_step 10 s 2 s to 20 s
Startup & shutdown
Soft start timestep t_ss 0.5 ms Calculated by GUI
Minimum Vout when fully dimmed V_out_dim_min 11.9 V V_out_start to V_outOV
Vout to start constant current control loop V_out_start 9.5 V V_outUV to V_out_dim_min
Pin CS OCP1 limit after startup V_start_OCP1 0.49 V Calculated by GUI
Initial mode of operation control_loop_init DCM [ABM, DCM, QRM]
Initial DCM frequency at startup f_DCM_init 12 kHz f_sw_min_DCM to f_sw_max
Initial number of ABM pulses at startup N_ABM_init 100 Calculated by GUI
Control loop
QRM PI regulator proportional coefficient PI_KP_QRM 550 10 to 3000
QRM PI regulator integral coefficient PI_KI_QRM 8 1 to 1000
DCM PI regulator proportional coefficient PI_KP_DCM 17000 100 to 30000
DCM PI regulator integral coefficient PI_KI_DCM 200 10 to 10000
ABM PI regulator proportional coefficient PI_KP_ABM 64 1 to 600
ABM PI regulator proportional coefficient PI_KI_ABM 32 1 to 200
Dimming
Enable DImming EN_DIM Enabled [Enabled, Disabled]
Pin DIM/UART voltage for minimum Iout V_DIM_min 0.2 V V_DIM_off to V_DIM_max
Minimum Iout when fully dimmed I_out_dim_min 88 mA Calculated by GUI
Dimming curve shape C_DIM Quadratic [Linear, Quadratic]
Enable dim-to-off EN_DIM_TO_OFF Disabled [Enabled, Disabled]
Pin DIM/UART voltage for dim-to-off V_DIM_off 0.18 V 0.1 V to V_DIM_on
Pin DIM/UART voltage for dim-to-on V_DIM_on 0.19 V V_DIM_off to V_DIM_min
Enable Square Wave Output for pin SQW EN_SQW Disabled [Enabled, Disabled]
Multimode
Maximum switching frequency f_sw_max 180.8 kHz Calculated by GUI
Maximum on-time t_on_max 11.3 us Calculated by GUI
Minimum on-time t_on_min 1.1us 1 us to t_on_max
Minimum demagnetization time t_min_demag 3.0 us 2 us to 10 us
Minimum switching frequency in DCM f_sw_min_DCM 12 kHz 3 kHz to 20kHz

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Enable Active Burst Mode EN_ABM Disabled [Enabled, Disabled]
Enhanced PFC
Enhanced PFC compensation gain C_EMI 0.1000 uF ≥0
Fine tuning
ZCD propagation delay compensation t_ZCDPD 410 ns 0 ns to 1000 ns
CS Propagation delay compensation t_PDC 200 ns 0 ns to 1000 ns
Transformer coupling T_coupling 1.020 0.000 to 2.000
Input voltage drop compensation R_in 11.9 ohm ≥0
Switching period modulation attenuation N_DCM_mod_gain 8 [0, 4, 8, 16, 32]
Temperature compensation for VDIM a_DIM 0mV/K -8 mV/K to 8 mV/K
1) The auto-restart time has to be chosen sufficiently large enough to avoid a stepping up of the output voltage which
would exceed the output overvoltage level.
2) The input voltage levels refer to AC RMS voltage. If a programmed XDPL8105 is operated with both AC or DC, the
threshold for DC input voltage is 1.41 times the threshold for AC RMS input voltage.
Table 6 List of non-configurable parameters

Description Parameter Value Notes
Hardware configuration
Transformer primary leakage inductance L_p_lk L_p * 1% uH
Output diode voltage drop V_out_diode_drop 0.7 V
Gate driver high voltage V_GD 10.5 V
Protections
Output UVP / Short Reaction Reaction_UVP_Vout Auto restart
Output UVP threshold (at steady state) V_outUV V_out_dim_min
*50% V
Steady state Output UVP blanking time t_Vout_blank 1 ms
Maximum Average output OCP Reaction Reaction Auto restart
_Iout_max_avg
Maximum Average Output OCP threshold I_out_max_avg I_out_set *

150% mA
Maximum Peak output OCP Reaction Reaction Auto restart
_Iout_max_peak
Input OVP Reaction Reaction_OVP_Vin Latch mode

Input UVP Reaction Reaction_UVP_Vin Auto restart
Input OCP2 / Short Winding Reaction Reaction_OCP2 Latch mode
Vcc OVP Threshold V_VCC_max 24 V or 24.9V if VCC_SUPPLY = Narrow_24.9V,
24.9V. Otherwise, 24V
Hardware reaction for Firmware Protection Reaction_HW Auto restart
(Watchdog, RAM parity)

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Table 6 List of non-configurable parameters (cont’d)

Description Parameter Value Notes
Temperature guard
Overtemperature Reaction Reaction_TP Latch mode
Maximum startup temperature T_start T_hot -2°C or if EN_ITP = enabled, T_hot -2°C,
T_critical -2°C otherwise T_critical -2°C
Iout reduction in each derating step I_out_step I_out_set/80
Startup & shutdown
Number of soft start steps n_ss 3
Dimming
Pin DIM/UART voltage for maximum Iout V_DIM_max 1.72 V
Square-wave frequency for SQW pin f_SQW 160 kHz
Square-wave voltage for pin SQW V_SQW 7.5 V
Multimode
Minimum switching frequency in QRM f_sw_min_QRM 20 kHz
Enable DCM EN_DCM Enabled
Fine tuning
Spike blanking time for OCP2 trigger t_CSOCP2 240 ns
Leading edge blanking time t_CSLEB 480 ns
ZCD ringing suppression time t_ZCDring 1200 ns
Blanking time for CCM protection t_CCM 10 ms
Number of digital filter stages for VDIM N_DIM_Filter 6

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2.4.3 Debug mode support

If an unexpected system protection was triggered during testing, user can set parameter Debug_mode to
“Enabled”, which allows the firmware status code readout from the IC to debug which protection was
triggered.
For example in Figure 22, the firmware status code readout in the GUI shows a number of 0x0001 (in red
colour), which the description shows that the output over-voltage protection has been triggered. The
description of the status code will be shown automatically when the mouse pointer is hovered around the
status code.
Note: if there is no protection being triggered, the firmware status code should be 0x0000 (in black colour)
Figure 22 Firmware status code readout for debugging
Please kindly refer the application note for details on the necessary setup & procedures to read out the
firmware status code in debug mode.

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Electrical Characteristics
3 Electrical Characteristics
All signals are measured with respect to ground (pin 8). The voltage levels are valid if other ratings are not
violated.
3.1 Package Characteristics
Table 7 Package Characteristics

Parameter Symbol Limit Values Unit Remarks
min max
Thermal resistance from junction to RthJA — 178 K/W PG-DSO-81)
ambient
1) JEDEC 1s0p at Pv = 140 mW
3.2 Absolute Maximum Ratings

Absolute maximum ratings (Table 8) are defined as ratings which when being exceeded may lead to
destruction of the integrated circuit. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit. These values are not tested during production test.
Table 8 Absolute Maximum Ratings

min max
Voltage externally supplied at pin VCC -0.5 26 V
VCC
Voltage at pin GD VGD -0.5 VCC + 0.3 V
Voltage at pin SQW VSQW -0.5 VCC + 0.3 V
Ambient temperature TA -40 85 °C 136.4kHz < f_sw_max ≤ 180.8kHz
-40 105 °C f_sw_max ≤ 136.4kHz
Junction temperature TJ -40 125 °C 136.4kHz < f_sw_max ≤ 180.8kHz
1)
-40 150 °C f_sw_max ≤ 136.4kHz
Storage temperature TS -55 150 °C
Soldering temperature TSold — 260 °C Wave soldering2)
ESD capability HBM VHBM — 2000 V Excluding pin HV3)
ESD capability HBM VHBM — 1500 V Pin HV3)
Voltage at pin ZCD VZCD -0.5 3.6 V
Voltage at pin CS VCS -0.5 3.6 V
Voltage at pin DIM/UART VDIM/UART -0.5 3.6 V
4)
Maximum transient input clamping -ICLN_TR — 10 mA
for pins ZCD and CS

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Table 8 Absolute Maximum Ratings (cont’d)

min max
Maximum permanent input -ICLN_DC — 5 mA Permanently applied as DC
clamping current for pins ZCD and CS value
4)
Maximum negative transient input -VIN_ZCD — 1.5 V
voltage at pin ZCD
4)
Maximum negative transient input -VIN_CS — 3.0 V
voltage at pin CS
Maximum current into pin HV IHV — 10 mA
Voltage at pin HV VHV — 600 V
1) Auto-restart may be delayed at low input voltage condition when junction temperature is above 125°C
2) According to JESD22A111 Rev A
3) ESD-HBM according to ANSI/ESDA/JEDEC JS-001-2012.
4) Only valid during transitions, allowed for maximum 2 µs and with a duty cycle of maximum 10%. Values for DC
operation, see absolute maximum table.
3.3 Operating Conditions

Table 9 shows the recommended operating range where the electrical characteristics shown in Chapter 3.4
are valid for.
Table 9 Operating Range

min max
Lower VCC limit VCC VUVOFF — V Device is held in reset
when VCC < VUVOFF
Voltage externally supplied to VCC VCCext — 24 V Maximum voltage that can
pin be applied to pin VCC by
an external voltage source
Voltage at pin GD VGD -0.3 VCC + 0.3 V
Voltage at pin SQW VSQW -0.3 VCC + 0.3 V

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3.4 DC Electrical Characteristics

The electrical characteristics involve the spread of values given within the specified supply voltage and
junction temperature range, TJ from -40 °C to +125 °C. Typical values represent the median values related to
TA = 25 °C. All voltages refer to GND, and the assumed supply voltage is VCC = 18 V, if not specified otherwise.
The following characteristics are specified
• Power supply (Table 10)
• Clock Oscillators (Table 11)
• Internal temperature sensor (Table 12)
• Pin ZCD (Table 13)
• Pin DIM/UART (Table 14)
• Pin CS (Table 15)
• Pin GD (Table 16)
• Pin HV (Table 17)
• Pin SQW (Table 18)
Table 10 Electrical Characteristics of the Power Supply

Parameter Symbol Values Unit Note or
Min. Typ. Max. Test Condition
VCC turn-on threshold VVCCon 19 20.5 22 V dVCC/dt = 0.2 V/ms
VCC turn-off threshold VUVOFF -5% 6 +5% V
VCC UVOFF current IVCCUVOFF 5 20 40 mA VCC < VVCCon(min)- 0.3 V
VCC threshold for turning on VUVLO -5% 7.5 +5% V
HV startup cell in auto restart
and latch mode
VCC threshold for turning off VOVLO — 20.5 — V
HV startup cell in auto restart
VCC average quiescent IVCCqu,latch — 0.3 0.48 mA Tj ≤ 85°C, Latch mode
current in latched mode — — 1.2 mA Tj ≤ 125°C, Latch mode
VCC average quiescent IVCCqu,restart — 0.3 0.48 mA Tj ≤ 85°C, Off phase in
current in auto restart mode auto restart mode
— — 1.2 mA Tj ≤ 125°C, Off phase in
auto restart mode
VCC voltage for OTP VPP 7.35 7.5 7.65 V Operational values,
programming not tested in
production test

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Table 11 Electrical Characteristics of the Clock Oscillators

Main clock oscillator period tMCLK 15.0 15.8 16.6 ns 136.4kHz < f_sw_max ≤
180.8kHz
20.0 20.9 22.0 ns f_sw_max ≤ 136.4kHz
1)
DCM Minimum switching f_sw_min_DCM -5.1% +5.3% kHz
frequency
1)
Maximum switching frequency f_sw_max -5.1% +5.3% kHz
1) See configuration chapter
Table 12 Electrical Characteristics of the Internal Temperature Sensor

1)
Internal Temperature sensing T_critical, -6 +6 °C 3 sigma deviation by
T_start, lab characterization,
T_hot not tested in
production
Table 13 Electrical Characteristics of pin ZCD

ZCD clamping of negative -VINPCLN 150 180 220 mV analog clamp
voltages activated
ZCD threshold VZCDdet 5 20 35 mV
ZCD clamping current -IIV 0.021 — 3.14 mA
ZCD voltage sensing VZCDSH 0.067 — 2.61 V
ZCD S&H delay of input buffer tZSHST — — 2.0 µs not tested in

referring to positive jump of production
ZCD voltage
Table 14 Electrical Characteristics of pin DIM/UART

Dimming mode voltage VDIM 0.1 — 2.0 V

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Table 14 Electrical Characteristics of pin DIM/UART (cont’d)

UART mode output low VUARTLow — — 0.8 V IOL = 2 mA
voltage
UART mode output high VUARTHigh 2.2 — — V IOH = -2 mA
voltage
Table 15 Electrical Characteristics of pin CS

1)
CS voltage threshold for 1st V_OCP1 -5% +5% V V_OCP1 = 1.08V, 0.72V or
level overcurrent protection 0.54V
1)
-5% +8% V_OCP1 = 0.36V
CS voltage threshold for 2nd V_OCP2 -5% 1.6 +5% V 0.72V < V_OCP1 ≤ 1.08V
level overcurrent protection -5% 1.2 +5% V 0.54V < V_OCP1 ≤ 0.72V
-5% 0.8 +5% V 0.36V < V_OCP1 ≤ 0.54V
-5% 0.6 +5% V 0.34V ≤ V_OCP1 ≤ 0.36V
1) see configuration chapter
Table 16 Electrical Characteristics of pin GD

Output voltage at low state VGDlow — — 1.6 V IGD = 5 mA1)
Output voltage at high state V_GD — 10.5 — V
Tolerance of output voltage at Δ VGD -0.5V — +0.5V
high state
2)
Output high current I_GD_pk -20% +20% mA CLOAD = 2 nF
Discharge current IGDDIS 500 — — mA VGD = 4V and driver at
low state
1) Not tested in production test
Table 17 Electrical Characteristics of pin HV

Leakage current at pin HV IHVleak — — 10 mA VHV = 600 V, HV startup
cell disabled

2016-09-28
Datasheet
Table 17 Electrical Characteristics of pin HV (cont’d)

Current for VCC cap charging ILD 3.2 5 7.5 mA VHV = 30 V;
VVCC < VVCCon - 0.3 V
Current into pin HV IHV,max — — 9.6 mA
Table 18 Electrical Characteristics of pin SQW

Squarewave frequency f_SQW -5.1% 160 +5.3% kHz
Output voltage at low state VSQWlow — — 1.6 V ISQW = 5 mA1)
Output voltage at high state V_SQW —V 7.5 — V
Tolerance of output voltage at Δ V_SQW -0.5V — +0.5V
high state
Output high current -ISQWH -20% 30 +20% mA CLOAD = 2 nF
Discharge current ISQWDIS 500 — — mA VSQW = 4V and pin at
low state
1) Not tested in production test.

2016-09-28
Datasheet
Outline dimensions
4 Outline dimensions
Figure 23 PG-DSO-8
Notes
1. You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”:
http://www.infineon.com/products.
2. Dimensions in mm

2016-09-28
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EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, Infineon™, ISOFACE™, IsoPACK™, i-
Wafer™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OmniTune™, OPTIGA™, OptiMOS™, ORIGA™, POWERCODE™, PRIMARION™, PrimePACK™,
PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, ReverSave™, SatRIC™, SIEGET™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, SPOC™, TEMPFET™,
thinQ!™, TRENCHSTOP™, TriCore™.
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Forum. CIPURSE™ of OSPT Alliance. COLOSSUS™, FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.
FLEXGO™ of Microsoft Corporation. HYPERTERMINAL™ of Hilgraeve Incorporated. MCS™ of Intel Corp. IEC™ of Commission Electrotechnique Internationale.
IrDA™ of Infrared Data Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of
Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc.,
USA. muRata™ of MURATA MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of OmniVision Technologies,
Inc. Openwave™ of Openwave Systems Inc. RED HAT™ of Red Hat, Inc. RFMD™ of RF Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of
Sun Microsystems, Inc. SPANSION™ of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co. TEAKLITE™ of CEVA,
Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™ of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design
Systems, Inc. VLYNQ™ of Texas Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes Zetex Limited.
Trademarks Update 2014-11-12
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About this document

2016-09-28 1 Rev. 1.0

Datasheet 2 Rev. 1.0

Datasheet 3 Rev. 1.0

Datasheet 4 Rev. 1.0

Square wave Dimming / Current CS

SQW DIM/UART GND

Primary side RC Low

Figure 1 Typical application 1 (Primary side micro-controller dimming)

Square wave Dimming / Current CS

Figure 2 Typical application 2 (Secondary side 0-10V dimming)

Datasheet 5 Rev. 1.0

1 Pin configuration and description

Figure 3 Pin configuration

Table 2 Pin definitions and functions

Datasheet 6 Rev. 1.0

2.2 Controller features

Table 3 Controller features

Datasheet 7 Rev. 1.0

2.2.1 Primary side voltage and current sensing

Zero crossing detection

ITrafo N_p N_s

Figure 4 Typical waveforms (Example with QRM valley switching)

Datasheet 8 Rev. 1.0

2.2.1.2 Input voltage sensing via pin ZCD

Figure 5 Input voltage sensing via pin ZCD

2.2.1.3 Output voltage sensing via pin ZCD

Figure 6 Output voltage sensing via pin ZCD

Datasheet 9 Rev. 1.0

2.2.2 Primary side control scheme for output current control

Output current Moving

Figure 7 Integrated PI control scheme for output current control

Datasheet 10 Rev. 1.0

f_sw_max or QR switching frequency (with t_on_min)

ABM Pulse number controlled

Figure 8 Overview of operation modes

2.2.3 Power factor correction (PFC)

2.2.4 Dimming via pin DIM/UART

Figure 9 Dimming curves based on pin DIM/UART voltage

Datasheet 11 Rev. 1.0

2.2.5 Isolated dimming interface with CDM10V (optional)

Figure 11 Optional circuit for isolated dimming with CDM10V

Datasheet 12 Rev. 1.0

2.2.6 Wide output load voltage range circuit (optional)

Figure 12 Optional wide output voltage range circuit

2.2.7 Automatic output discharge circuit (optional)

2.2.8 VCC startup function combined with direct input monitoring

2.2.9 Configurable soft start and output charging

Datasheet 13 Rev. 1.0

0 tSS 2 tSS 3 tSS tout,charge time

Figure 13 Configurable soft start and output charging phase

2.2.10 Configurable gate voltage rising slope at pin GD (Lower EMI)

Datasheet 14 Rev. 1.0

2.3 Protection features

Auto restart mode