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Difference Between RISC and CISC Processor

RISC processors have a very small number of simple instructions that are fixed in length, while CISC processors have a large number of variable-length instructions with some having long execution times. RISC processors only allow register operands for arithmetic and logical operations and use load/store instructions to access memory, while CISC processors allow operations on both register and memory operands. Implementation details are exposed at the machine level for RISC but hidden for CISC.

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840 views1 page

Difference Between RISC and CISC Processor

RISC processors have a very small number of simple instructions that are fixed in length, while CISC processors have a large number of variable-length instructions with some having long execution times. RISC processors only allow register operands for arithmetic and logical operations and use load/store instructions to access memory, while CISC processors allow operations on both register and memory operands. Implementation details are exposed at the machine level for RISC but hidden for CISC.

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hameed afridi
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Difference between RISC and CISC processor:

CISC RISC

A large number of instructions are present Very fewer instructions are present. The
in the architecture. number of instructions are generally less
than 100.

Some instructions with long execution No instruction with a long execution time
times. These include instructions that copy due to very simple instruction set. Some
an entire block from one part of memory to early RISC machines did not even have an
another and others that copy multiple integer multiply instruction, requiring
registers to and from memory. compilers to implement multiplication as a
sequence of additions.
Variable-length encodings of the Fixed-length encodings of the instructions
instructions. are used.
Example: IA32 instruction size can range Example: In IA32, generally all instructions
from 1 to 15 bytes. are encoded as 4 bytes.
Multiple formats are supported for Simple addressing formats are supported.
specifying operands. A memory operand Only base and displacement addressing is
specifier can have many different allowed.
combinations of displacement, base and
index registers.
CISC supports array. RISC does not supports array.
Arithmetic and logical operations can be Arithmetic and logical operations only use
applied to both memory and register register operands. Memory referencing is
operands. only allowed by load and store
instructions, i.e. reading from memory into
a register and writing from a register to
memory respectively.
Implementation programs are hidden from Implementation programs exposed to
machine level programs. The ISA provides machine level programs. Few RISC
a clean abstraction between programs and machines do not allow specific instruction
how they get executed. sequences.
Condition codes are used. No condition codes are used.

The stack is being used for procedure Registers are being used for procedure
arguments and return addresses. arguments and return addresses. Memory
references can be avoided by some
procedures.

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