INTERRUPTS

à Interrupts provide a mechanism for changing program environment.

à Transfer of program control is initiated by either the occurrence of an event
internal to the microprocessor or an event in its external hardware.
à An 8088/8086 interrupt can come from any of three sources:
à One source is an external signal applied to the non-maskable interrupt
(NMI) input pin. An interrupt applied to this pin is referred to as a "Non-Maskable
Interrupt".
à A second source of an interrupt is an external signal applied to the interrupt
request (INTR) input pin. An interrupt applied to this pin is referred to as an "External
Hardware Interrupt".
à A third source of an interrupt is execution of the interrupt instruction, INT.
This is referred to as a "Software Interrupt".
à A fourth source of an interrupt is some error condition produced in
8088/8086 by the execution of an instruction. An example of this is the divide by zero
interrupt. If you attempt to divide an operand by zero, the 8086/8088 will
automatically interrupt the currently executing program.

Sensing and Servicing an Interrupt: -

à At the end of each instruction cycle, the 8088/8086 checks to see whether an
interrupt is active. If one or more of interrupt conditions are present, the following
series of major actions are performed by 8088/8086:
1. It decrements the stack pointer by 2 and pushes the flag register on the stack.
2. It disables the 8088/8086 INTR interrupt input by clearing the interrupt flag
(IF) in the flag register.
3. It resets the trap flag (TF) in the flag register.
4. It decrements the stack pointer by 2 and pushes the current code segment
register contents on the stack.
5. It decrements the stack pointer again by 2 and pushes the current instruction
pointer contents on the stack.
6. It does an indirect far jump toe the start of the procedure you wrote to respond
to the interrupt.
 7. If we have to use internal registers of microprocessor during the interrupt
service procedure, in the start of the routine they will be pushed and at the end
of the routine they will be popped.
8. An IRET instruction at the end of procedure returns execution to the main
program.
à For an indirect far call, the 8086/8088 gets the new value for CS and IP from four
memory addresses. Likewise, when the 8088/8086 responds to an interrupt, it goes to
four memory locations to get the CS and IP values for the start of the interrupt service
procedure.
à In an 8088/8086 system, the first 1KB of memory, from 00000H to 003FFH, is set
aside as a table for storing the starting addresses of interrupt service procedures.
à This starting address of interrupt service procedure is often called the interrupt
vector or the interrupt pointer, so the table is referred to as the interrupt vector table or
interrupt pointer table.
à Interrupt Vector table can have 256, 4-byte interrupt vectors.
à Instruction Pointer value is put in as the low word of the vector.
à Code Segment value is put in as the high word of the vector.
à These 256 interrupts are divided into four groups:
1. External Hardware Interrupts.
2. Software Interrupts.
3. Internal Interrupts.
4. Non Maskable Interrupts.
à The function of the external hardware, software and non-maskable interrupts can
be defined by the user. On the other hand, the internal interrupts have dedicated
system functions.
à HW, SW and Internal interrupts are serviced on a priority basis.
à Priority is achieved in two ways:
à First, the interrupt processing sequence implemented in the 8088/8086 tests for
the occurrence of the various groups based on the hierarchy that follows:
Internal Interrupt (Highest), Non-maskable Interrupt, Software Interrupt and External
Hardware Interrupt (Lowest).
à Second, each is given a different priority level by assigning it a type number.
Type 0 identifies the highest priority interrupt and type 255 identifies the lowest
priority interrupt.
à Once an interrupt service routine is initiated, it can be interrupted only by a
function that corresponds to a higher priority level.
For example, if a type 50 external hardware interrupt is in progress, it can be
interrupted by any software interrupt, the non-maskable interrupt, all internal
interrupts or any external interrupt with type number less than 50. That is, external
hardware interrupts with priority levels equal to 50 or greater are masked out.
External Hardware Interrupt Interface: -
à The key interrupt interface signals are interrupt request (INTR) and interrupt
acknowledge (INTA).
à The input at the INTR line signals the 8088 that an external device is requesting
service.
à The 8088 samples this input during the last clock period of each instruction
execution cycle.
à Logic 1 represents an active interrupt request.
à The logic 1 at INTR must be removed before the service routine runs to
completion, otherwise the same interrupt may get acknow ledge a second time.
à When an interrupt request has been recognized by the 8088, it signals this fact to
external circuitry. It does this with pulses to logic 0 at its INTA output.
à Actually, there are two pulses produced at INTA during the interrupt acknowledge
bus cycle.
1. The first pulse signals external circuitry that the interrupt request has been
acknowledged and to prepare to send its type number to the 8088/8086.
2. The second pulse tells the external circuitry to put the type number on the data
bus. The lower eight lines of the address/data bus AD7-AD0, are also part of
the interrupt interface. External circuitry must put an 8-bit interrupt number on
bus lines AD7-AD0 during the second cycle.
à Interrupt number is used to identify which external device is requesting service.
à Type number is used to generate the address of the interrupt's vector in the pointer
table and to read the new values of CS and IP into the corresponding internal
registers.
à Before loading the new CS and IP values, their old values and the value of flag
register are automatically pushed on the stack part of memory.
Software Interrupts: -
à BOUND, INTO, INT n, INT 3 and IRET are software interrupts present in
8088/8086.
à BOUND and INTO are conditional.
à IRET is a special interrupt return instruction.
à INT n is general software interrupt instruction.
à INT 3 is a 1-byte instruction.
BOUND:
à BOUND reg , mem; if (reg) < (mem+1)(mem) or (reg) > (mem+3)(mem+2)
then INT 5 occurs.
Otherwise no interrupt occurs.
INTO:
à INTO ; if Overflow flag is logic 1 (OF=1), then INT 4 occurs.
Otherwise next instruction in program executed.
INT n:
à INT n; an interrupt of vector type number 'n' is executed.
INT 3:
à INT 3; a one byte instruction. It is often used to insert a 1-byte breakpoint
instruction into a program to debug the faulty software.
IRET:
à IRET; a special return instruction used to return for both software and hardware
interrupts. It removes six bytes from the stack: two for the IP, two for the
CS, and two for the flags.
Internal Interrupts: -
à Whenever there is an error occur during the operation of microprocessor internal
interrupts are activated.
à INT 0 (Divide Error), INT 6 (Invalid Opcode), INT 7 (Coprocessor Not
Available), INT 8 (Double Fault) are examples of internal interrupts.