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Lecture 7 - CSE - Microprocessor and Assembly Language

This document discusses interrupts in the 8086 microprocessor. It defines an interrupt as a temporary halt in program execution that allows peripheral devices to access the microprocessor. The microprocessor responds with an interrupt service routine to handle the interrupt. Interrupts can be caused by external signals from peripherals, internal signals from special instructions, or exceptional conditions during instruction execution. The 8086 has hardware interrupt pins for non-maskable and maskable interrupts from peripherals. Software interrupts use special interrupt instructions to trigger interrupt handlers at desired points in a program.

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66 views11 pages

Lecture 7 - CSE - Microprocessor and Assembly Language

This document discusses interrupts in the 8086 microprocessor. It defines an interrupt as a temporary halt in program execution that allows peripheral devices to access the microprocessor. The microprocessor responds with an interrupt service routine to handle the interrupt. Interrupts can be caused by external signals from peripherals, internal signals from special instructions, or exceptional conditions during instruction execution. The 8086 has hardware interrupt pins for non-maskable and maskable interrupts from peripherals. Software interrupts use special interrupt instructions to trigger interrupt handlers at desired points in a program.

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CSE 3205: Microprocessor and

Assembly Language
Marjia Sultana
Lecturer
Department of Computer Science and Engineering
Begum Rokeya University, Rangpur
Lecture 7: Interrupts of 8086
Interrupt

Interrupt is the method of creating a temporary halt during program


execution and allows peripheral devices to access the microprocessor.
The microprocessor responds to that interrupt with an ISR (Interrupt
Service Routine), which is a short program to instruct the
microprocessor on how to handle the interrupt.
Interrupt

Processor can be interrupted by following ways:


1. By an external signal generated by a peripheral
2. By an internal signal generated by a special instruction in the
program.
3. By an internal signal generated due to an exceptional condition
which occurs while execution an instruction.
Interrupt types
Hardware Interrupts
• Hardware interrupt is caused by any peripheral device by sending a signal
through a specified pin to the microprocessor.
• The 8086 has two hardware interrupt pins, i.e. NMI and INTR. NMI is a
non-maskable interrupt and INTR is a maskable interrupt having lower
priority. One more interrupt pin associated is INTA called interrupt
acknowledge.
NMI

• It is a single non-maskable interrupt pin (NMI) having higher priority than


the maskable interrupt request pin (INTR)and it is of type 2 interrupt
INTR

The INTR is a maskable interrupt because the microprocessor will be


interrupted only if interrupts are enabled using set interrupt flag
instruction. It should not be enabled using clear interrupt Flag instruction.
Software Interrupts
• Some instructions are inserted at the desired position into the program to
create interrupts. These interrupt instructions can be used to test the
working of various interrupt handlers. It includes −
Software Interrupts
• INT- Interrupt instruction with type number
• It is 2-byte instruction. First byte provides the op-code and the second byte
provides the interrupt type number. There are 256 interrupt types under this
group.
• Its execution includes the following steps −
• Flag register value is pushed on to the stack.
• CS value of the return address and IP value of the return address are pushed
on to the stack.
• IP is loaded from the contents of the word location ‘type number’ × 4
• CS is loaded from the contents of the next word location.
• Interrupt Flag and Trap Flag are reset to 0
Software Interrupts (Cont..)
• The starting address for type0 interrupt is 000000H, for type1 interrupt is 00004H
similarly for type2 is 00008H and ……so on. The first five pointers are dedicated
interrupt pointers. i.e. −
• TYPE 0 interrupt represents division by zero situation.
• TYPE 1 interrupt represents single-step execution during the debugging of a
program.
• TYPE 2 interrupt represents non-maskable NMI interrupt.
• TYPE 3 interrupt represents break-point interrupt.
• TYPE 4 interrupt represents overflow interrupt.
• The interrupts from Type 5 to Type 31 are reserved for other advanced
microprocessors, and interrupts from 32 to Type 255 are available for hardware
and software interrupts.

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