CBM2098E
USB 2.0 Flash Disk Controller
Datasheet
Rev 1.1
Shenzhen Chipsbank Technologies Co.,Ltd.
7/F,Building No.12,Keji Central Road 2,
Software Park, High-Tech Industrial Park, Shenzhen,
P.R.China 518057
Tel: 0755-86169650-808
Fax: 0755-86169690
Email: info@chipsbank.com
URL: http://www.chipsbank.com
Contained herein
Copyright by Shenzhen Chipsbank Technologies Co.,Ltd. all rights reserved.
CBM2098E Datasheet -1- 07/26/2013
Revision History
Date Rev No Description
2012-12-04 1.0 Initial release
2013-07-26 1.1 Modify PIN10 Function
CBM2098E Datasheet -2- 007/26/2013
Contents
1 DESCRIPTION ........................................................................................................................................ 4
2 FEATURES .............................................................................................................................................. 4
3 BLOCK DIAGRAM ................................................................................................................................. 6
4 PIN ASSIGNMENT ................................................................................................................................. 7
4.1 TQFP48 (TOP SIDE) ....................................................................................................................................... 7
5 PIN DESCRIPTION ................................................................................................................................ 8
6 ELECTRICAL CHARACTERISTICS .................................................................................................. 11
6.1 ABSOLUTE MAXIMUM RATINGS .................................................................................................................... 11
6.2 RECOMMENDED OPERATING CONDITIONS ..................................................................................................... 11
6.3 STATIC CHARACTERISTICS ............................................................................................................................ 12
6.4 DYNAMIC CHARACTERISTICS ....................................................................................................................... 12
6.4.1 Normal NAND FLASH Dynamic characteristics .................................................................................... 12
6.4.2 ONFI NAND FLASH Dynamic characteristics ....................................................................................... 14
6.4.3 TOGGLE NAND FLASH Dynamic characteristics ................................................................................. 19
7 MECHANICAL DIMENSIONS ............................................................................................................ 24
7.1 48-PIN CBM2098E PACKAGE OUTLINE DIMENSION .................................................................................... 24
8 COPYRIGHT NOTICE ......................................................................................................................... 25
CBM2098E Datasheet -3- 007/26/2013
1 Description
Fastest & Securest USB 2.0 Flash Disk Controller with dedicated 32-bit
microprocessor
The CBM2098E is the USB 2.0 Flash Disk controller with the fastest transfer speed on the
market. CBM2098E can reach theoretical flash access speed limit of over 32MByte/s for read
and 20MByte/s for write.
The on-the-fly ECC engine is capable of correcting up to 72bits per 1024 bytes page . For data
security, CBM2098E is designed with both hardware and software data protection technology to
prevent data corruption even if it is powered off or unplugged during data transfer.
The CBM2098E supports all 8 /16 bit BUS wide async NAND flash memory available in the
market. New flash can be supported by software re-configuration.
The CBM2098E supports all 8 bit BUS wide ONFI/TOGGLE NAND flash memory available in
the market. New flash can be supported by software re-configuration.
The CBM2098E has both a) 5V to 3.3V LDO and b) power on reset circuits integrated. Thus
greatly reduced BOM cost and eased layout burden.
The CBM2098E runs smoothly with all available hosts and PC platforms. Complied with USB
specification rev. 2.0, the CBM2098E can be supported without additional driver under Win XP,
Win 2000, Windows Me, Mac OS and Linux OS. With device driver installed, it can support Win
98/98SE as well. Comprehensive applications, such as PC boot up, disk partitions, password
check for security disk, are available as part of our standard mass production software package.
The CBM2098E is available in 48-pin TQFP and 64-pin LQFP package, which are thinnest and
smallest on the market. The 48-pin CBM2098E and the 64-pin CBM2098E all support up to 8
flash chips. Customers can choose different packages to meet their design requirement.
2 Features
USB Interface
High-speed USB 2.0 interface;
Non-crystal support
Fastest data transfer rate on the market
Single-channel mode(16bit): 32MB/s for Read, 20MB/s for Write
Single-channel mode(8bit): 26MB/s for Read, 20MB/s for Write
Fastest file copy rate on the market.
On-the-fly ECC built-in Hardware enhances reliability
ECC for NAND flash: 72 bit per page (1 page = 1024bytes)
Special wear leveling algorithm to improve the flash life-time
Hardware & Software Data Protection Technology
Prevent data corruption even if it is powered off or unplugged during data transfer.
SLC & MLC & TLC NAND Flash Interface
CBM2098E Datasheet -4- 007/26/2013
Support 8-bit and 16-bit Samsung SLC&MLC&TLC NAND flash.
Support 8-bit and 16-bit Toshiba SLC&MLC&TLC NAND flash(include 32/24/19nm D3/eD3)
Support 8-bit and 16-bit Hynix SLC&MLC&TLC NAND flash.
Support 8-bit and 16-bit Sandisk SLC&MLC&TLC NAND flash.
Support 8-bit and 16-bit Micron/Intel SLC&MLC&TLC NAND flash.
Support 8-bit and 16-bit ST/Numony SLC&MLC NAND flash.
Support 8-bit and 16-bit Infineon SLC&MLC NAND flash.
Support PowerChip SLC&MLC Nand flash
Support Spansion 3.3V MirrorBit-Quad flash
Support Actrans Nand Flash
Support ONFI2.0 DDR mode flash
Support Samsung Toggle mode flash
Support 16K page flash
Supports up to 8 flash chips
Software configuration to support various new flash memories
Proprietary 32-bit CISC microprocessor feature
Proprietary 32-bit CISC processor for USB protocol processing and flash access.
Single cycle instruction period
Integrated 5v to 3.3v voltage regulator
Disk partitions and password check for security disk available
PC boot up as USB Zip Disk, USB Hard Disk or USB CDROM
Auto run function
Low power dissipation
Operating current 35mA (Bus power compatible)
Build-in LDO
Output maximum current up to 300mA
Leading 0.11um CMOS technology
48-pin TQFP /64-pin LQFP package
48-pin CBM2098E supports up to 8 Flash Chips
Windows, Mac and Linux compatible
CBM2098E Datasheet -5- 007/26/2013
3 Block Diagram
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4 Pin Assignment
4.1 TQFP48 (Top Side)
CBM2098E Datasheet -7- 007/26/2013
5 Pin Description
Brief CBM2098E pin functions are shown in the following tables.
I: Input signal
O: Output signal
I/O: Bi-direction signal
PWR: Power signal
GND: Ground signal
PU: pull up
PD: pull down
CBM2098E TQFP48 Pin Description
TQFP48
Pin Name Type Description
Pin No.
1 VDD50 PWR Regulator 5V Power Input
2 VDD33 PWR Regulator 3.3V Power OUT
3 VDD12 PWR Regulator 1.2V Out
4 VPP PWR CORE 1.2V in
5 NC I/O Left open
6 VDD33 PWR Padring 3.3V Power
7 DP I/O USB Data D+
8 DM I/O USB Data D-
9 VSS GND Padring 3.3V / Logic 1.2V Ground
10 GP10 I/O Debug Mode PIN ( Active low )
11 NC I/O Left open
12 VSSU GND Analog 1.2V Ground
13 NC I/O Left open
Test Mode Enable Pin
I
14 TEST_MODE When high , test mode
PD
When low , normal mode
FDATA0_15 I/O Group 0 Flash Data Bus - bit 15
15
GPIO15 PU General I/O port 15
CBM2098E Datasheet -8- 007/26/2013
When select spi mode ,as spi chip select .
(configure as GPIO and clear pin_64( detail in
spi_ctl[13] .when select master mode , configure output ,
otherwise, configure as input.).
Group 0 Flash Data Bus - bit 14
General I/O port 14
FDATA0_14 I/O
16 When select spi mode, as clock out support ligh-tun sensor
GPIO14 PU
(configure as GPIO and clear pin_64( detail in
spi_ctl[13] .when select ligh-tun mode , configure output).
17 VSS GND Padring 3.3V / Logic 1.2V Ground
FDATA0_13 I/O Group 0 Flash Data Bus - bit 13
18
GPIO13 PU General I/O port 13
FDATA0_12 I/O Group 0 Flash Data Bus - bit 12
19
GPIO12 PU General I/O port 12
FDATA0_11 I/O Group 0 Flash Data Bus - bit 11
20
GPIO11 PU General I/O port 11
FDATA0_10 I/O Group 0 Flash Data Bus - bit 10
21
GPIO10 PU General I/O port 10
FDATA0_9 I/O Group 0 Flash Data Bus - bit 9
22
GPIO9 PU General I/O port 9
FDATA0_8 I/O Group 0 Flash Data Bus - bit 8
23
GPIO8 PU General I/O port 8
When TEST_MODE =1, as scan clock input.
24 X_LED I/O
When TEST_MODE =0, as LED Indication
25 FWRN O Group Flash Write Enable (active low)
26 FALE O Group Flash Address Latch Enable
27 WP I Write Protect Switch Input
28 FCLE O Group Flash Command Latch Enable
29 VDD33 PWR Padring 3.3V Power
I/O
30 DQS DQS, only for onfi/toggle nand flash
PD
31 FCEN0 O Flash Chip Enable - Chip 0 (active low)
32 FRDN O Group Flash Read Enable (active low)
Group Flash Ready_Busy
1, when select flash_rb1 mode, as Group Flash
FRB1
33 I Ready_Busy1 signal input(detail in soft_flag [25]).
/INTR
2, when select intr mode, as external interrupt input
signal(detail in soft_flag [25]).
1, When select test-mode, as scan-chain output
/SCK(I2c)
34 O 2, When select i2c , as sck
FCEN3
3, When select chip select2/3 mode, as CE3 output
1, When select test_mode, As scan-chain input
FCEN2 I/O 2, when select chip select2/3 mode, as CE2 output .(active
35
PU when disable test_mode)
CBM2098E Datasheet -9- 007/26/2013
1, When select clock input mode
(1), X_CLK_OFF=1, as external input test clock.
2, When select chip select1 mode or spi master mode, as
X_CLK_OUT output. ( only active when X_CLK_OFF =0 or
I/O
36 /FCEN1 de-slect spi slve mode)
PU
(1), select chip select1 mode (detail in soft_flag
[28]/[25]), as CE1 output
(2), otherwise, as normal clock_out ,which defined at
config_r[20].
37 FRB0 I Group Flash Ready_Busy0
FDATA0_0 I/O Group 0 Flash Data Bus - bit 0
38
GPIO0 PU General I/O port 0
FDATA0_1 I/O Group 0 Flash Data Bus - bit 1
39
GPIO1 PU General I/O port 1
FDATA0_2 I/O Group 0 Flash Data Bus - bit 2
40
GPIO2 PU General I/O port 2
FDATA0_3 I/O Group 0 Flash Data Bus - bit 3
41
GPIO3 PU General I/O port 3
FDATA0_4 I/O Group 0 Flash Data Bus - bit 4
42
GPIO4 PU General I/O port 4
FDATA0_5 I/O Group 0 Flash Data Bus - bit 5
43
GPIO5 PU General I/O port 5
FDATA0_6 I/O Group 0 Flash Data Bus - bit 6
44
GPIO6 PU General I/O port 6
FDATA0_7 I/O Group 0 Flash Data Bus - bit 7
45
GPIO7 PU General I/O port 7
RELIABLE_BO I
46 Reliable boot selection according to D3/Ed3 Flash
OT PU
47 NC I/O Left open
48 VSS33A GND Analog 3.3V Ground
CBM2098E Datasheet - 10 - 007/26/2013
6 Electrical Characteristics
6.1 Absolute maximum ratings
In accordance with the Absolute Maximum Rating System (IEC 60134).
symbol parameter conditions min max unit
VDD33 analog supply voltage -0.5 5.5 v
VDD12 digital supply voltage -0.5 4.5 v
VDD50 input voltage -0.5 5.5 v
DP, DM and
-4000 +4000
electrostatic ILI < GND pins
Vesd v
discharge voltage[1] 1A
other pins -2000 +2000
Tstg storage temperature -40 +125 ℃
[1] Equivalent to discharging a 100 pF capacitor via a 1.5 k resistor (Human Body
Model).
6.2 Recommended operating conditions
symbol Parameter conditions min Typ max Unit
VDD33 analog supply voltage 3.0 3.3 3.6 V
VDD12 digital supply voltage 1.08 1.2 1.32 V
VDD50 input voltage 4.5 5 5.5 V
Low/Full speed 0 3.3 3.6 V
input voltage on analog
VI(AI/O)
I/O pins DP DM
High speed 0 400 - mV
Tamb ambient temperature 0 - +70 ℃
CBM2098E Datasheet - 11 - 007/26/2013
6.3 Static characteristics
All parameters are measured at VCCA = VCCD = 3.0 to 3.6 V; VAGND = VDGND = 0 V;
Tamb = 40 to 85 ℃;
symbol Parameter Conditions min Typ max Unit
Full-speed transmitting and
- 22.8 -
operating receiving;
ICC mA
supply current high-speed transmitting and
- 35
receiving
suspend
ICC(susp) in suspend mode - 0.8 mA
supply current
6.4 Dynamic characteristics
6.4.1 Normal NAND FLASH Dynamic characteristics
All parameters are measured at VCCA = VCCD = 3.0 to 3.6 V; VAGND = VDGND = 0 V;
Tamb = -40 to 85 ℃ ;
symbol Parameter conditions min Typ max Unit
FDATA* setup time relative Configured
Ts(FDATA*) 8 33 75 ns
to rising FWRN* edge by firmware
FDATA* hold time relative to Configured
Th(FDATA*) 8 33 75 ns
falling FWRN* edge by firmware
FCLE* setup time relative to Configured
Ts (FCLE*) 8 16 25 ns
falling FWRN* edge by firmware
FCLE* hold time relative to Configured
Th (FCLE*) 10 16 75 ns
rising FWRN* edge by firmware
FALE* setup time relative to Configured
Ts (FALE*) 8 16 25 ns
falling FWRN* edge by firmware
FALE* hold time relative to Configured
Th (FALE*) 10 16 75 ns
rising FWRN* edge by firmware
FCEN* setup time relative Configured
Ts (FCEN*) - 99 ns
to falling FWRN* edge by firmware
Configured
Tpw (FWRN*) FWRN* Pulse Width 8 33 75 ns
by firmware
Configured
Thh (FWRN*) FWRN* high hold time 8 33 75 ns
by firmware
FDATA* access time
Ta(FDATA*) relative to falling FRDN* -5 0 5 ns
edge
Configured
Tpw (FRDN*) FWRN* Pulse Width 8 33 75 ns
by firmware
Configured
Thh (FRDN*) FWRN* high hold time 8 33 75 ns
by firmware
CBM2098E Datasheet - 12 - 007/26/2013
Timing diagram for Writing of Data
Timing diagram for Reading of Data
CBM2098E Datasheet - 13 - 007/26/2013
6.4.2 ONFI NAND FLASH Dynamic characteristics
CBM2098E only support Mode0/Mode1/Mode2.
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6.4.3 TOGGLE NAND FLASH Dynamic characteristics
CBM2098E only support 66Mbps/80Mbps.
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7 Mechanical Dimensions
7.1 48-Pin CBM2098E Package Outline Dimension
CBM2098E Datasheet - 24 - 007/26/2013
8 Copyright Notice
Copyright by Shenzhen Chipsbank Technologies Co.,Ltd. All Rights Reserved.
Right to make changes —Shenzhen Chipsbank Technologies Co.,Ltd. reserves the right to make
changes in the products - including circuits, standard cells, and/or software - described or contained
herein in order to improve design and/or performance. The information contained in this manual is
provided for the general use by our customers. Our customers should be aware that the personal
computer field is the subject of many patents. Our customers should ensure that they take
appropriate action so that their use of our products does not infringe upon any patents. It is the
policy of Shenzhen Chipsbank Technologies Co.,Ltd. to respect the valid patent rights of third
parties and not to infringe upon or assist others to infringe upon such rights.
This manual is copyrighted by Shenzhen Chipsbank Technologies Co.,Ltd. You may not reproduce,
transmit, transcribe, store in a retrieval system, or translate into any language, in any form or by any
means, electronic, mechanical, magnetic, optical, chemical, manual, or otherwise, any part of this
publication without the expressly written permission from Shenzhen Chipsbank Technologies
Co.,Ltd.
CBM2098E Datasheet - 25 - 007/26/2013