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EMBEDDED SYSTEMS LABORATORY

EE-306

TASK 3
Group-6

Submitted by:
Sandipan Sen-116EE0344
A.Sricharan-116EE0345
K.Suma-116EE0346
P Santosh Kumar Patra – 716EE3089

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Content Table:

S NO. Content Page

1 Title 03

2 Objective 03

3 Software Used 03

4 Theory 03

5 Code with comments 05

6 Observations 11

7 Conclusion 14

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Implementation of Higher-Order IIR Filter using
8051 Microcontroller

Objective:
Develop RTOS–with FIFO structure for signal access–to realize the filters in the circuit
developed in Task-1-2

Software used:
 Proteus 8 Professional
 Keil uVision
 MATLAB R2017a

Theory:
The 8051 Microcontroller is one of the most popular and most commonly used
microcontrollers in various fields like embedded systems, consumer electronics, automobiles,
etc. A Microcontroller is a VLSI IC that contains a CPU (Processor) along with some other
peripherals like Memory (RAM and ROM), I/O Ports, Timers/Counters, Communication
Interface, ADC, etc.

OPAMP (741) stands for operational amplifier it is used as an amplifier as well as to perform
operations (arithmetic operations like addition, subtraction, logarithm, exponential etc), in our
project we are using it with DAC which has current as default output, OPAMP is used to
convert that as voltage.

An infinite impulse response (IIR) filter is a digital filter that depends linearly on a finite
number of input samples and a finite number of previous filter outputs. In other words,
it combines a FIR filter with feedback from previous filter outputs. Because the filter uses
previous values of the output, there is feedback of the output in the filter structure. The
impulse response is “infinite” because there is feedback in the filter; if you put in an impulse
(a single “1” sample followed by many “0” samples), an infinite number of non-zero values
will come out (theoretically).

Circuit Description:

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Fig 1: Circuit Diagram

The circuit is the same as the one designed in Task 1. The code has been altered to implement
the Low-pass IIR filter.

The coefficients are in the range of 0-2 so they are converted to 1.7 notation of fixed precision
point and the samples are already in 0.8 notation, so the output which is:

Y[n] = a0*x[n] + a1*x [n-1] + a2*x [n-2] – b1*y[n-1] – b2*y[n-2] …. (1)

Is in the form of 1.7*0.8 = 1.15, lower 8 bits are ignored, hence we are left with output in the
form of 1.7 which is converted to 0.8 form and sent to the DAC.

We are implementing a fourth order IIR filter by cascading two second order IIR filters the
samples that are fed from ADC is the input to first filter, the output of first filter is input to
second filter and the output of the second filter is the output of the actual filter and it is given to
the DAC.

As IIR filter requires previous input and outputs and it has two cascaded filters we need more
registers to store those values so two register banks are used.

Filter Parameters

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Type : Low pass window, IIR, 4th order

Cut-off frequency = 344 Hz (lowest roll no. of group)

Sampling frequency = 5000 Hz

Code:
ORG 0000H

SJMP MAIN; jump to main program

ORG 0003H

SJMP ISR; jump to interrupt service routine

MAIN:

MOV P1,#0FFH; to make port 1 as input

MOV P2,#00H; to make port 2 as output

MOV P0,#00H;

MOV IE,#81H; to enable interrupt 0

CLR PSW.3;

CLR PSW.4; to enable register bank 1

SETB P3.0; to set ale

SETB P3.1; to set sc for starting the conversion

CLR P3.0; to generate a time delay in sc pulse

CLR P3.1;

FRGRND:

SJMP FRGRND;

ISR : PUSH ACC;

PUSH PSW;

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; first cascaded 2nd order iir filter

MOV A,P1 ; to copy the contents after conversion

MOV R0,A; r0 stores x[n]

MOV B,#05H; an

MUL AB; an*x[n]

MOV R7,B;

MOV A,R1; r1 has x[n-1]

MOV B,#0AH; an-1

MUL AB;

MOV R6,B;

MOV A,R6;

ADD A,R7;

MOV R7,A;

MOV A,R2; r2 stores x[n-2]

MOV B,#05H; an-2

MUL AB;

MOV R6,B;

MOV A,R6;

ADD A,R7;

MOV R7,A ; an*xn+an-1*xn-1+an-2*xn-2

MOV A,R3 ; yn-1

MOV B,#0C8H; bn-1

MUL AB;

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MOV R6,B;

MOV A,R6;

ADD A,R7;

MOV R7,A ;

MOV A,R4 ; yn-2

MOV B,#5CH; bn-2

MUL AB;

MOV R6,B;

MOV A,R7;

CLR PSW.7;

SUBB A,R6;

RLC A;

MOV R7,A ; total summation yn

MOV A,R1;

MOV R2,A;

MOV A,R0;

MOV R1,A; all inputs shifted

MOV A,R4; yn-2

SETB PSW.3; enable bank1

MOV R2,A; xn-2 of 2nd filter

CLR PSW.3; enable bank0

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MOV A,R3;

MOV R4,A ; shifting in current filter

SETB PSW.3; enable bank1

MOV R1,A ; xn-1 of 2nd filter

CLR PSW.3; enable bank0

MOV A,R7; yn

MOV R3,A ; shifting in current filter

SETB PSW.3; enable bank1

MOV R0,A; xn-1 of 2nd filter

; first filter complete

MOV A,R0; xn

MOV B,#04H; an

MUL AB;

MOV R7,B ; xn*an

MOV A,R1; xn-1

MOV B,#08H; an-1

MUL AB;

MOV R6,B;

MOV A,R6;

ADD A,R7;

MOV R7,A; xn*an + xn-1*an-1

MOV A,R2; xn-2

MOV B,#04H; an-2

MUL AB;

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MOV R6,B;

MOV A,R6;

ADD A,R7;

MOV R7,A ; an*xn+an-1*xn-1+an-2*xn-2

MOV A,R3 ; yn-1

MOV B,#0A7H; bn-1

MUL AB;

MOV R6,B;

MOV A,R6;

ADD A,R7;

MOV R7,A ;

MOV A,R4 ; yn-2

MOV B,#38H; bn-2

MUL AB;

MOV R6,B;

MOV A,R7;

CLR PSW.7;

SUBB A,R6

RLC A;

MOV R7,A ; total summation yn

MOV A,R1;

MOV R2,A;

MOV A,R0;

MOV R1,A; all inputs shifted

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MOV A,R3;

MOV R4,A ;

MOV A,R7;

MOV R3,A ; output shifting in current filter

MOV A,R7;

CLR PSW.3; enable bank 0

MOV P2,R3 ; to send the contents to dac

; to start another conversion

SETB P3.0; set ale

SETB P3.1; set sc

CLR P3.0; clear ale

CLR P3.1; clr sc

POP PSW;

POP ACC;

RETI

END

Observations:

Table 1: List of output amplitude and gains for varying frequencies for the developed RTOS of
Low Pass FIR filter

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Frequency Input Amplitude Output Amplitude Latency Gain in
Gain
(Hz) (V) (V) (ms) dB
100 2.5 2.0475 0.8 0.819 -1.734
200 2.5 2.075 1.25 0.83 -1.618
300 2.5 1.8775 1.4 0.75 -2.487
400 2.5 0.9325 1.28 0.373 -8.566
500 2.5 0.5125 1.19 0.205 -13.765
750 2.5 0.2 1 0.08 -21.938
1000 2.5 .08 1.7 0.032 -29.89
1500 2.5 0.004 1.4 0.0016 -55.91

Fig 2: Input freq. = 100 Hz

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Fig 3: Input freq. = 344 Hz (Cut-off freq.) Fig 4: Input freq. = 500 Hz

From the above plots, it was observed that with an increase in frequency, there was a decrease
in amplitude of output waveform.

The output waveforms got progressively more and more distorted as the frequency approached
half of the Nyquist frequency (2500 Hz).

Fig 6: Frequency response of the RTOS

Fig 5: Frequency response of the RTOS

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From the semi-log plot we can observe that there is a roll-off in gain when the frequency is
increased beyond cut-off frequency.

Fig 6: Frequency response of the IIR Filter obtained from the FDA Tool

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Conclusion:
The coefficients of the IIR filter were obtained from FDAtool of MATLAB. Those coefficients
were converted to 1.7 form of fixed-point precision. Then using the value of samples and
coefficients the output was calculated and given to DAC. For varying frequency it was
observed that the amplitude of the output decreased and distortion increased with increasing
input frequency beyond cut-off frequency (344 Hz). As it is a low pass filter the reduction in
output amplitude is justified and the output frequency response is also similar to that of
response obtained in FDAtool. From graphs we observed that as the frequency reached half of
the sampling frequency (2.5KHz), the distortion increased very rapidly thus satisfying Nyquist
theorem (fs >2*fm) even if fs is just greater than 2*fm there will be lot of distortion which is
observed here.

Problems Faced
1. Due to the higher number of coefficients and past values of input and output that had
to be stored, a single register bank was not enough. We had to use a second bank as
well. This led to increased complexity of the code.
2. Distortions were higher as compared to the FIR filter, causing problems while taking
readings. There were especially large distortions at f = 200 Hz. Even at the other
frequencies, the distorted sinusoids were interspersed by flat lines in between.

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