Digital Signal Processing (Theory)
Course Code: EEN-325
Credit Hours: 3
Pre-requisite: Signals and Systems
Objectives: The course aims to develop mathematical and analytical skills
necessary to perform time/spectral analysis of digital signals
and systems. Furthermore, this course will polish student’s
design abilities and will enable them to interpret and
implement digital systems with the high level of accuracy.
Course Learning Outcomes After taking this course, students will be able to:
(CLOs): CLO 1: (C2): Explain the fundamentals of signals and LTI systems.
CLO 2: (C4): Analyze and characterize LTI systems through
convolution sum, difference equation, DTFT, DFT (FFT) and Z-
Transform.
CLO3: (C4):Design the structural representation of any discrete/
digital filter to map it on embedded hardware.
CLO 4: (C4): Design and interpret complete discrete/ digital
system both in time and frequency domain.
Course Outline: Review of Signals and Systems (Week 1 to 2)
Analysis of discrete time (DT) signals and systems along
with their properties
Spectral representation of DT signals and systems
through discrete time Fourier transform (DTFT)
Properties of DTFT
Transform Analysis of LTI Systems (Week 3 to 6)
Z-Transform, motivation behind Z-transform
relationship between Laplace and Z-transform
Convergence analysis of DT signals and systems
through Z-Transform, Z-Transform properties, inverse
Z-transform
Phase distortion and group delay
Decomposition of DT systems into All-Pass and
Minimum Phase Systems.
Transform Analysis of an LTI System (Week 7 to Week 8)
Detailed understanding about the phase information of
the system
Relationship between DTFT and ZT
All Pass System/Minimum Phase System
Types of Linear Phase systems
Hardware Mapping of LTI Systems (Week 9 to Week 10)
Structures of DT systems, block representation and
signal flow graphs of DT systems
Basic structures of IIR, FIR filters i.e. Direct Form – 1,
Direct Form – 2, Transposed Direct Form -1, Transposed
Direct Form - 2
Combination of basic structures for IIR filters i.e.
cascaded and parallel form etc.
Tapped delay structures for FIR filters
Sampling/Quantization/Multi-rate Signal Processing (Week
11 to Week 12
Introduction to sampling, periodic sampling, spectral
representation of sampling
Reconstruction of band limited signals,
Resampling through integer and non-integer factor
Polyphase Decomposition
IIR and FIR Filter Designing and Specifications (Week 13 to
Week 14)
Design of DT IIR filter in continuous domain (CT)
through impulse invariance and bilinear approximation
Design of FIR filters through windowing method
Sampled Fourier Analysis (Week 15 to Week 16)
Discrete Fourier Series (DFS) and Discrete Fourier
Transform (DFT), Properties of DFS and DFT
Introduction to Cooley-Tukey Algorithm for fast DFT
computation
Basic Butterfly Structure, Decimation in Time (DIT)
representation of Fast Fourier Transform (FFT)
Resources: Text Book:
Oppenheim, Schafer, Buck, “Discrete Time Signal
Processing”, 3rd Edition, Prentice Hall
Oppenheim, Schafer, Buck, “Discrete Time Signal
Processing”, 2nd Edition, Prentice Hall
Reference Book:
Proakis & Manolakis, “Digital Signal Processing”, 4th Edition,
Pearson
R. J. Schilling and S. L. Harris, "Fundamentals of Digital Signal
Processing Using MATLAB"
Tools: MATLAB R2017a
Octave
Mapping of CLO to PLOs
Contribution: Average:1, Moderate:2, Strong:3
PLO CLO 1 CLO 2 CLO 3 CLO 4
PLO 1: Engineering Knowledge 3 3 1 2
PLO 2: Problem analysis 3 3 3
PLO 3: Design 2 3
PLO 4: Investigation 1
PLO 5: Tool usage
PLO 6: Engineer and society
PLO 7: Environment
PLO 8: Ethics
PLO 9: Individual and team work
PLO 10: Communications
PLO 11: Project Management
PLO 12: Lifelong learning
Grading Rubric
Assessment Method CLO 1 CLO 2 CLO 3 CLO 4
Final Exam x 15 15 20
Midterm Exam 10 10 x x
Assignments 5 6 6 3
Quizzes 1 3 3 3
Total (100) 16 34 24 26
Evaluation Criteria for achievement of CLOs
Class average in CLO 1 should be 50% and above
Class average in CLO 2 should be 50% and above
Class average in CLO 3 should be 50% and above
Class average in CLO 4 should be 50% and above