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SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003

D Wide Operating Voltage Range of 2 V to 6 V D Typical tpd = 9 ns


D Outputs Can Drive Up To 10 LSTTL Loads D ±4-mA Output Drive at 5 V
D Low Power Consumption, 20-µA Max ICC D Low Input Current of 1 µA Max
SN54HC10 . . . J OR W PACKAGE SN54HC10 . . . FK PACKAGE
SN74HC10 . . . D, DB, N, NS, OR PW PACKAGE (TOP VIEW)
(TOP VIEW)

VCC
NC

1C
1B
1A
1A 1 14 VCC
1B 2 13 1C 3 2 1 20 19
2A 4 18 1Y
2A 3 12 1Y NC NC
5 17
2B 4 11 3C 2B 16 3C
6
2C 5 10 3B NC 7 15 NC
2Y 6 9 3A 2C 8 14 3B
GND 7 8 3Y 9 10 11 12 13

2Y

3Y
3A
GND
NC
NC − No internal connection

description/ordering information
The ’HC10 devices contain three independent 3-input NAND gates. They perform the Boolean function
Y = A • B • C or Y = A + B + C in positive logic.

ORDERING INFORMATION
ORDERABLE TOP-SIDE
TA PACKAGE†
PART NUMBER MARKING
PDIP − N Tube of 25 SN74HC10N SN74HC10N
Tube of 50 SN74HC10D
SOIC − D Reel of 2500 SN74HC10DR HC10
Reel of 250 SN74HC10DT
−40°C
−40 C to 85
85°C
C SOP − NS Reel of 2000 SN74HC10NSR HC10
SSOP − DB Reel of 2000 SN74HC10DBR HC10
Tube of 90 SN74HC10PW
TSSOP − PW Reel of 2000 SN74HC10PWR HC10
Reel of 250 SN74HC10PWT
CDIP − J Tube of 25 SNJ54HC10J SNJ54HC10J
−55°C
−55 C to 125
125°C
C CFP − W Tube of 150 SNJ54HC10W SNJ54HC10W
LCCC − FK Tube of 55 SNJ54HC10FK
SNJ54HC10FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

     ! " #$%! "  &$'(#! )!%* Copyright  2003, Texas Instruments Incorporated
)$#!" # ! "&%##!" &% !+% !%"  %," "!$%!"  &)$#!" #&(! ! 0  12 (( &%!%" % !%"!%)
"!)) -!.* )$#! &#%""/ )%" ! %#%""(. #($)% $(%"" !+%-"% !%)*  (( !+% &)$#!" &)$#!
!%"!/  (( &%!%"* &#%""/ )%" ! %#%""(. #($)% !%"!/  (( &%!%"*

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1


 

      
SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003

FUNCTION TABLE
(each gate)
INPUTS OUTPUT
A B C Y
H H H L
L X X H
X L X H
X X L H

logic diagram (positive logic)


A
B Y
C

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.

2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265


 

      
SCLS083D − DECEMBER 1982 − REVISED AUGUST 2003

recommended operating conditions (see Note 3)


SN54HC10 SN74HC10
UNIT
MIN NOM MAX MIN NOM MAX
VCC Supply voltage 2 5 6 2 5 6 V
VCC = 2 V 1.5 1.5
VIH High-level input voltage VCC = 4.5 V 3.15 3.15 V
VCC = 6 V 4.2 4.2
VCC = 2 V 0.5 0.5
VIL Low-level input voltage VCC = 4.5 V 1.35 1.35 V
VCC = 6 V 1.8 1.8
VI Input voltage 0 VCC 0 VCC V
VO Output voltage 0 VCC 0 VCC V
VCC = 2 V 1000 1000
∆t/∆v Input transition rise/fall time VCC = 4.5 V 500 500 ns
VCC = 6 V 400 400
TA Operating free-air temperature −55 125 −40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless


otherwise noted)
TA = 25°C SN54HC10 SN74HC10
PARAMETER TEST CONDITIONS VCC UNIT
MIN TYP MAX MIN MAX MIN MAX
2V 1.9 1.998 1.9 1.9
IOH = −20 µA 4.5 V 4.4 4.499 4.4 4.4
VOH VI = VIH or VIL 6V 5.9 5.999 5.9 5.9 V
IOH = −4 mA 4.5 V 3.98 4.3 3.7 3.84
IOH = −5.2 mA 6V 5.48 5.8 5.2 5.34
2V 0.002 0.1 0.1 0.1
IOL = 20 µA 4.5 V 0.001 0.1 0.1 0.1
VOL VI = VIH or VIL 6V 0.001 0.1 0.1 0.1 V
IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33
IOL = 5.2 mA 6V 0.15 0.26 0.4 0.33
II VI = VCC or 0 6V ±0.1 ±100 ±1000 ±1000 nA
ICC VI = VCC or 0, IO = 0 6V 2 40 20 µA
Ci 2 V to 6 V 3 10 10 10 pF

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3

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