11/09/2016 TheCMOSInverterExplained
TheCMOSInverterExplained
BasilShelley bshelley@[Link] EE307Dr.BraunF02
Overview
ComplementaryMOSFET(CMOS)technologyiswidelyusedtodaytoformcircuitsinnumerous
[Link]
[Link],relativelyhighspeed,highnoise
marginsinbothstates,andwilloperateoverawiderangeofsourceandinputvoltages(provided
thesourcevoltageisfixed).NextIwillattempttoexplainjusthowthislogicgateworksnow
thatyouhavesomeideaofhowimportantCMOSisinyourdaytodaylife.
CMOSInverterBasics
AsyoucanseefromFigure1,[Link]
(MP)isaPMOStypedevicewhilethebottomFET(MN)[Link]
notpresentineitherdevicesincethebodyofeachdeviceisdirectlyconnectedtothedevices
[Link]
FETs.
[Link]
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fivevolts,VOUTiszero,[Link]
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happensinthemiddle,[Link]
[Link].
Figure2:BasicVoltageTransferCharacteristic
Figure1:CMOS
Inverter
DCAnalysis
[Link].
TheMOSFETSmustbeperfectlymatchedforoptimumoperation,thatis,theymusthave
thesamethresholdvoltagemagnitudeandconductionparameter.
Thedraincurrent(ID)throughtheNMOSdeviceequalsthedraincurrentthroughthe
[Link]
thecircuitsoutputseesnosignificantloading.
VDDequalsthevoltageacrossthePMOSplusthevoltageacrosstheNMOSbyKVL.
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11/09/2016 TheCMOSInverterExplained
Figure3:VTCwithInputSignal
RegionI
FirstwefocusourattentiononregionI.Inthiscasewhenweapplyaninputvoltagebetween0
[Link]
alreadynegativeenoughandhasnouseformorefreeelectronssoitrefusestoconductand
[Link],thereisnocurrentflow
[Link]
PMOSdeviceandthusnovoltageisbeingdroppedacrossit.
ThePMOSdeviceisforwardbiased(VSG>VTP)[Link]
thelinearregion(VSD<=VSG+VTP=VDDVo+VTP).
TheNMOSdeviceiscutoffsincetheinputvoltageisbelowVTN(Vi=VGS<VTN).
Thepowerdissipationiszero.
RegionII
[Link]
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immediatelyintosaturationsinceitstillhasarelativelylargeVDSacrossit.
ThePMOSdeviceisinthelinearregion(VSD<=VSG+VTP).
TheNMOSdeviceisinthesaturationregion(Vi=VDS>=VGSVTN=VoVTN).
[Link].
Themaximumallowableinputvoltageatthelowlogicstate(VIL)[Link]
[Link],VILoccursat
(dVo/dVi)=1.
RegionIII
InthemiddleofthisregionthereexistsapointwhereVi=[Link]
[Link]
[Link]
time,bothdevicesseeenoughforwardbiasvoltagetodrivethemtosaturation.
ThePMOSdeviceisinthesaturationregion(VSD>=VSG+VTP=VDDVo+VTP).
TheNMOSdeviceisinthesaturationregion(VDS>=VGSVTN=VoVTN).
Powerdissipationreachesapeakinthisregion,namelyatwhereVM=Vi=Vo.
RegionIV
RegionIVoccursbetweenaninputvoltageslightlyhigherthanVMbutlowerthanVDD
[Link],droppingalowvoltageacross
[Link],thePMOSdevicemustpickupthetabanddroptherestof
thevoltage(VDDVDS)[Link],inturn,drivesthePMOSinto
[Link].
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11/09/2016 TheCMOSInverterExplained
ThePMOSdeviceisinthesaturationregion(VSD>=VSG+VTP=VDDVo+VTP).
TheNMOSdeviceisforwardbiased(Vi=VGS>VTN)[Link]
isinthelinearregion(Vi=VDS<=VGSVTN=VoVTN).
Theminimumallowableinputvoltageatthelogichighstate(VIH)[Link]
occursatthepointwheretheslopeoftheVTCis1(dVo/dVi)=1.
RegionV
TheNMOSwantstoconductbutitsdraincurrentisseverelylimitedduetothePMOSdevice
[Link]
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throughbythePMOSistoosmalltomatterinmostpracticalcasessoweletID=[Link]
informationwecanconcludethatVDS=Vo=0VfortheNMOSsincenocurrentisgoing
[Link],ineffect,sentinVDDandfoundtheinvertersoutputtobezero
[Link],VOH=[Link]
[Link]=0.
ThePMOSdeviceiscutoffwhentheinputisatVDD(VSG=0V).
TheNMOSdeviceisforwardbiased(Vi=VGS>VTN)[Link]
isinthelinearregion(Vi=VDS<=VGSVTN).
ThetotalpowerdissipationiszerojustasinregionI.
AFewWordsAboutPowerDissipation
OurCMOSinverterdissipatesanegligibleamountofpowerduringsteadystate
[Link].Infigure4the
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steadystatecurrentflows,theontransistorsuppliescurrenttoanoutputloadiftheoutput
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highdensityapplications.
Figure4DrainCurrentVersesInputVoltage
PSPICECode
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someofthetransistorparameterssuchasW,L,andKP.
*CMOSINVERTER
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11/09/2016 TheCMOSInverterExplained
VDD105
VIN20
MQ11231PMOD1
MQ23200NMOD1
.DCVIN0.5..01
*NMOSMODELDEFINITION
.MODELNMOD1NMOS(L=3UW=6UKP=69UGAMMA=0.37
+LAMBDA=0.06RD=1RS=1VTO=1.0TOX=0.04U
+CBD=2FCBS=2FCJ=200UCGBO=200PCGSO=40PCGDO=40P)
*PMOSMODELDEFINITION
.MODELPMOD1PMOS(L=3UW=6UKP=34.5UGAMMA=0.37
+LAMBDA=0.06RD=1RS=1VTO=1.0TOX=0.04U
+CBD=2FCBS=2FCJ=200UCGBO=200PCGSO=40PCGDO=40P)
.PRINTDCV(1)V(2)V(3)
.PROBE
.END
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