Noise Shaping

In this paper we present a modeling and design for robust speed control of an elevator door using ILQ design method with frequency-shaping. We have applied the design results to actual equipment, and performed experiments. By proper shaping of the frequency response of the closed loop transfer function from noise to output, an unnecessary vibration of speed generated by uncertainty was confirmed to be suppressed. As a result, the proposed method has been verified to show robustness against the change of weight of door panels

This paper presents a novel hybrid continuous-time (CT) and discrete-time (DT) sturdy multi-stage noise shaping (SMASH) ΣΔ modulator architecture. The double-sampling technique is employed in the DT second stage modulator to reduce the power consumption of the overall modulator. A flat and unity STFs are used in the first and second stage modulators, respectively, to reduce the output swing of the analog building blocks without influencing the inherent anti-aliasing behavior of the first stage CT modulator. As a design example, the proposed SMASH 2-2 modulator is designed in a 90 nm CMOS technology with 1 V power supply. HSPICE simulation results show a signal-to-noise plus distortion ratio (SNDR) of 80.4 dB in 12.5 MHz bandwidth with 17 mW power consumption while operating at 200 MHz sampling frequency.

This article describes a study on neural noise and neural signal feature extraction, targeting real-time spike sorting with miniaturized microchip implementation. Neuronal signature, noise shaping, and adaptive bandpass filtering are reported as the techniques to enhance the signal-to-noise ratio (SNR). A subset of informative samples of the waveforms is extracted as features for classification. Quantitative and comparative experiments with both synthesized and animal data are included to evaluate different feature extraction approaches. In addition, a preliminary hardware implementation has been realized using an integrated circuit.

A digital-to-phase converter operating from 0.5-1.5GHz employs oversampling, noise shaping and DLL phase filtering to achieve sub-ps resolution independent of the operating frequency. Test chip fabricated in a 0.13mum CMOS process achieves a DNL below plusmn100fs and plusmn12ps INL and consumes 15mW while operating at 1GHz

This paper presents a study on complex-signal sigma-delta (ΣΔ) modulators suitable for quadrature bandpass analogue-to-digital conversion of signals in monolithic radio receivers. The noise-shaping in complex-signal modulators is not symmetric with respect to dc, i.e. the zeros in the noise transfer function are not complex-conjugate as in conventional bandpass modulators. First-order (L = 1), second-order (L = 2) and high-order (L > 2) cascade topologies are discussed together with design methodologies suitable for switched-capacitor (SC) realization. Complex-signal fully-differential SC integrators and sigma-delta modulators are also addressed. The concepts, design methodologies and circuits proposed have been validated through simulations made with TOSCA (V. Literali et al., IEEE Trans. CAD Integrated CAS, 12(9) (1993) 1376–1386) and SWITCAP-2 (K. Suyams et al., IEEE J. Solid-State Circuits, 25(6) (1990) 1403–1413).

ADCs (analog-to-digital converters), especially Pipeline and Sigma-Delta (Σ-Δ) converters, are designed using complex architectures in order to increase their sampling rate and/or resolution. Consequently, the learning of ADC devices also encompasses complex concepts such as multistage synchronization, latency, oversampling, modulation, noise shaping, filtering, or decimation. This paper is focused on a new learning methodology, based on the simulation of the main circuit topologies used in commercial ADCs, in order to understand their working principles more thoroughly. At the same time, the ADC dynamic and static tests are obtained from the simulation results, and their characterization is obtained at an application level. In this way, the methodology combines the microelectronics perspective, at the design level, with the digital signal processing perspective. This methodology saves time in practical classes and encourages self-learning because it does not require special hardware. Moreover, it uses only software tools that are common in electronic engineering, like the OrCAD PSpice simulator, a C compiler, or a hardware description language (HDL) simulator. The methodology has been validated during two consecutive offerings of academic courses in the Telecommunication Engineering curriculum at Vigo University, Vigo, Spain, and the results obtained are discussed.

This paper proposes a min-max design of noise-shaping delta-sigma modulators. We first characterize the all stabilizing loop-filters for a linearized modulator model. By this characterization, we formulate the design problem of lowpass, bandpass, and multi-band modulators as minimization of the maximum magnitude of the noise transfer function (NTF) in fixed frequency band(s). We show that this optimization minimizes the worst-case reconstruction error, and hence improves the SNR (signal-to-noise ratio) of the modulator. The optimization is reduced to an optimization with a linear matrix inequality (LMI) via the generalized KYP (Kalman-Yakubovich-Popov) lemma. The obtained NTF is an FIR (finite-impulse-response) filter, which is favorable in view of implementation. We also derive a stability condition for the nonlinear model of delta-sigma modulators with general quantizers including uniform ones. This condition is described as an H-infinity norm condition, which is reduced to an LMI via the KYP lemma. Design examples show advantages of our design.

This paper presents a hybrid audio coding algorithm integrating an LP-based coding technique and a more general transform coding technique. ACELP is used in LP-based coding mode, whereas algebraic TCX is used in transform coding mode. The algorithm extends previously published work on ACELP/TCX coding in several ways. The frame length is increased to 80 ms, adaptive multi-length sub-frames are used with overlapping windowing, an extended multi-rate algebraic VQ is applied to the TCX spectrum to avoid quantizer saturation, and noise shaping is improved. Results show that the proposed hybrid coder has consistently high performance for both speech and music signals.

An ultra-low-power four-channel sensor interface for wireless sensor networks employing semi-active RFID transponders as sensor nodes is described in the present paper. Each channel is based on a self-contained switched-capacitor second-order single-bit SigmaDelta-modulator operated in an incremental manner. The power consumption can be regulated through variation of the sampling frequency (max. 1 MHz), signal bandwidth (8 Hz-16 kHz), output resolution (max. 16 bits) and/or output word rate. The input and output stages of the employed amplifiers are both class AB for a high energy efficiency. Moreover, the bias current of every amplifier can be programmed according to the actual power availability, thus dynamically exchanging DC-gain, gain-bandwidth-product and slew-rate against power consumption. In addition, two channels may be cascaded (2-2 MASH configuration), further incrementing the resolution and/or reducing the number of clock cycles to obtain a given resolution. The MASH configuration uses an on-line adaptive noise cancellation scheme to further enhance the noise-shaping characteristic of the converter. The power consumption per channel ranges from 4 to 20 muW at a supply voltage of 1.4 V.

An aspect independent radar target discrimination method based on the natural frequencies of ultra wideband radar targets is introduced. The sets of points in a multi-dimensional space corresponding to the poles on a complex plane (natural resonances) were offered as signatures of radar targets. This approach allows performing the automated discrimination algorithm of radar targets. The results of experimental research

Traditionally, delta-sigma modulation has been used for shaping of quantization noise. We present a modified version of delta-sigma modulation which also takes into account unwanted nonlinearities by feeding back not only the quantization error, but also the expected physical error. Behavioral-level simulations of a 5th-order structure showing an improvement of up to 4 effective bits are included