Integrated Circuits

Presented here is a patent in the Bulgarian register of inventions (Reg. № 27611/1974), written in Bulgarian. The patent relates to novel types of leads for various semiconductor devices: integrated circuits, photodiodes, modular packaged discrete devices, etc. The new leads configuration is proposed in order to avoid some of the disadvantages of the existing ones. Illustrated are several examples of assemblies demonstrating the advantages and the versatility of packaging methods applying this novel leads configuration.

The invention described features two claims. The description is supported by five drawings.

According to recent studies, the basic technologies presently adopted by the semiconductor industry for memory and processor fabrication should attain limits imposed by the laws of physics around the year 2010. Nanoscale sized devices like single-electron transistors appear as a highly promising option to replace conventional devices by that time. In this study, considerations about the realization of a GSI

In this paper, we have designed the detailed logical circuits of 1-bit full adder- subtractor
working on analog inputs while manipulating it through half-adder, NAND, AND and OR gates integrating with ANN and Machine Learning algorithm where fixed bias is also applied with each of the designed logical gate combinations. Because hardware implementation is far better than the software manipulation so combination of designed circuit can be used to further design ANN based 4-bit or 8-bit full Adder Subtractor. Creating the new hardware device following the same circuits and techniques can reflect the best performance of Adder Subtractor over analog inputs. Resultant waveform of designed ANN based 1-bit full Adder-Subtractor and its subcircuits are completely in favor of its new hardware implementation.

This chapter will examine the development of Taiwan’s vibrant industrial districts through case studies of arguably the four most successful industrial districts over time: bicycles, machine tools, information and communication technologies (ICT) hardware products, and integrated circuits (ICs). While the Taiwanese state played an active and often critical role in developing these industrial sectors and clusters as it did more broadly in Taiwanese economic development (Chu 2017; Wade 2004), these industrial clusters also varied in terms of the state’s role, the nature of their transnational links, and the concomitant density of their domestic clusters, and whether or not rural industrialization was an antecedent to
each cluster’s development.

Purpose: To develop traffic light system to handle 6-way crossroad traffic movement. The distance measurement sensor and seven segment display is additionally used to manage and control the traffic.
Application: Some large cities are so populated that additionally need a road to existing ones. These additional roads are to be controlled. The proposed traffic light system can handle such an issue.

When designing a chip, a designer needs to consider many tradeoffs before developing the logic. For example, if a chip is being developed for mobile applications, power becomes a very important factor. Under such circumstances, low-power logic is desired. Lower power logic, as the name suggests, helps reduce power but impacts the performance aspect of the chip. Similarly, if a chip is being developed for data center application, high performance is desired, and power consumption carries relatively less importance.

In summary, the power and performance of a chip are inversely proportional, and a designer needs to find the right balance of power and performance when writing logic for a chip. As previously mentioned, the speed aspect of chip is imperative for certain applications. So, when developing logic for such applications, certain methods improve the speed of the design with small logic optimizations. In this article, we will go through the tips and tricks that can improve the speed of a chip design.

Purpose: To develop system, consisting of controlled DC Motor with two pushbuttons. Specifically, the direction of rotation (clockwise or counter-clockwise) should be defined with pressed pushbutton1 or pushbutton2. When one is pressed, DC motor rotates clockwise, when the other is pressed, DC motor rotates counter-clockwise. 
Application: Controlling of DC motor can be useful in every part of engineering task, whether industry related equipment or everyday life electromechanical tools. More complicated systems include elevators, cars, industry conveyors, etc.

Write VHDL code for ‘one-digit counter’ with asynchronous reset. Use WAIT UNTIL.

Important Notes:
1. Input and outputs of PORT are assigned as SIGNAL type by default. To describe it as a variable, the following syntax should be used:
eg. VARIABLE a: IN INTEGER RANGE 0 TO 9
2. Bits have one hyphen at their ends (‘0’), while bit vectors have double hyphens (“00011”), integers do not have any hyphen (0).
3. Variables are assigned using “:=”, bits or standard logic are assigned value using “<=” sign.
4. When using IF, WHILE, FOR or other conditional loops, you should put them into PROCESS part.
5. It is better to define the RANGE of INTEGER
6. In the example above, new variable such as temp was included, since we cannot operate on signals. Even if it is possible, the results retrieved will not be updated.

Purpose: To develop lightning system controlled by photoresistor. Photoresistor serves as simple switch. When we touch and immediately take away our hand, then the LED should change its state. Initially, LED is off. Hence, in the first action, movement of hand results in switching the LED on. 
Application: This system can be implied for household lighting systems, as well as industry related issues. Also, this system is useful in special areas when we do not need mechanical input (touching the switch).

With the advancement of this information technology, a new branch in the field of intellectual property flourished, called as the Layout-Design or the of the semiconductor integrated circuits.

This paper ventures into the registrability of Layout-Designs under the Semiconductor Integrated Circuits Layout Designs Act, 2000 (India) and other international Acts.

The design of a linear integrated Op Amp circuit as an alternative solution to differential equation model of RLC Circuit is presented. The fundamental assumption used in the cascaded Operational Amplifier (Op Amp) design is that Op Amp acts linearly. In this paper, we will examine the behavior of the Op Amp when it is used in the cascaded circuit that is an electrical analog to the differential equation model of RLC circuit, which arises in numerous applications particularly in control and communication systems such as ringing circuits, resonant circuits, filters and oscillators. We will design the cascaded op amp circuit that is analog to differential equation model of RLC circuit and obtain graphical results of output function versus time using PSpice Software Probe. To confirm the validity of the design of a linear integrated Op Amp circuit as an alternative solution to differential equation model of RLC circuit implemented in the PSpice Software, simulation results are compared with RLC circuit where we find good agreement between the theoretical predictions of the differential equation model of RLC circuit and the design of a linear integrated Op Amp circuit.

Port Map method is very useful when it comes to hierarchical model. It allows you to large parts consisting of small components. Let`s for example take full adder, consisting of two half adders.  It means that full adder is entity, and half adders are its components. Follow the figure illustrated below.
1. Components are introduced first. This is done using a 'component' declaration in which all module types which will be used. This declaration has to occur before the 'begin' keyword of the architecture statement.
2. The number of half adders used is declared. This is done by instantiating the declared component. Each component instance is given a unique name (label) by the designer, together with the name of the component itself. Component instantiations are done in the definition part of architecture (after the keyword 'begin').
3. Finally, the components have to be connected to the rest of the circuit. "Signal" keyword is used for this purpose. It has to list the names of the architecture signals that shall be used in the sub-module (not the outer signals of top module listed before).

MOSFET (stands for Metal-Oxide-Semiconductor Field Effect Transistor) is one of the most widely used microelectronic devices today. Thus, the understanding of its working principles is very important for the integrated circuits engineer. CMOS (Complementary Metal-Oxide-Semiconductor) Inverter is the device consisting of two complementary MOSFETs of N-type and P-type that performs the inversion operation. During this lab, the characteristics of these devices would be simulated using Verilog-A and SPICE BSIM 3 models.

In the first laboratory work of Integrated Circuit Design course, we are going to fasten all obtained theoretical knowledge in practice. In other words, we are going to get familiarized with MOSFETS, their operation and related circuits. Moreover, for the first time we will work with software equipment called Tanner EDA, which is widely used in designing and simulation of Integrated Circuits.

International journal of VLSI design & Communication Systems (VLSICS) is a bi monthly open access peer-reviewed journal that publishes articles which contribute new results in all areas of VLSI Design & Communications. The goal of this journal is to bring together researchers and practitioners from academia and industry to focus on advanced VLSI Design & communication concepts and establishing new collaborations in these areas.

Too often, software and system developers take the quality of comput- er hardware for granted, never doubting that the logic of the integrated circuits (ICs) on which software runs and critical application data is stored will consistent- ly function in a dependable (correct, predictable) and trustworthy (non-malicious, non-exploitable) manner. After all, ICs seem to be free of the kinds of design and implementation flaws so common in software, and impervious to subversion by malicious code. So ICs are believed capable of achieving high levels of assurance impossible in software. This belief underpins Trusted Processor Modules (TPMs) and Hardware Security Modules (HSMs) [1], devices conceived as high-assur- ance platforms for critical software processes and highly sensitive data that need strong protection against tampering, interference by untrusted processes, and leakage. But is such faith in IC quality really merited? In recent years, the hard- ware supply chain has been flooded with counterfeit ICs of substandard quality and, more recently, hardware Trojans have emerged as a threat to the trustwor- thiness of IC logic. As a result, engineers of critical software-intensive systems need to employ tools that give them deeper insight into the inner workings of the ICs on which their systems’ software will run. And the developers of that software need to design and implement their code so it can survive not only threats from human attackers and malicious software code, but from substandard hardware counterfeits and malicious IC logic.

This paper presents the design of Low Drop-Out (LDO) voltage regulator has fast transient response and
which exploits a few current else low quiescent current in the operational amplifier PMOS type. We use
band-gap reference for eliminate the temperature dependence. The proposed LDO voltage regulator
implemented in 0.18-µm CMOS technology, we use Folded cascode CMOS amplifiers high performance in
the stability , provide fast transient response which explains a fast settling, the LDO itself should provide in
the output regulator voltages at ∆t equal 2ps with transient variation of the voltage less than 170mV. High
accuracy in the DC response terms, the simulation results show that the accuracy of the output regulator
voltages is 1.54±0.009V, and power consumption of 1.51 mW.

Today's technology has been evolved into stand-alone systems which can do all necessary processes by themselves without any additional hardware. Advance microcontrollers have become microcomputers that are also known as single board computers. These systems take their power from powerful microcontrollers. These microcontrollers have many integrated circuits on board so they can achieve many different processes by themselves. They are being used in many applications from powerful industrial devices to simple home appliances. In today's market, there are many different microcontrollers with different structure and capabilities. Therefore, understanding the concepts related to the microcontrollers is really important for choosing the best hardware. This paper presents the main concepts of microcontrollers and reveals the basis of their structure. Their components and abilities have been discussed and a comparison of well-known single board computers has been given.

This paper presents the architecture and VHDL design of a Two Dimensional Discrete Cosine Transform (2D-DCT) with Quantization and zigzag arrangement. This architecture is used as the core and path in JPEG image compression hardware. The 2D-DCT calculation is made using the 2D-DCT Separability property, such that the whole architecture is divided into two 1D-DCT calculations by using a transpose buffer. Architecture for Quantization and zigzag process is also described in this paper. The quantization process is done using division operation. This design aimed to be implemented in Spartan-3E XC3S500 FPGA. The 2D-DCT architecture uses 1891 Slices, 51I/O pins, and 8 multipliers of one Xilinx Spartan-3E XC3S500E FPGA reaches an operating frequency of 101.35 MHz One input block with 8 x 8 elements of 8 bits each is processed in 6604 ns and pipeline latency is 140 clock cycles .

In this paper, the response to the first harmonic component (2f) of the electrostatic force in single terminal driven electrostatic comb-drive and parallel-plate drive was used as a signal to extract device parameters, namely, the Q-factor and resonant frequency instead of the fundamental (1f) resonance response. It is shown that the difficulty in motional measurement due to electrical cross-talk (parasitics)

The objective of this paper is to use a unique mathematical analysis of a purely resistive electrical circuit to prove the validity of Thevenin's theorem by analysing the relationship between voltages and resistances in a simple electrical circuit and deriving alternatives to Thevenin's theorem.

Signal & Image Processing : An International Journal is an Open Access peer-reviewed journal intended for researchers from academia and industry, who are active in the multidisciplinary field of signal & image processing. The scope of the journal covers all theoretical and practical aspects of the Digital Signal Processing & Image processing, from basic research to development of application.

Authors are solicited to contribute to the journal by submitting articles that illustrate research results, projects, surveying works and industrial experiences that describe significant advances in the areas of Signal & Image processing.

This paper introduces a methodology for symbolic pole/zero extraction based on the formulation of the time-constant matrix of the circuits. This methodology incorporates approximation techniques specifically devoted to achieve an optimum trade-off between accuracy and complexity of the symbolic root expressions. The capability to efficiently handle even large circuits will be demonstrated through several practical circuits.

This research was funded by, and implemented within, a UK national research organisation, while the author was the KE and Impact Evaluation Manager responsible for assessing impact on a £15m UK government-funded research programme.

This work was also submitted as the authors MBA dissertation which was accepted and awarded in 2009.

ABSTRACT: A methodology and methods ‘toolbox’ is proposed for conducting impact research and assessment from within research programmes. The emphasis is upon how to clarify and assess the wider impacts from the early stages onwards.

The approach explicitly acknowledges, and attempts to address, the known issues and challenges of impact assessment while drawing upon the resources and opportunities available to research managers and researchers within such programmes.

The study has two triangulating foundations. Firstly, it examines the academic literature to help identify and design the pilot methodology and methods. Secondly it trials these in a real programme to both test and improve them.

The study was conducted over one year within one leading UK research organisation, where two research programmes (and around 60 research projects of £15m total value) were being assessed for their impacts. The study draws upon actual impact management experience and reflection, prospective (ex ante) and retrospective (ex post) assessments, participatory contributions from leading researchers undergoing assessment, and consultation with external users. The findings of this study outline the pilot and its first iteration. Recommendations are made for improvement to the methodology and methods.

A subsequent follow-on bid to UK government incorporating the impacts identified from implementing this methodology, successfully led to a further £15m of government funding.

It is expected the pilot methodology and methods will be applicable to other organisations, conducting and funding such research programmes, required to research and assess the wider research impacts.

Although primary focus of implemetation trials was upon research in physical sciences, technology, high-tech engineering, computing/IT, and environment, the wider literature study, the methodology design and justification, the methods proposed and used, and the resulting general recommendations and lessons are expected to apply more broadly to many other research areas, where the impact is to be found more widely in the society, economy, government or public sector or within organizations, policies, professions or the public.

Interest in this work is expected from research programme managers, impact managers and assessors, management consultants advising in this area, and government funding managers, all seeking to embed a developing approach to understand, capture, and enhance wider impact.