[go: up one dir, main page]

Huang, 2019 - Google Patents

Coordinating Software and Hardware for Performance Under Power Constraints

Huang, 2019

View PDF
Document ID
11724727786576717654
Author
Huang Z
Publication year

External Links

Snippet

For more than 50 years since its birth in 1965, Moore's Law has been a self-fulfilling prophecy that drives computing forward. However, as Dennard scaling ends, chip power density presents a challenge that becomes increasingly severe with every process …
Continue reading at dukespace.lib.duke.edu (PDF) (other versions)

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Programme initiating; Programme switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power Management, i.e. event-based initiation of power-saving mode
    • G06F1/3234—Action, measure or step performed to reduce power consumption
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/30—Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/383—Operand prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for programme control, e.g. control unit
    • G06F9/06—Arrangements for programme control, e.g. control unit using stored programme, i.e. using internal store of processing equipment to receive and retain programme
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F1/00—Details of data-processing equipment not covered by groups G06F3/00 - G06F13/00, e.g. cooling, packaging or power supply specially adapted for computer application
    • G06F1/16—Constructional details or arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformations of program code
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING; COUNTING
    • G06F—ELECTRICAL DIGITAL DATA PROCESSING
    • G06F21/00—Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity

Similar Documents

Publication Publication Date Title
Mittal A survey of techniques for architecting and managing asymmetric multicore processors
Lukefahr et al. Composite cores: Pushing heterogeneity into a core
Wang et al. Stream-based memory access specialization for general purpose processors
Padmanabha et al. Trace based phase prediction for tightly-coupled heterogeneous cores
Patsilaras et al. Efficiently exploiting memory level parallelism on asymmetric coupled cores in the dark silicon era
Gupta et al. Dynamic workload-aware DVFS for multicore systems using machine learning
Kondguli et al. A case for a more effective, power-efficient turbo boosting
Lukefahr et al. Exploring fine-grained heterogeneity with composite cores
Huang et al. Dynasprint: Microarchitectural sprints with dynamic utility and thermal management
Padmanabha et al. Mirage cores: The illusion of many out-of-order cores using in-order hardware
Maghsoud et al. PEPS: Predictive energy-efficient parallel scheduler for multi-core processors
Sawalha et al. Energy-efficient phase-aware scheduling for heterogeneous multicore processors
Luo et al. Energy efficient speculative threads: Dynamic thread allocation in same-ISA heterogeneous multicore systems
Huang Coordinating Software and Hardware for Performance Under Power Constraints
Luo et al. Dynamically dispatching speculative threads to improve sequential execution
Qiu et al. Efficient energy management by exploiting retention state for self-powered nonvolatile processors
Alonso et al. Energy-efficient execution of dense linear algebra algorithms on multi-core processors
Nagpal et al. Compiler-assisted leakage energy optimization for clustered VLIW architectures
La Fratta et al. Energy-efficient multithreading for a hierarchical heterogeneous multicore through locality-cognizant thread generation
Nejat et al. Cooperative slack management: saving energy of multicore processors by trading performance slack between QoS-constrained applications
Ghiasi Aide de camp: asymmetric multi-core design for dynamic thermal management
Bousias et al. The challenges of massive on-chip concurrency
Luo et al. The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread execution
Hasan Memory dependence prediction for energy constrained devices
Yang et al. Power-efficient instruction delivery through trace reuse