WO2025024134A1 - Dielectric etch using unsaturated carbon containing components - Google Patents

Abstract

A method of etching features in a stack with a silicon containing dielectric layer is provided. Features are partially etched in the stack, wherein the features have sidewalls. A carbon containing deposition is deposited on the sidewalls of the features, comprising providing a pressure of at least 100 mTorr, providing a deposition gas comprising an unsaturated carbon containing passivation component, and forming a plasma from the deposition gas, wherein the plasma deposits a carbon containing deposition on the sidewalls of the features. The features are further etched.

Description

DIELECTRIC ETCH USING UNSATURATED CARBON CONTAINING COMPONENTS

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of priority of U.S. Application No. 63/514,979, filed July 21, 2023, which is incorporated herein by reference for all purposes.

BACKGROUND

[0002] One process frequently employed during the fabrication of semiconductor devices is the formation of an etched cylinder or other recessed feature in a silicon containing dielectric material. The silicon containing dielectric material may be alternating/repeating layers into which the recessed feature is formed or a thick film of a single layer of silicon-containing material. One example context where such a process may occur is memory applications such as DRAM (dynamic random access memory) and NAND (not and devices). As the semiconductor industry advances and device dimensions become smaller, such recessed features become increasingly harder to etch in a uniform manner, especially for high aspect ratio features having narrow widths and/or deep depths.

[0003] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

SUMMARY

[0004] To achieve the foregoing and in accordance with the purpose of the present disclosure, a method of etching features in a stack with a silicon containing dielectric layer is provided. Features are partially etched in the stack, wherein the features have sidewalls. A carbon containing deposition is deposited on the sidewalls of the features, comprising providing a pressure of at least 100 mTorr, providing a deposition gas comprising an unsaturated carbon containing passivation component, and forming a plasma from the deposition gas, wherein the plasma deposits a carbon containing deposition on the sidewalls of the features. The features are further etched.

[0005] In another manifestation, an apparatus for processing a plurality of stacks is provided. A process chamber is provided. A substrate support supports a substrate inside the process chamber. An RF power source provides RF power in the process chamber. A gas source is in fluid connection with the process chamber and comprises an etch gas source and an unsaturated carbon containing passivation component gas source. A controller is controllably connected to the RF power source and the gas source and is configured to a) cause a substrate to be loaded on the substrate support, b) cause a deposition gas comprising a carbon containing passivation component gas to flow into the process chamber from the unsaturated carbon containing passivation component gas source, c) cause the deposition gas to be transformed into a plasma depositing a carbon containing deposition on sidewalls of etch features, d) cause an etch gas from the etch gas source to flow into the process chamber, e) cause features to be partially etched, cause steps b through e to be repeated at least once, and cause the substrate to be removed from the substrate support.

[0006] These and other features of the present disclosure will be described in more detail below in the detailed description and in conjunction with the following figures.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present disclosure is illustrated by way of example, and not by way of limitation, in the figures of the accompanying drawings and in which like reference numerals refer to similar elements and in which:

[0008] FIG. 1 depicts a flow chart describing a method of etching recessed features into a stack containing dielectric material according to some embodiments.

[0009] FIGS. 2A-2F illustrate a stack that is processed according to some embodiments. [0010] FIG. 3 depicts a flow chart of a carbon containing deposition process used in some embodiments.

[0011] FIGS. 4A-4B illustrate another stack that is processed according to some embodiments. [0012] FIG. 5 illustrates a reaction chamber that may be used to perform the techniques described herein according to some embodiments.

[0013] FIG. 6 illustrates a computer system for implementing a controller used in some embodiments.

[0014] FIG. 7 depicts another flow chart describing a method of etching recessed features into a stack containing dielectric material according to some embodiments.

[0015] In the drawings, like reference numerals are sometimes used to designate like structural elements. It should also be appreciated that the depictions in the figures are diagrammatic and not to scale. DETAILED DESCRIPTION

[0016] The present disclosure will now be described in detail with reference to a few preferred embodiments thereof as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art, that the present disclosure may be practiced without some or all of these specific details. In other instances, well known process steps and/or structures have not been described in detail in order to not unnecessarily obscure the present disclosure.

[0017] Fabrication of certain semiconductor devices involves etching features into a stack of materials using plasma-based etch processes. In various embodiments herein, the stack of materials includes alternating/repeating layers of dielectric material. In a number of cases, at least one of the layers in the stack is or includes silicon containing layer. Silicon containing layers may contain silicon nitride, silicon oxide, silicon carbide, silicon oxy-nitride, silicon oxycarbide, polysilicon, or silicon germanium. In some embodiments, the stack includes alternating layers of silicon oxide and polysilicon. In some embodiments, the stack comprises an alternating silicon oxide film with silicon nitride films or single silicon oxide layer.

[0018] The features etched into silicon containing materials may be cylinders, trenches, or other recessed features. The aspect ratio of such a feature is defined as the depth divided by the lateral critical dimension. As the aspect ratio of such features continues to increase, several issues arise including (1) twisting of the features, (2) non-circularity of the features, (3) aspectratio dependent etch rate, (4) bowing etch profile, (5) insufficient mask selectivity, and (6) low etch rate.

[0019] Twisting refers to random deviations between the intended bottom locations of the features and the actual final bottom locations of the features (e.g., with the final location of a feature corresponding to the position of the bottom of the feature after the feature is etched). For instance, in some cases, it is intended that cylindrical features are etched in a regular array.

When some or all features randomly deviate at the bottom away from this array, they are understood to have twisted. Twist may be measured by the degree to which the features deviate away from the desired array pattern. The twist reported herein is the standard deviation of hole- to-hole distance at the bottom of the features, multiplied by three. Because twist is not a desirable feature, it is preferable for it to be as low as possible.

[0020] Non-circularity of the features, also described as ellipticity, refers to deviations of the bottom hole shape away from a circular hole shape. This issue is relevant when etching circular features such as cylinders, where it is desired that the bottoms of the recessed features are circular. When the bottom hole shape deviates away from a circular shape, it often forms a shape closer to an ellipse, triangle, or irregular polygon. In many cases, these non-circular shapes are not desirable. Ellipticity may be measured by the degree to which the bottoms of cylindrical features deviate from a perfect circle towards an elliptical shape and is calculated as the ratio of major axis length to minor axis length for an ellipse fitted to the bottom hole shape. Features that are perfect circles have an ellipticity of 1.0. Because circular features are often desired (e.g., when etching cylinders), it is preferable for the ellipticity to be close to 1.0. In various embodiments, mask features that have a circular cross section result in features with an average ellipticity in the range of 1.0 to 1.1.

[0021] Aspect-ratio dependent etch rate refers to an issue where the etch rate slows down as the aspect ratio of the features increases. In other words, as the features are etched further into the dielectric material, the etching process slows down. This issue is problematic because it can lead to low throughput and associated high processing costs.

[0022] Bowing etch profile refers to the tendency for the features to etch laterally in the dielectric layer such that the final profile bows outwards excessively somewhere along the depth of the features. In other words, the actual maximum critical dimension of the features exceeds the desired maximum critical dimension of the features, which can compromise the integrity of the structures being formed or limit the electrical performance of the final devices.

[0023] Insufficient mask selectivity is problematic when the etch process removes an excessive amount of mask, such that no mask remains at the end of the process, or that the amount of mask remaining is insufficient to properly transfer the pattern from the mask to the dielectric film(s). One common result of insufficient mask selectivity is the degradation of the feature profile near the top of the recessed features.

[0024] Low etch rate refers to an etch rate that is slower than desired for a particular application. Low etch rate is problematic because it leads to long etch times, reduced throughput, and high processing costs.

[0025] Unfortunately, techniques that improve some of these issues often make other issues worse. As such, these issues are balanced against one another when designing an etching operation. For example, conventional commercially practiced dielectric etch processes often result in substantial bowing. Previously, such tradeoffs have been difficult to avoid. [0026] The techniques described herein may be used to etch recessed features into dielectric material without some or all of the issues identified above. In other words, the disclosed techniques may be used to etch recessed features into dielectric material with little or no twisting, reasonably circular features, an acceptable degree of aspect ratio dependent etch rate, acceptable bowing, sufficient mask selectivity, and sufficient etch rate.

[0027] In various embodiments herein, an etch process is provided that provides a plurality of cycles of etching a stack with at least one dielectric layer and depositing a carbon containing deposition using an unsaturated carbon containing passivation component. The carbon containing deposition may provide a conformal or nonconformal deposition on the sidewalls and etch fronts of the features.

[0028] To facilitate understanding, FIG. 1 is a flow chart of a process that may be used in some embodiments. A stack is placed over a substrate support in a process chamber (step 104). FIG. 2A is a schematic cross-sectional view of a stack 204 that may be processed according to some embodiments. The stack 204 may be formed over a substrate 208. Stack 204 is a layer of silicon oxide (SiO2) 212 under a carbon based mask 216 with mask features 220. In some embodiments, the carbon based mask 216 comprises at least one of amorphous carbon, carbon polymer, and photoresist. In some embodiments, one or more layers may be between the layer of silicon oxide 212 and the substrate 208. In some embodiments, one or more layers may be between the layer of silicon oxide 212 and the mask 216. In some embodiments, the mask features have a CD of less than 25 nanometers (nm). In some embodiments, the mask features have a CD of less than 20 nm. A silicon oxide layer includes silicon oxide based layers. Silicon oxide based layers are silicon oxide layers that may also include one or more dopants.

Similarly, a polysilicon layer also includes a polysilicon layer with at least one dopant resulting in a polysilicon based layer. A silicon nitride layer includes a silicon nitride layer with at least one dopant forming a silicon nitride based layer.

[0029] In some embodiments, the stack 204 is partially etched (step 108). This partial etch is optional and is not performed in some embodiments. FIG. 2B is a schematic cross-sectional view of the stack 204 after features 224 are partially etched into the stack 204.

[0030] Next, a cyclical process is provided (step 112). In some embodiments, the cyclical process (step 112) comprises one or more cycles of depositing a carbon containing deposition layer using an unsaturated carbon containing passivation component (step 116) and etching the stack (step 120). In some embodiments, the cyclical process (step 112) further comprises an optional break through (step 118).

[0031] FIG. 3 is a more detailed flow chart of the depositing carbon containing deposition using an unsaturated carbon containing passivation component (step 116). In some embodiments, the depositing of the carbon containing deposition comprises providing a pressure of at least 100 mTorr in the process chamber (step 304). A deposition gas comprising an unsaturated carbon containing passivation component is flowed into the process chamber (step 308). In some embodiments, the deposition gas comprises hydrogen (H ) and at least one of an unsaturated hydrocarbon, acetonitrile (H3CCN, trifluoroacetonitrile (F3CCN), and an unsaturated fluorohydrocarbon. In some embodiments, the at least one of an unsaturated hydrocarbon and an unsaturated fluorohydrocarbon comprises at least one of fluoroethylene (C2H3F), difluoroethylene (C2H2F2), acetylene (C2H2), propylene (C3H6), propyne (C3H4), and ethylene (C2H4). In some embodiments, the deposition gas comprises hydrogen (H2), at least one of an unsaturated carbon containing passivation component, and a carrier gas, such as argon (Ar), helium (He), krypton (Kr), xenon (Xe), and nitrogen (N2). In some embodiments, the carrier gas is an inert gas of Ar. In some embodiments, radio frequency (RF) power is provided at one or more frequencies in a frequency range of 10 megahertz (MHz) to 200 MHz, for example at 60 MHz, at a power in the range of 10 watts (W) to 1000 W. In some embodiments, to provide higher aspect ratios, additional RF power is provided at one or more frequencies in the range of 400 kilohertz (kHz) to 2 MHz, at a power in the range of 1 W to 1000 W. Significant improvements were obtained when the deposition gas comprises hydrogen (H2) since the presence of H2 provides control over the amount of conformality provided by the deposition. A plasma is generated from the deposition gas (step 312), where the plasma deposits a carbon containing deposition layer on the sidewalls and etch fronts of the features (step 316).

[0032] FIG. 2C is a schematic cross-sectional view of the stack 204 after the carbon containing deposition layer 228 has been deposited on the sidewalls of the features 224. The carbon containing deposition layer 228 is not drawn to scale but is shown as being thicker in order to more clearly see the carbon containing deposition layer 228. In some embodiments, the use of an unsaturated carbon containing passivation component increases the amount of deposition on sidewalls of the features 224 with respect to the etch front, since unsaturated carbon containing passivation components have a higher sticking coefficient than saturated carbon containing passivation components and are more likely to form sticky radicles due to their unsaturated bonding (or pi-bonding). As a result, the process is moved away from a non- conformal ion assisted deposition to a more conformal neutral driven deposition. The H2 component provides control of the conformality of the deposition allowing the deposition to be either more or less conformal.

[0033] After the carbon containing deposition layer has been deposited (step 116) an optional break through etch may be provided (step 118). In some embodiments, the break through is an ion dominated etch process that allows for a selective removal of parts of the deposition layer on non-vertical surfaces that are directly exposed to the ions, such as parts of the deposition layer on top of the mask and on top of the etch front. In some embodiments, a recipe for a break through etch provides a break through gas consisting essentially of an inert ion source gas such as one or more of N2, Ar, Kr, and Xe, and provides RF power to transform the break through gas into ions, and provides a bias RF power to provide bias energy to accelerate the ions to the deposition layer. In some embodiments, RF power is provided at one or more frequencies in the range of 100 kHz to 100 MHz, for example at one or more of 400 kHz, 2 MHz, 27 MHz, and 60 MHz. In addition, pressure is provided in the range of 10 mTorr to 500 mTorr. FIG. 2D is a schematic cross-sectional view of the stack 204 after the optional break through step. The part of the carbon containing deposition layer 228 on the etch front has been etched away. The use of an unsaturated hydrocarbon or unsaturated hydrofluorocarbon during the sidewall deposition provides more sidewall deposition and less etch front deposition so that the break through removes deposition on the etch front without removing too much sidewall deposition so that the sidewalls are sufficiently protected during the subsequent etch process. The resulting features will have a more uniform CD from the top to the bottom of the features.

[0034] After the carbon containing deposition layer has been deposited (step 116) or after the optional break through (step 118), the stack is etched (step 120). In some embodiments, a reactive ion etch is used. In some embodiments, a chemical etch is used. In some embodiments, a combination of a reactive ion etch and a chemical etch is used. In some embodiments, the etch (step 120) is provided using a chamber pressure of less than 50 mTorr. In some embodiments, the etch (step 120) is provided using a chamber pressure of less than 10 mTorr. FIG. 2E is a schematic cross-sectional view of the stack 204 after the etch. The features 224 are etched deeper. The carbon containing deposition layer 228, shown in FIG. 2D, has been etched away. In some embodiments, the carbon containing deposition layer 228 is etched but not etched away. [0035] In some embodiments, the depositing of the carbon containing deposition layer (step 116) and the etching of the stack (step 120) are cyclically repeated for one or more cycles until the etching of the features is completed. In some embodiments, the depositing of the carbon containing deposition layer (step 116) and the etching of the stack (step 120) are cyclically repeated for at least two cycles. During each cycle, the pressure in the chamber goes from above 100 mTorr to less than 50 mTorr. FIG. 2F is a schematic cross-sectional view of the stack 204 after the etch of the features 224 is completed. The mask 216 is etched. In some embodiments, the mask 216 is completely etched away. The stack may be optionally further processed in the process chamber (step 124). In some embodiments, if the mask 216 is not completely etched away, the optional process may remove the remaining mask 216 and any remaining carbon containing deposition. The stack is removed from the substrate support in the process chamber (step 128). Since in this example, the stack remains on the substrate support during the partial etch (step 108) and the cyclical process (step 112), the partial etch (step 108) and the cyclical process (step 112) are performed in-situ in the same process chamber.

[0036] Experiments have found that depositing a carbon containing deposition layer using a deposition gas comprising hydrogen (H2) and at least one of an unsaturated hydrocarbon or an unsaturated hydrofluorocarbon at a pressure above 100 mTorr to provide a conformal deposition and then providing a break through to remove deposition at the etch front provides more uniform CD than other processes. In addition, it has been found that depositing a carbon containing deposition layer using a deposition gas comprising hydrogen (H2), and at least one of an unsaturated hydrocarbon or an unsaturated hydrofluorocarbon at a pressure above 100 mTorr provides a carbon containing deposition layer that conformally and uniformly deposits on silicon oxide and other materials such as poly silicon. It was found by experiment that H2 is able to tune the conformality. Unsaturated hydrocarbons and unsaturated hydrofluorocarbons have an increased stickiness causing more deposition on the sidewalls and less deposition at the etch front compared to using saturated hydrocarbons or saturated hydrofluorocarbons so that the resulting deposition is more conformal. In addition, it was found that a high pressure above 100 mTorr was needed. In some embodiments, the pressure was in the range of 100 mTorr to 2000 mTorr. In some embodiments, the pressure was in the range of 200 mTorr to 500 mTorr. In some embodiments, the carbon containing deposition layer is a carbon containing layer that is metal free.

[0037] Some prior art carbon deposition processes deposit more carbon on polysilicon than silicon oxide. If the stack had a polysilicon mask, the increased carbon deposition on the sides of the polysilicon could cause bread loafing which would close features with a CD of less than 20 nm or may cause an etch stop of such features. By providing a carbon based mask, features with a CD of less than 20 nm are not closed. The carbon deposition protects the sidewalls of the features in order to reduce bowing. The bowing creates a maximum CD at the location of the bowing. Other methods may be used to reduce bowing. However, the other methods may increase etch time, reduce etch selectivity, increase twisting, increase non-circularity, increase aspect ratio dependent etching, increase etch stop, increase feature plugging, or may cause other detrimental etch effects. By providing a uniform sidewall passivation, an additional control tool is added to allow a reduction of bowing and a reduction in CD without increasing other detrimental etch effects.

[0038] FIG. 4A is a schematic cross-sectional view of another stack 404 that may be processed according to some embodiments. In some embodiments, the stack 404 may be formed over a substrate 408. One or more layers may be disposed between the stack 404 and the substrate 408. In some embodiments, the stack 404 is a plurality of at least bilayers of a layer of silicon oxide (SiO2) 416 and a layer of poly silicon (Si) 412 or silicon nitride (SiN). A mask 420 with mask features 422 may be formed over the stack 404. In some embodiments, the mask 420 is a carbon-containing mask, such as an organic mask, one example of which would be an amorphous carbon mask. An amorphous carbon mask may also include some amount of hydrogen and/or oxygen.

[0039] The stack 404 is placed over a substrate support in a process chamber (step 104). The cyclical process is provided (step 112). In some embodiments, the depositing of the carbon containing deposition layer (step 116), the optional break through (step 118), and the etching of the stack (step 120) are cyclically repeated for a plurality of cycles until the etching of the features is completed. A recipe for etching the stack (step 120) is a recipe that uniformly etches the layers of silicon oxide 416 and the layers of polysilicon 412 or silicon nitride. The depositing of the carbon containing deposition layer (step 116) comprising providing a pressure of at least 100 mTorr, providing a deposition gas comprising hydrogen (H2), and at least one of an unsaturated hydrocarbon or an unsaturated hydrofluorocarbon, and forming a plasma from the deposition gas has been found to conformally deposit carbon containing deposition on the sidewalls of the layers of silicon oxide 416 and the layers of polysilicon 412 or silicon nitride. The break through (step 118) may use the break through process described above. FIG. 4B is a schematic cross-sectional view of the stack 404 after features 424 have been etched. The sides of the features are uniform between the layers of silicon oxide 416 and the layers of polysilicon 412 or silicon nitride. Some prior art would deposit more carbon on the sidewalls of layers of polysilicon 412 or silicon nitride than on the sidewalls of layers of silicon oxide 416 causing the sidewalls of the layers of silicon oxide 416 to be etched more making the sides of the features nonuniform, such as a scalloped sidewall. Some prior art would deposit more deposition at the etch front than the sidewalls either slowing or stopping the etch process or causing the sidewalls to be etched.

[0040] One application for the disclosed methods is in the context of forming a vertical NAND device. In this case, the material into which the feature is etched may have a repeating layered structure. For instance, the material may include alternating layers of silicon oxide and polysilicon or alternating layers of silicon oxide and silicon nitride. The alternating layers form pairs or repeating groups of materials. In various cases, the number of pairs or repeating groups may be between about 10-500 (e.g., between about 20-1000 individual layers). The feature etched into the stack of layers may have a depth between about 2-15 pm, for example between about 5-9 pm. The feature may have a width between about 10-100 nm, for example between about 10-50 nm. In some embodiments, the features have a width of less than 20 nm. In some embodiments, the features have a width of less than 15 nm.

[0041] As used herein, “high aspect ratio” as applied to features in a substrate refers to depth to width aspect ratios on the order of approximately 60: 1 or higher. More preferably, this range may include ratios greater than 100: 1 , 120: 1 , 140: 1 , etc., or higher. However, the processes described herein may be beneficial for lower aspect ratios, such as 30: 1, or 10: 1.

[0042] There are many types of mask layers that may be used with the described embodiments, which will include any such layer known in the art which may serve as an etching mask. For example, the mask may be a carbon hard mask, such as amorphous carbon. In other embodiments, the mask may be a doped carbon. In some embodiments, the mask may contain silicon, a metal, or a metalloid. In some embodiments, the deposition gas may further comprise additional component gases. For example, in some embodiments, the deposition gas may further comprise one or more of metal containing components, such as metal halides, and sulfur containing components, such as carbonyl sulfide.

[0043] The dimensional/parametric details provided herein, such as high aspect ratio, thickness, width, depth, etc., are for example and illustration only. Based on the disclosure described herein, it should be understood that varying dimensions/parameters may also be applicable or used. APPARATUS

[0044] The various hardware and method embodiments described above may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, though not necessarily, such tools/processes will be used or conducted together in a common fabrication facility.

[0045] Lithographic patterning of a film typically comprises some or all of the following steps, each step enabled with a number of possible tools: (1) application of photoresist on a workpiece, e.g., a substrate having a silicon containing film formed thereon, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or other suitable curing tool; (3) exposing the photoresist to visible or ultraviolet (UV) or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove the resist and thereby pattern it using a tool such as a wet bench or a spray developer; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper. In some embodiments, an ashable hard mask layer (such as an amorphous carbon layer) and another suitable hard mask (such as an antireflective layer) may be deposited prior to applying the photoresist.

[0046] In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially fabricated integrated circuit” are used interchangeably. One of ordinary skill in the art would understand that the term “partially fabricated integrated circuit” can refer to a silicon wafer during any of many stages of integrated circuit fabrication thereon. A wafer or substrate used in the semiconductor device industry typically has a diameter of 200 mm, 300 mm, or 450 mm. The above detailed description assumes the embodiments are implemented on a wafer. However, the embodiments are not so limited. The workpiece may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other work pieces that may take advantage of the disclosed embodiments include various articles such as printed circuit boards, magnetic recording media, magnetic recording sensors, mirrors, optical elements, micromechanical devices, and the like.

[0047] Unless otherwise defined for a particular parameter, the terms “about” and “approximately” as used herein are intended to mean ±10% with respect to a relevant value. [0048] FIG. 5 is a schematic view of a plasma processing chamber 500 for plasma processing substrates, in an embodiment. In one or more embodiments, the plasma processing chamber 500 comprises a gas distribution plate 506 providing a gas inlet and an electrostatic chuck (ESC) 552, within a plasma processing chamber 504, enclosed by a chamber wall 550. Within the plasma processing chamber 504, the substrate 208 is positioned on top of the ESC 552 so that the ESC 552 is a substrate support. A bias from an ESC power source 548 may be provided to the ESC 552. A gas source 510 is in fluid connection to the plasma processing chamber 504 through the gas distribution plate 506. In some embodiments, the gas source 510 comprises an H2 source 512, an etch gas source 516, an unsaturated carbon containing passivation component gas source 518, and a break through gas source 514. An ESC temperature controller 551 is connected to the ESC 552 and provides temperature control for the ESC 552. A radio frequency (RF) power source 530 provides RF power to the ESC 552 and an upper electrode. In this embodiment, the upper electrode is the gas distribution plate 506. In some embodiments, 400 kilohertz (kHz), 13.56 megahertz (MHz), 1 MHz, 2 MHz, 60 MHz, and/or optionally, 27 MHz power sources make up the RF power source 530 and the ESC power source 548. A controller 535 is controllably connected to the RF power source 530, the ESC power source 548, an exhaust pump 520, and the gas source 510. A high flow liner 560 is a liner within the plasma processing chamber 504, which confines gas from the gas source and has slots 562. The slots 562 maintain a controlled flow of gas to pass from the gas source 510 to the exhaust pump 520. An example of such a plasma processing chamber is the Flex® etch system manufactured by Lam Research Corporation of Fremont, CA. The process chamber can be a CCP (capacitively coupled plasma) reactor or an ICP (inductively coupled plasma) reactor.

[0049] FIG. 6 is a high level block diagram illustrating a computer system 600 for implementing the controller 535 used in embodiments of the present inventions. The computer system may have many physical forms ranging from an integrated circuit, a printed circuit board, and a small handheld device up to a huge supercomputer. The computer system 600 may include one or more processors 602 and further can include an electronic display device 604 (for displaying graphics, text, and other data), a main memory 606 (e.g., random access memory (RAM)), storage device 608 (e.g., hard disk drive), removable storage device 610 (e.g., optical disk drive), user interface devices 612 (e.g., keyboards, touch screens, keypads, mice or other pointing devices, etc.), and/or a communication interface 614 e.g., wireless network interface). The communication interface 614 may allow software and/or data to be transferred between the computer system 600 and external devices via a link. The system may also include a communications infrastructure 616 (e.g., a communications bus, cross-over bar, or network) to which the aforementioned devices/modules may be connected.

[0050] Information transferred via communications interface 614 may be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface 614, via a communication link that carries signals and may be implemented using wire or cable, fiber optics, a phone line, a cellular phone link, a radio frequency link, and/or other communication channels. With such a communications interface, it is contemplated that the one or more processors 602 might receive information from a network or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments may execute solely upon the processors or may execute over a network such as the Internet in conjunction with remote processors that shares a portion of the processing.

[0051] The term “non-transient computer readable medium” is used generally to refer to media such as main memory, secondary memory, removable storage, and storage devices, such as hard disks, flash memory, disk drive memory, CD-ROM, and other forms of persistent memory and shall not be construed to cover transitory subject matter, such as carrier waves or signals. Examples of computer code include machine code, such as that produced by a compiler, and files containing higher level code that are executed by a computer using an interpreter. Computer readable media may also be computer code transmitted by a computer data signal embodied in a carrier wave and representing a sequence of instructions that are executable by a processor.

[0052] In some embodiments, the controller is configured to perform a plurality of cycles where each cycle comprises depositing a carbon containing deposition layer and partially etching features into an etch layer by providing an etch gas from the etch gas source 516, where the depositing the carbon containing deposition layer comprises providing a pressure of at least 100 mTorr in the process chamber, flowing a deposition gas comprising an unsaturated carbon containing passivation component from the unsaturated carbon containing passivation component gas source 518 into the process chamber, and cause a plasma to be generated from the deposition gas in order to provide a carbon containing deposition layer. In some embodiments, the controller is further configured to provide break through step after depositing the carbon containing deposition layer and before partially etching by providing a break through as from the break through gas source 514. In some embodiments, the deposition gas further comprises hydrogen from an H2 source 512. ALTERNATIVE EMBODIMENT

[0053] FIG. 7 is a flow chart of an alternative process that may be used in some embodiments. These embodiments are like the embodiments shown in FIG. 1 with an added cleaning (step 722). A stack is placed over a substrate support in a process chamber (step 704). In some embodiments, the stack is partially etched (step 708). This partial etch is optional and is not performed in some embodiments. Next, a cyclical process is provided (step 712). In some embodiments, the cyclical process (step 712) comprises one or more cycles of depositing a carbon containing deposition layer using an unsaturated carbon containing passivation component (step 716), cleaning the features (step 722), and etching the stack (step 720). In some embodiments, the cyclical process (step 712) further comprises an optional break through (step 718). In some embodiments, the break through is an ion dominated etch process that allows for a selective removal of parts of the deposition layer on non- vertical surfaces that are directly exposed to the ions, such as parts of the deposition layer on top of the mask and on top of the etch front. After the stack is etched (step 720). In some embodiments, the depositing of the carbon containing deposition layer (step 716) and the etching of the stack (step 720) are cyclically repeated for one or more cycles until the etching of the features is completed. In some embodiments, the depositing of the carbon containing deposition layer (step 716) and the etching of the stack (step 720) are cyclically repeated for at least two cycles. During each cycle, the pressure in the chamber goes from above 700 mTorr to less than 50 mTorr. The stack may be optionally further processed in the process chamber (step 724). In some embodiments, if the mask 216 is not completely etched away, the optional process may remove the remaining mask 216 and any remaining carbon containing deposition. The stack is removed from the substrate support in the process chamber (step 728). Since in this example, the stack remains on the substrate support during the partial etch (step 708) and the cyclical process (step 712), the partial etch (step 708) and the cyclical process (step 712) are performed in-situ in the same process chamber.

[0054] In some embodiments, the cleaning the features (step 722) comprise providing a cleaning gas comprising at least one of nitrogen (N2), argon (Ar), krypton (Kr), xenon (Xe), hydrogen (H2), and oxygen (O2). The cleaning gas is then formed into a plasma.

[0055] The cleaning the features (step 722) removes deposition and by-products created by the depositing of the carbon containing deposition layer (step 716) and the etching of the stack (step 720). The cleaning (step 722) reduces or removes necking at the top. The necking could harm the profile in the following cycles. In addition, the cleaning (step 722) provides a clean sidewall so that the surfaces are identical during each cycle simplifying process control.

CONCLUSION

[0056] While this disclosure has been described in terms of several preferred embodiments, there are alterations, modifications, permutations, and various substitute equivalents, which fall within the scope of this disclosure. It should also be noted that there are many alternative ways of implementing the methods and apparatuses of the present disclosure. It is therefore intended that the following appended claims be interpreted as including all such alterations, modifications, permutations, and various substitute equivalents as fall within the true spirit and scope of the present disclosure. As used herein, the phrase “A, B, or C” should be construed to mean a logical (“A OR B OR C”), using a non-exclusive logical “OR,” and should not be construed to mean ‘only one of A or B or C. Each step within a process may be an optional step and is not required. Different embodiments may have one or more steps removed or may provide steps in a different order. In addition, various embodiments may provide different steps simultaneously instead of sequentially.

Claims

CLAIMS What is claimed is:

1. A method of etching features in a stack with a silicon containing dielectric layer, the method comprising: a. partially etching features in the stack, wherein the features have sidewalls; b. depositing a carbon containing deposition on the sidewalls of the features, comprising: providing a pressure of at least 100 mTorr; providing a deposition gas comprising an unsaturated carbon containing passivation component; and forming a plasma from the deposition gas, wherein the plasma deposits a carbon containing deposition on the sidewalls of the features; and c. further etching the features.

2. The method, as recited in claim 1 , wherein a pressure of at least 100 mTorr is a pressure in a range of 100 mTorr to 2000 mTorr.

3. The method, as recited in claim 1 , wherein the pressure of at least 100 mTorr is a pressure in a range of 200 mTorr to 500 mTorr.

4. The method, as recited in claim 1, wherein the deposition gas comprises, hydrogen (H2), and at least one of an unsaturated hydrocarbon and an unsaturated hydrofluorocarbon.

5. The method, as recited in claim 1, wherein the unsaturated carbon containing passivation component comprises at least one of fluoroethylene (C2H3F), difluoroethylene (C2H2F2), acetylene (C2H2), propylene (C3H6), acetonitrile (H3CCN), trifluoroacetonitrile (F3CCN), propyne (C3H4), and ethylene (C2H4).

6. The method, as recited in claim 1, wherein the unsaturated carbon containing passivation component comprises ethylene (C2H4).

7. The method, as recited in claim 1 , wherein steps b and c are repeated for at least two cycles.

8. The method, as recited in claim 1, wherein steps a through c are performed in-situ, within a processing chamber.

9. The method, as recited in claim 1 , wherein a pressure of no more than 50 mTorr is provided during the further etching of the features.

10. The method, as recited in claim 1, wherein the silicon containing stack comprises at least one silicon oxide based layer, wherein either the partially etching features or further etching the features etches the at least one silicon oxide based layer.

11. The method, as recited in claim 1 , wherein at least some of the features have a CD of less than 25 nm.

12. The method, as recited in claim 1, wherein the further etching of the features is a reactive ion etch.

13. The method, as recited in claim 1 , wherein the stack comprises at least one silicon oxide containing layer below a carbon based mask and wherein the further etching of the features selectively etches the at least one silicon oxide containing layer with respect to the carbon based mask.

14. The method, as recited in claim 1 , wherein the stack comprises a plurality of at least bilayers, wherein each at least bilayer comprises at least one silicon oxide layer and at least one of a silicon nitride and polysilicon layer, and wherein the further etching the features uniformly etches the at least one silicon oxide layer and the at least one of a silicon nitride and polysilicon layer.

15. The method, as recited in claim 1, further comprising step d cleaning the features, wherein steps b, c, and d are repeated in a cycle at least once.

16. An apparatus for processing a plurality of stacks, comprising: a process chamber; a substrate support for supporting a substrate inside the process chamber; an RF power source for providing RF power in the process chamber; a gas source in fluid connection with the process chamber, comprising an etch gas source; and an unsaturated carbon containing passivation component gas source; and a controller, controllably connected to the RF power source and the gas source, configured to: a) cause a substrate to be loaded on the substrate support; b) cause a deposition gas comprising a carbon containing passivation component gas to flow into the process chamber from the unsaturated carbon containing passivation component gas source; c) cause the deposition gas to be transformed into a plasma depositing a carbon containing deposition on sidewalls of etch features; d) cause an etch gas from the etch gas source to flow into the process chamber; e) cause features to be partially etched; f) cause steps b through e to be repeated at least once; and h) cause the substrate to be removed from the substrate support.

17. The apparatus of claim 16, wherein the gas source further comprises a break through gas source and wherein the controller is further configured to: cause a break through gas from the break through gas source to flow into the process chamber after step c and before step d; and cause a plasma to be generated from the break through gas to break through a passivation at an etch front.

18. The apparatus of claim 16, wherein the gas source further comprises an H2 source and wherein the deposition gas further comprises H2 flowed from the H2 source.