WO2024203537A1 - Photonic-crystal surface emitting laser element - Google Patents

Abstract

This photonic-crystal surface emitting laser element is provided with: a first guide layer which is formed on the lower guide layer and comprises a lower guide layer, a photonic crystal layer having vacancies that are two-dimensionally arranged on lattice points and an embedment layer formed on the photonic crystal layer and filling the vacancies; a hetero semiconductor layer which is formed on the embedment layer and is composed of a semiconductor having a crystal composition different from that of the embedment layer; an active layer which is formed on the hetero semiconductor layer; and a second guide layer which is formed on the active layer. The embedment layer is doped with an n-type dopant at a concentration of 1.0 × 10¹⁷ to 1.0 × 10²⁰ cm^-3.

Description

Photonic crystal surface emitting laser element

The present invention relates to a photonic crystal surface-emitting laser element having a photonic crystal layer.

Various structures have been proposed to increase the efficiency of semiconductor light-emitting elements. For example, Patent Document 1 describes an ultraviolet light-emitting element that has a composition-gradient layer for generating holes through the polarization doping effect and efficiently injecting the holes into the active layer.

Patent Document 2 also describes a nitride semiconductor light-emitting device that has a compositionally graded layer in which the Al composition decreases toward the side where the sum of spontaneous polarization and piezoelectric polarization becomes negative in order to improve the efficiency of hole injection into the active layer.

Patent Document 3 also discloses a photonic crystal surface-emitting laser (PCSEL) that is made of a crystal layer with a different crystal composition from the air hole layer (photonic crystal layer) and has a light distribution adjustment layer that adjusts the coupling efficiency between the light and the air hole layer.

JP 2022-041738 A Patent No. 6192378 WO2021/186965 A1 Publication

The inventors of the present application have discovered that depletion due to piezoelectric polarization occurs at the heterointerface between a photonic crystal layer and a semiconductor layer formed on the photonic crystal layer and having a different crystal composition from that of the photonic crystal layer, forming a barrier against electrons and preventing efficient operation of a photonic crystal surface-emitting laser (PCSEL).

The present application is based on this finding and aims to provide a photonic crystal surface-emitting laser element that has high injection efficiency and emits light with a low threshold and high efficiency.

A photonic crystal surface emitting laser element according to one embodiment of the present invention comprises:
An n-type semiconductor layer;
a first guide layer including: a photonic crystal layer formed on the n-type semiconductor layer, the photonic crystal layer having holes arranged two-dimensionally at each lattice point; and a buried layer formed on the photonic crystal layer for closing the holes;
a hetero semiconductor layer formed on the buried layer and made of a semiconductor having a different crystal composition from that of the buried layer;
an active layer formed on the hetero semiconductor layer;
a second guide layer formed on the active layer;
The buried layer is doped with an n-type dopant at a concentration of 1.0×10 ¹⁷ to 1.0×10 ²⁰ cm ⁻³ .

1 is a cross-sectional view showing a schematic example of a structure of a PCSEL element according to a first embodiment. 1B is an enlarged cross-sectional view showing a schematic diagram of holes arranged in the photonic crystal layer shown in FIG. 1A. FIG. 2 is a plan view showing a schematic top surface of a PCSEL element. 2 is a cross-sectional view that illustrates a cross section taken along a plane parallel to an n-side guide layer. FIG. FIG. 2 is a plan view showing a schematic bottom surface of a PCSEL element. FIG. 2 is a plan view showing a schematic view of a main opening and a sub-opening in a resist, and a hole after etching. 1 is a diagram showing a schematic cross section perpendicular to the central axis CX of a formed photonic crystal layer. FIG. 1 is a graph showing the measurement results of the IV characteristics of Samples 1 to 4 (EX.1 to EX.4) of the PCSEL element of this embodiment. 1 is a graph showing the measurement results of the IV characteristics of the PCSEL element and surface-emitting element samples 1 to 5 (CX.1 to CX.5) of the comparative example. 1 is a graph showing a SIMS profile in the depth direction of a PCSEL element. 1 is a table showing parameters of each semiconductor layer of a PCSEL device. FIG. 13 is a diagram showing the simulation results of the energy band of the conduction band, and the concentrations of electrons and holes when the donor concentration of the buried layer is set to 2.0×10 ¹⁷ cm ⁻³ . FIG. 13 is a diagram showing the simulation results of the energy band of the conduction band, and the concentrations of electrons and holes when the donor concentration of the buried layer is set to 2.0×10 ¹⁸ cm ⁻³ . 11 is a graph showing a simulation result of IV characteristics when the donor concentration of the buried layer is changed.

Below, preferred embodiments of the present invention will be described, but these may be modified and combined as appropriate. Furthermore, in the following description and accompanying drawings, substantially the same or equivalent parts are denoted by the same reference symbols.

[First embodiment]
1. Structure of Photonic Crystal Surface Emitting Laser Element A photonic crystal surface emitting laser element (PCSEL element) is an element that has a resonator layer in a direction parallel to the semiconductor light emitting structure layers (n-side guide layer, light emitting layer, p-side guide layer) that constitute a light emitting element, and radiates coherent light in a direction perpendicular to the resonator layer.

In other words, in a PCSEL element, light waves propagating within a plane parallel to the photonic crystal layer (air hole layer) are diffracted by the diffraction effect of the photonic crystal to form a two-dimensional resonance mode, and are also diffracted in a direction perpendicular to the parallel plane. In other words, in a PCSEL element, the light extraction direction is perpendicular to the resonance direction (within the plane parallel to the photonic crystal layer).

FIG. 1A is a cross-sectional view showing an example of the structure of a photonic crystal surface-emitting laser element (PCSEL element) 10 according to an embodiment of the present invention. FIG. 1B is an enlarged cross-sectional view showing a photonic crystal layer 14P in FIG. 1A and air holes 14K (air hole pairs) arranged in the photonic crystal layer 14P.

FIG. 2A is a plan view that typically shows the upper surface of the PCSEL element 10. FIG. 2B is a cross-sectional view that typically shows a cross section of the photonic crystal layer 14P in a plane parallel to the n-side guide layer 14, and FIG. 2C is a plan view that typically shows the lower surface of the PCSEL element 10. As shown in FIG. 1A, a semiconductor structure layer 11 is formed on a light-transmitting element substrate 12. The semiconductor layers are stacked perpendicular to the central axis CX of the semiconductor structure layer 11.

The semiconductor structure layer 11 is made of a hexagonal nitride semiconductor. In this embodiment, the semiconductor structure layer 11 is made of, for example, a GaN-based semiconductor.

More specifically, a semiconductor structure layer 11 consisting of multiple semiconductor layers is formed on an element substrate 12, in this order: an n-clad layer (first clad layer of a first conductivity type) 13, an n-side guide layer (first guide layer) 14 which is a guide layer provided on the n-side, a light distribution adjustment layer 23, an active layer (ACT) 15, a p-side guide layer (second guide layer) 16 which is a guide layer provided on the p-side, an electron barrier layer (EBL: Electron Blocking Layer) 17, a p-clad layer (second clad layer of a second conductivity type) 18, and a p-contact layer 19.

Note that, although the case will be described where the first conductivity type is n-type and the second conductivity type, which is the opposite conductivity type to the first conductivity type, is p-type, the first conductivity type and the second conductivity type may also be p-type and n-type, respectively.

The element substrate 12 is a hexagonal GaN single crystal substrate that has a high transmittance for the light emitted from the active layer 15. More specifically, the element substrate 12 is a hexagonal GaN single crystal substrate whose main surface (crystal growth surface) is a +c plane, which is a {0001} plane in which Ga atoms are arranged on the outermost surface. The back surface (light emission surface) is a -c plane, which is a (000-1) plane in which N atoms are arranged on the outermost surface. The -c plane is suitable as a light emission surface because it is resistant to oxidation, etc.

The element substrate 12 is not limited to this, but is preferably a so-called just substrate, or, for example, a substrate whose main surface is offset by about 1° in the m-axis direction. For example, a substrate offset by about 0.3 to 0.7° in the m-axis direction can obtain mirror-finish growth under a wide range of growth conditions.

The substrate surface (back surface, light emission surface) on which the light emission region 20L (Figure 2C) facing the main surface is provided is the "-c" surface, which is the (000-1) surface on which N atoms are arranged. The -c surface is resistant to oxidation, etc., and is therefore suitable as a light extraction surface.

The composition, thickness, and other configurations of each semiconductor layer are explained below, but these are merely examples and can be modified as appropriate.

The n-cladding layer 13 is, for example, an n-Al _0.04 Ga _0.96 N layer with an Al composition of 4% and a thickness of 2 μm. The aluminum (Al) composition ratio is set so that the refractive index is smaller than that of the layer adjacent to the active layer 15 side (i.e., the n-side guide layer 14).

The n-side guide layer 14 is composed of a lower guide layer 14A, a photonic crystal layer (PC layer) 14P which is an air-hole layer, and a buried layer 14B. As shown in Fig. 1B, the photonic crystal layer 14P has a layer thickness _dPC , and the buried layer 14B has a layer thickness _dEMB . For example, the layer thickness _dPC of the photonic crystal layer 14P is 40 to 180 nm.

In this specification, photonic crystal layer 14P refers to the layer portion from the upper end to the lower end of the air hole in n-side guide layer 14 (see FIG. 1B). Therefore, the layer thickness d _PC of photonic crystal layer 14P is equal to the height of the air hole.

The lower guide layer 14A is, for example, n-GaN with a layer thickness of 100 to 400 nm. The photonic crystal layer 14P is n-GaN with a layer thickness (or the depth of the holes 14K) of 40 to 180 nm.

The buried layer 14B is made of n-GaN or n-InGaN. Alternatively, it may be a layer in which these semiconductor layers are stacked. The layer thickness d _EMB of the buried layer 14B is, for example, 50 to 150 nm. The buried layer 14B is made of a first buried layer 14B1 and a second buried layer 14B2, and is doped with an n-type dopant (Si) at a concentration of, for example, 1×10 ¹⁸ cm ⁻³ .
It is sufficient that the second embedded layer 14B2, which is a surface layer of the embedded layer 14B that is in contact with the light distribution adjustment layer 23, is doped with an n-type dopant.

On the second buried layer 14B2, which is the surface layer of the buried layer 14B, there is provided a light distribution adjustment layer 23, which is a hetero semiconductor layer (a heterogeneous semiconductor layer) that has a different crystal composition from the second buried layer 14B2 and forms a heterostructure with the second buried layer 14B2.

In other words, a hetero interface is formed between the hetero semiconductor layer (light distribution adjustment layer 23) and the second embedded layer 14B2.

The hetero semiconductor layer (light distribution adjustment layer 23) may be a semiconductor layer of the same conductivity type as the second buried layer 14B2, or at least one of them may be an i-layer (intrinsic semiconductor layer).
Light distribution adjustment layer 23 is provided between buried layer 14B and active layer 15, and has the function of adjusting the coupling efficiency between the light propagating within photonic crystal layer 14P and photonic crystal layer 14P acting as a resonator.

In this embodiment, the light distribution adjustment layer 23 is an undoped In _0.03 Ga _0.97 N layer, and has a layer thickness of, for example, 50 nm. The composition or refractive index and layer thickness of the light distribution adjustment layer 23 are selected according to adjustment of coupling efficiency.

The n-side semiconductor layer including the n-side guide layer 14 and the light distribution adjustment layer 23 is also referred to as the first semiconductor layer.

The active layer 15, which is the light-emitting layer, is, for example, a multiple quantum well (MQW) layer having two quantum well layers. The barrier layer and quantum well layer of the MQW are GaN (layer thickness 6.0 nm) and InGaN (layer thickness 4.0 nm), respectively. The central emission wavelength of the active layer 15 is 440 nm.

It is preferable that the active layer 15 is disposed within 180 nm of the photonic crystal layer 14P (i.e., within the period PK of the holes). In this case, a high resonance effect is obtained by the photonic crystal layer 14P.

The p-side guide layer 16 is composed of a p-side guide layer (1) 16A which is an undoped In _0.02 Ga _0.98 N layer (layer thickness 70 nm) and a p-side guide layer (2) 16B which is an undoped GaN layer (layer thickness 180 nm).

The p-side guide layer 16 is an undoped layer in consideration of the light absorption by the dopant (Mg: magnesium, etc.), but it may be doped to obtain good electrical conductivity. In addition, the In composition and layer thickness of the p-side guide layer (1) 16A can be appropriately selected to adjust the electric field distribution in the oscillation operation mode.

The electron barrier layer (EBL) 17 is a magnesium (Mg)-doped p-type Al _0.2 Ga _0.8 N layer having a thickness of, for example, 15 nm.

The p-cladding layer 18 is an Mg-doped p-Al _0.06 Ga _0.94 N layer, and has a thickness of, for example, 600 nm. The Al composition of the p-cladding layer 18 is preferably selected so that the refractive index is smaller than that of the p-side guide layer 16. The p-cladding layer 18 functions as a first p-cladding layer.

The p-contact layer 19 is a Mg-doped p-GaN layer, and has a thickness of, for example, 20 nm. The carrier density of the p-contact layer 19 is set to a concentration that allows for ohmic junction with the transparent electrode 29, which is a transparent conductive layer provided on the surface of the p-contact layer. Instead of p-type GaN, p-type or undoped InGaN may be used. Alternatively, a layer in which a GaN layer and an InGaN layer are stacked may be used.

The layer consisting of the p-side guide layer 16, the electron barrier layer 17, the p-cladding layer 18 and the p-contact layer 19 is also referred to as the second semiconductor layer.

In this specification, "n-side" and "p-side" do not necessarily mean n-type and p-type. For example, the n-side guide layer means a guide layer provided on the n-side of the active layer, and may be an undoped layer (or i-layer).

The n-cladding layer 13 may be composed of multiple layers rather than a single layer, in which case not all layers need to be n-layers (n-doped layers) and may include undoped layers (i-layers). The same applies to the p-side guide layer 16 and p-cladding layer 18.

Furthermore, it is not necessary to provide all of the semiconductor layers described above, and it is sufficient to have a configuration having a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and an active layer (light-emitting layer) sandwiched between these layers.

On the p-contact layer 19, a p-electrode 20B (second electrode) is formed as a translucent electrode/Ag/Au layer in which a translucent electrode 29 (not shown), a silver (Ag) layer, and a gold (Au) layer are laminated in this order. In other words, the p-electrode 20B functions as a light reflecting layer, and the interface between the translucent electrode 29 and the Ag layer of the p-electrode 20B is the reflecting surface SR. The reflecting surface SR is provided parallel to the photonic crystal layer 14P.

The p-electrode 20B has a circular shape with a diameter RA centered on the central axis CX of the void formation region 14R. Specifically, the transparent electrode 29 has a diameter of, for example, RA = 300 μm when viewed from above (i.e., when viewed from a direction perpendicular to the semiconductor structure layer 11). Note that Pd, Al, Al alloys, etc. may also be used as the p-electrode 20B. A pad electrode, etc. may also be provided on the p-electrode 20B.

The translucent electrode 29 is formed of a translucent conductor, for example, indium tin oxide (ITO). Note that the translucent electrode 29 is not limited to ITO, and other translucent conductors such as zinc tin oxide (ZTO), GZO (ZnO:Ga), and AZO (ZnO:Al) can be used.

The side and top surfaces of the semiconductor structure layer 11 and the side surfaces of the p-electrode 20B are covered with an insulating film 21 such as SiO _2. The insulating film 21 is formed so as to run onto the p-electrode 20B and cover the edge of the top surface of the p-electrode 20B.

The insulating film 21 also functions as a protective film, protecting the aluminum (Al)-containing crystal layer constituting the PCSEL element 10 from corrosive gases, etc. It also prevents short circuits caused by adhesions or solder creeping up during mounting, contributing to improved reliability and yield. The material of the insulating film 21 is not limited to _SiO2 , but may be _ZrO2 , HfO2, _{TiO2 , Al2O3} , _SiNx , etc.

A circular cathode electrode 20A (first electrode) is formed on the back surface of the element substrate 12 (see FIG. 2C). In addition, an anti-reflective (AR) coating layer 27 is formed on the inside of the cathode electrode 20A.

The cathode electrode 20A is made of Ti/Au and is in ohmic contact with the element substrate 12. In addition to Ti/Au, the electrode material can be selected from Ti/Al, Ti/Rh, Ti/Al/Pt/Au, Ti/Pt/Au, etc.

The light emitted from the active layer 15 is diffracted by the photonic crystal layer (PC layer) 14P. The light is diffracted by the photonic crystal layer 14P (diffraction surface WS), and the light emitted directly from the photonic crystal layer 14P (direct diffracted light Ld: first diffracted light) and the light emitted by the diffraction of the photonic crystal layer 14P and reflected by the reflection surface SR (reflected diffracted light Lr: second diffracted light) are emitted to the outside from the light emission region 20L (Figure 2C) of the rear surface (emission surface) 12R of the element substrate 12.

As shown in FIG. 2B, in the photonic crystal layer 14P, the holes 14K are arranged periodically within, for example, a rectangular hole formation region 14R.

As shown in FIG. 2C, the anode region RA is formed so as to be contained within the void formation region 14R.

The cathode electrode 20A is provided as a ring-shaped electrode on the outside of the p-electrode 20B so as not to overlap with the p-electrode 20B when viewed from a direction perpendicular to the photonic crystal layer 14P.

The area inside the cathode electrode 20A is the light emission area 20L. In addition, a bonding pad 20C is provided that is electrically connected to the cathode electrode 20 and connects a wire for power supply from an external source.

2. Photonic crystal layer fabrication method and recrystallization growth
The process of fabricating the photonic crystal layer and the recrystallization growth are described below. Metalorganic Vapor Phase Epitaxy (MOVPE) was used as the crystal growth method. Note that the method of forming the photonic crystal layer 14P will be described below using the example of a double lattice photonic crystal layer, but a single lattice photonic crystal layer and a multiple lattice photonic crystal layer can also be formed in the same manner.

(a) Formation of holes First, an n-type Al _0.04 Ga _0.96 N layer with an Al composition of 4% was grown as n-clad layer 13 on substrate 12. Then, an n-type GaN layer was grown on n-clad layer 13. This grown layer was a preparatory layer for forming lower guide layer 14A and photonic crystal layer 14P.

After the preparation layer was formed, the substrate was removed from the chamber of the MOVPE apparatus, and fine recesses (holes) were formed on the surface of the growth layer. After obtaining a clean surface by washing, a silicon nitride film (SiN _{x ) was formed by plasma CVD. A resist for electron beam lithography was applied on the SiN x} film, and the substrate was placed in an electron beam lithography apparatus to pattern a two-dimensional periodic structure.

FIG. 3 is a plan view showing the main opening K1 and sub-opening K2 of the resist, and the main hole 14H1 and sub-hole 14H2 after etching. As shown in FIG. 3, a pattern was performed in which pairs of openings, each consisting of an oval-shaped main opening K1 and a sub-opening K2 that is smaller than the main opening K1, were two-dimensionally arranged in the plane of the resist in a square lattice pattern with a period PK. For clarity of the drawing, the openings are shown with hatching.

More specifically, the main openings K1 have their centers of gravity CD1 arranged two-dimensionally on the lattice points of a square lattice with period PK in two mutually orthogonal directions (x direction and y direction). Similarly, the sub-openings K2 have their centers of gravity CD2 arranged two-dimensionally on the lattice points of a square lattice with period PK in the x direction and y direction.

The major axes of the main opening K1 and the sub-opening K2 are parallel to the <11-20> crystal orientation, and the minor axes of the main opening K1 and the sub-opening K2 are parallel to the <1-100> crystal orientation.

Furthermore, the center of gravity CD2 of the sub-opening K2 is spaced apart from the center of gravity CD1 of the main opening K1 by Δx and Δy. Here, Δx=Δy. In other words, the center of gravity CD2 of the sub-opening K2 is spaced apart from the center of gravity CD1 of the main opening K1 in the <1-100> direction.

The distances Δx and Δy between the centers of gravity of the main opening K1 and the sub-opening K2 were set to Δx=Δy=0.46PK. After the patterned resist was developed, the SiN _x film was selectively dry etched by an ICP-RIE (Inductive Coupled Plasma - Reactive Ion Etching) device. As a result, the main opening K1 and the sub-opening K2, which were two-dimensionally arranged on the lattice points of the square lattice with the period PK, were formed so as to penetrate the SiN _x film.

The period (hole spacing) PK was set to PK = 177.5 nm in order to set the oscillation wavelength (λ) to 438 nm.

Next, the resist was removed, and recesses (holes) were formed in the GaN surface using the patterned SiN _x film as a hard mask. The GaN was dry-etched in the depth direction using a chlorine-based gas and argon gas in an ICP-RIE apparatus, to form an oval cylindrical main hole 14H1 and a sub-hole 14H2 that were dug vertically in the GaN surface.

In addition, the recesses (holes) dug in the GaN surface portion by the above etching are simply referred to as main holes and sub-holes in order to distinguish them from air holes in the photonic crystal layer 14P. When there is no particular distinction between the main holes 14H1 and the sub-holes 14H2, they may be collectively referred to as holes 14H.
The shape of the hole 14H is not limited to an oval cylinder, but may be a cylinder, a polygon, or the like.

(b) Formation of the buried layer (recrystallization growth)
After cleaning the substrate in which the hole 14H was formed, it was again introduced into the reactor of the MOVPE apparatus and regrowth was performed. Specifically, ammonia (NH ₃ ) and trimethylgallium (TMG) were supplied to form the first buried layer 14B1 and close the opening of the hole 14H.

At the same time, silane (SiH ₄ ) was supplied as an n-type dopant to dope the first buried layer 14B1 with Si at a concentration of 1×10 ¹⁸ cm ^-3 . Note that the n-type dopant may be Ge instead of Si, and disilane (Si ₂ H ₆ ) or germane (GeH ₄ ) may be used as the supply source of the n-type dopant.

In other words, the first buried layer 14B1 was formed at a first temperature (920°C) at which the shape of the hole 14H was transformed by mass transport into a shape composed of thermally stable surfaces.

In this first temperature region, N atoms are attached to the top surface of the growth substrate, so that N-polarity faces are selectively grown. Therefore, {1-101} facets are selectively grown on the surface. When the opposing {1-101} facets collide with each other, the hole 14H is blocked and filled. This forms the first buried layer 14B1.

Next, after blocking the main hole 14H1 and the sub-hole 14H2, the second buried layer 14B2 having a thickness of 50 nm was grown. The second buried layer 14B2 was grown by raising the substrate temperature (growth temperature) to 1050° C. (second buried temperature) and then supplying trimethylgallium (TMG), NH ₃ and silane (SiH ₄ ). The second buried temperature was higher than the first buried temperature. However, the temperature relationship between the second buried temperature and the first buried temperature may be reversed as long as the growth surface of the second buried layer 14B2 can be grown to be the (0001) plane. The second buried layer 14B2 was doped with Si at a concentration of 1×10 ¹⁸ cm ⁻³ .

In addition, the second embedded layer 14B2 in this embodiment also functions as a light distribution adjustment layer for adjusting the coupling efficiency (light field) between the light and the photonic crystal layer 14P.

In other words, the first buried layer 14B1 and the second buried layer 14B2 in this embodiment are GaN layers doped with Si (n-type dopant). However, the first buried layer 14B1 and the second buried layer 14B2 are not limited to GaN, and may be n-GaN, n-InGaN, or a layer in which these semiconductor layers are stacked.

The above embedding process resulted in the formation of a photonic crystal layer 14P with a double lattice structure in which holes 14K, each consisting of a pair of a main hole 14K1 and a subhole 14K2, are arranged two-dimensionally at each of the square lattice points. Here, the subhole 14K2 has a smaller hole diameter and height than the main hole 14K1.

In addition, when there is no particular distinction between the main hole 14K1 and the sub-hole 14K2, they may be collectively referred to as the hole 14K.

FIG. 4 is a schematic diagram showing a cross section perpendicular to the central axis CX of the formed photonic crystal layer 14P. When filling holes in the group III nitride, the shape of the holes 14H is deformed by mass transport into a shape composed of thermally stable surfaces, and voids 14K are formed.

In other words, in a +c-plane substrate, the inner surface of hole 14H changes shape to a (1-100) plane (i.e., an m-plane). That is, the shape changes from an oval cylindrical shape to an oval hexagonal prism-shaped hole 14K whose side surface is made up of an m-plane.

The formed primary void 14K1 had a long hexagonal prism shape with a long diameter of 72.5 nm and a short diameter of 43.5 nm, and a long diameter/short diameter ratio of 1.67. The secondary void 14K2 had a long diameter of 44.6 nm and a short diameter of 38.3 nm, and a long diameter/short diameter ratio of 1.16, and had a long hexagonal prism shape closer to a regular hexagonal prism than the primary void 14K1.

Furthermore, it was confirmed that the distances Δx and Δy between the centers of gravity of the main hole 14K1 and the subhole 14K2 were 81.6 nm (Δx = Δy = 0.46PK), and had not changed since before the filling. It was also confirmed that the major axes of the main hole 14K1 and the subhole 14K2 were parallel to the <11-20> axis (i.e., the a-axis).

Furthermore, the hole filling factors FF1 and FF2 of the main holes 14K1 and the sub-holes 14K2 were calculated to be FF1 = 8.8% and FF2 = 4.2%. Here, the hole filling factor is the ratio of the area occupied by each hole per unit area in a two-dimensional regular array. Specifically, when the areas of the main holes 14K1 and the sub-holes 14K2 in the photonic crystal layer 14P are S1 and S2, respectively, the hole filling factors FF1 and FF2 of the main holes 14K1 and the sub-holes 14K2 are given by the following formulas.

FF1=S1/ ^PK2 , FF2=S2/ ^PK2
Through the above steps, the formation of the n-side guide layer 14 including the photonic crystal layer 14P, which is a hole layer, is completed.

(c) Growth of Light Distribution Adjustment Layer, Active Layer, and p-Semiconductor Layer Following the growth of the buried layer 14B, the supply of the MO source material was switched to sequentially grow the light distribution adjustment layer 23.

In this embodiment, the light distribution adjustment layer 23 is made of a semiconductor having a different crystal composition from the buried layer 14B. Specifically, the light distribution adjustment layer 23 is an undoped In _0.03 Ga _0.97 N layer, which is a hetero semiconductor layer (a different semiconductor layer) that forms a heterostructure with the buried layer 14B (GaN layer). The semiconductor layer that constitutes the buried layer 14B has a smaller lattice constant in the a-axis direction than the semiconductor layer that constitutes the light distribution adjustment layer 23. That is, the lower guide layer 14A, the photonic crystal layer 14P, and the buried layer 14B that constitute the n-side guide layer 14 are composed of the same lattice constant. However, the light distribution adjustment layer 23 is epitaxially grown from the n-side guide layer 14. Therefore, the a-axis is compressed and the c-axis is stretched, resulting in large polarization. Therefore, a band barrier (BB) is generated as shown in FIG. 9, which will be described later. This band barrier (BB) does not occur in the semiconductor growth process where the lattice constant difference is small, such as when AlGaN is grown on GaN.

Next, the active layer 15, the p-side guide layer (second guide layer) 16, the electron barrier layer (EBL) 17, the p-cladding layer 18, and the p-contact layer 19 were grown in sequence on the light distribution adjustment layer 23. In this way, the PCSEL element 10 was fabricated.

3. Characteristics of the PCSEL Element (a) Characteristics of the PCSEL Element of the Present Embodiment A number of samples of the PCSEL element 10 were fabricated, and their current-voltage characteristics (IV characteristics) were evaluated. Fig. 5 is a graph showing the measurement results of the IV characteristics of samples 1 to 4 (EX.1 to EX.4).

Here, Samples 1 to 3 (EX.1 to EX.3) of the embodiment are PCSEL elements 10 having the structure described above. Sample 4 (EX.4) is a reference sample that serves as a reference standard for evaluating the characteristics of Samples 1 to 3. Specifically, Sample 4 (EX.4) differs from PCSEL element 10 in that it does not have photonic crystal layer 14P, but is otherwise a surface-emitting element having the same structure as PCSEL element 10.

More specifically, the surface-emitting device of Reference Sample 4 (EX.4) was fabricated as follows. First, an n-clad layer 13 was grown on a substrate 12, and then an n-type GaN layer was grown on the n-clad layer 13. The substrate was then removed from the reactor of the MOVPE device, cleaned, and then re-introduced into the reactor of the MOVPE device for regrowth.

As shown in Figure 5, it was confirmed that each PCSEL element (EX.1 to EX.3) of this embodiment exhibits approximately the same threshold and efficiency, and has good I-V characteristics.

Furthermore, it was confirmed that each of the PCSEL elements of Samples 1 to 3 (EX.1 to EX.3) had good I-V characteristics that were comparable to those of the surface-emitting element of Reference Sample 4 (EX.4), which does not have a photonic crystal layer 14P (PC layer).

(b) Characteristics of Comparative PCSEL Elements A number of PCSEL elements and surface-emitting devices were fabricated as comparative examples of the PCSEL element 10 of the present embodiment, and their current-voltage characteristics (IV characteristics) were evaluated. Figure 6 is a graph showing the measurement results of the IV characteristics of Samples 1 to 5 (CX.1 to CX.5).

Specifically, in the surface-emitting devices of Samples 1 to 5 (CX.1 to CX.5) of the comparative example, the buried layer 14B (first buried layer 14B1 and second buried layer 14B2) is an undoped layer that is not doped with a dopant, and in this respect, they differ from the PCSEL devices 10 of Samples 1 to 4 (EX.1 to EX.4) of the embodiment.

More specifically, the PCSEL elements of Comparative Examples 1 to 3 (CX.1 to CX.3) differ from the PCSEL elements 10 of Samples 1 to 3 (EX.1 to EX.3) of the embodiment only in that the buried layer 14B is an undoped layer.

The surface-emitting device of comparative example sample 4 (CX.4) differs from the PCSEL devices of comparative examples samples 1 to 3 (CX.1 to CX.3) in that it does not have the photonic crystal layer 14P. However, it is the same as the surface-emitting device of reference sample 4 (EX.4) of the embodiment in that it has been regrown.

The surface-emitting device of comparative sample 5 (CX.5) does not have a photonic crystal layer 14P, and is an element in which an n-type GaN layer is grown on the n-clad layer 13, and then undoped GaN is continuously grown on the n-type GaN layer. In other words, the process of forming a recess (hole) is not performed, and the n-type GaN layer and the undoped GaN layer are continuously grown on the n-clad layer 13 in a crystal growth apparatus (MOCVD apparatus). Otherwise, it is a surface-emitting device with the same structure as the PCSEL device 10. The only difference between comparative sample 4 and sample 5 is the manufacturing method, in that the device is removed from the MOVPE apparatus midway through growth and re-grown, or the device is continuously grown without being removed from the MOVPE apparatus, and the laminated structure is the same for both surface-emitting devices.

As shown in Figure 6, the PCSEL elements of comparative samples 1 to 3 (CX.1 to CX.3) and the surface-emitting device of sample 4 (CX.4) have higher drive voltages and significantly larger differential resistances than the surface-emitting device of sample 5 (CX.5) which does not have the photonic crystal layer 14P and is formed by continuous growth.

(c) Cause of the increase in driving voltage in the PCSEL element of the comparative example Fig. 7 shows the measurement results (SIMS profile) of SIMS (secondary ion mass spectrometry) in the depth direction of the PCSEL element formed by regrowth. For clarity of the figure, each semiconductor layer is indicated by its reference number. For example, "14B" indicates the buried layer 14B, and "23" indicates the light distribution adjustment layer (hetero semiconductor layer) 23.

As shown in FIG. 7, since buried layer 14B is close to the regrowth interface, the memory effect during MOCVD growth causes unintended elements such as Mg to be incorporated, lowering the donor concentration. This phenomenon occurs regardless of the presence or absence of vacancies.

In addition, when filling vacancies, the vacancies are blocked by selectively growing the {1-101} facet, and the vacancies are filled in the GaN layer. In this case, more impurities present in the atmosphere are taken in than in the (0001) face growth, so the donors are compensated, and the driving voltage is thought to increase.

(d) Improvement of Characteristics of the PCSEL Device of the Present Embodiment As described above, in the PCSEL device 10 of the present embodiment, the buried layer 14B (i.e., the first buried layer 14B1 and the second buried layer 14B2) is doped with an n-type dopant.

The I-V characteristics when the donor concentration of buried layer 14B is changed were simulated using the device simulator Atlas.

Fig. 8 is a table showing the parameters of each semiconductor layer of the PCSEL element used in the simulation. In the layer configuration, "x.comp" indicates the composition x ( _{InxGa1 -xN} , _{AlxGa1 -xN} ) of each semiconductor layer (Material), and "Thick (nm)" indicates the layer thickness. In addition, "Doping profiles" indicates the conductivity type and doping concentration (Conc (cm ^-3 )) of each semiconductor layer (Material). In Group III nitride semiconductors, since undoped layers show slight n-type conductivity, the conductivity type is indicated as n-type, and the doping concentration is set to 5.0 x ¹⁰¹⁶ cm ^-3 .

In this simulation, calculations were performed while changing the n concentration of the buried layer 14B in the range of 1.0×10 ¹⁷ to 2.0×10 ¹⁸ cm ⁻³ .

9 and 10 are diagrams showing the simulation results of the conduction band energy band and the electron and hole concentrations when the donor concentrations (Nd) of the buried layer 14B are set to 2.0×10 ¹⁷ cm ⁻³ and 2.0×10 ¹⁸ cm ⁻³ , respectively.

As shown in FIG. 9, when the donor concentration (Nd) is 2.0×10 ¹⁷ cm ⁻³ , it can be seen that the interface between the light distribution adjustment layer (hetero semiconductor layer) 23 (InGaN) and the buried layer 14B (GaN) is depleted due to piezoelectric polarization, and a band barrier (BB, shown by the dashed line) against electrons injected from the buried layer 14B is formed.

When the band barrier (BB) is high, current will not flow unless voltage is applied until the barrier height at the interface is reduced, and if the donor concentration in buried layer 14B is too low, the drive voltage will increase.

10, when the donor concentration (Nd) is increased to 2.0×10 ¹⁸ cm ^-3 , the band barrier at the interface between the light distribution adjustment layer (hetero semiconductor layer) 23 and the buried layer 14B is lowered (see FIG. 9). Also, when the donor concentration (Nd) is 2.0×10 ¹⁸ cm ^-3 or more, the band barrier is significantly improved.

In PCSEL elements, impurities (Mg, C, etc.) easily enter during buried growth (regrowth), compensating for donors. Also, unintended acceptors are introduced due to the introduction of defects during facet growth. Therefore, in PCSEL elements, the band barrier at the interface between the hetero semiconductor layer and buried layer, which arises due to this compensation effect, is understood to significantly impair the element characteristics.

11 is a graph showing the results of a simulation of the I-V characteristics when the donor concentration (Nd) of the buried layer 14B is changed. As a result, it was found that the higher the donor concentration (Nd), the better the I-V characteristics are, and that the characteristics can be significantly improved by increasing the donor concentration up to 1.0×10 ¹⁸ cm ^-3 . It was also found that the improvement in characteristics is saturated when the donor concentration is 2.0×10 ¹⁸ cm ^-3 or higher. In the figure, the arrow indicates the direction of increase in the donor concentration Nd.

On the other hand, in the simulation of the I-V characteristics, the calculated values diverged when the n concentration of the buried layer 14B was 1.0×10 ¹⁷ cm ⁻³ or less. In other words, it was found that the barrier at the interface between the light distribution adjustment layer (hetero semiconductor layer) 23 (InGaN) and the buried layer 14B (GaN) was high and no current flowed.

That is, the doping concentration of the buried layer 14B is preferably 2.0×10 ¹⁷ cm ^-3 or more, and more preferably 1.5×10 ¹⁷ cm ^-3 or more considering the autodoping of the memory effect during regrowth (about 5.0×10 ¹⁶ cm ^-3 ) and the incorporation of donors. Also, from the viewpoint of the effect of improving the I-V characteristics, the doping concentration is preferably 1.0×10 ¹⁸ cm ^-3 or more, and more preferably 2.0×10 ¹⁸ cm ^-3 or more.

Furthermore, when Si, which is used as a general dopant, is doped to about 1.0×10 ²⁰ cm ⁻³ , polarity inversion occurs and the surface morphology deteriorates, so the doping concentration of the buried layer 14B is preferably 1.0×10 ²⁰ cm ⁻³ or less.

Furthermore, taking into consideration the effect of the surface roughness of the growth surface of the buried layer 14B on the regrown layer, the doping concentration of the buried layer 14B is more preferably 2.0×10 ¹⁹ cm ⁻³ or less.
As described above in detail, according to the present invention, it is possible to provide a photonic crystal surface emitting laser element that has high injection efficiency and emits light with a low threshold and high efficiency.

Note that unless otherwise specified, the numerical values and the like in the above-described embodiments are merely examples and can be modified as appropriate. In addition, although a double-lattice structure PCSEL element is illustrated, the present invention can be applied to a single-lattice structure PCSEL element and generally to a multiple-lattice structure PCSEL element.

In addition, although the present invention has been exemplified with a photonic crystal layer in which the holes have a hexagonal columnar shape, the present invention can also be applied to cases in which the holes in the photonic crystal layer have an irregular columnar shape, such as a cylindrical, rectangular, polygonal, or teardrop shape.

10: PCSEL element 12: Element substrate 13: First cladding layer 14: First guide layer 14A: Lower guide layer 14B: Buried layer 14B1: First buried layer 14B2: Second buried layer 14K: Hole/hole pair 14K1/14K2: Main/sub-hole 14P: Photonic crystal layer (hole layer)
15: Active layer 16: Second guide layer 17: Electron barrier layer 18: Second cladding layer 19: Contact layer 23: Light distribution adjustment layer (hetero semiconductor layer)

Claims (6)

A lower guide layer;
a first guide layer including: a photonic crystal layer formed on the lower guide layer, the photonic crystal layer having holes two-dimensionally arranged at each lattice point; and a burying layer formed on the photonic crystal layer for closing the holes;
a hetero semiconductor layer formed on the buried layer and made of a semiconductor having a different crystal composition from that of the buried layer;
an active layer formed on the hetero semiconductor layer;
a second guide layer formed on the active layer;
The photonic crystal surface emitting laser element is configured such that the buried layer is doped with an n-type dopant at a concentration of 1.0×10 ¹⁷ to 1.0×10 ²⁰ cm ⁻³ . 2. The photonic crystal surface emitting laser element according to claim 1, wherein the doping concentration of said buried layer is within a range of 1.0×10 ¹⁸ to 1.0×10 ²⁰ cm ^{−3 .} 2. The photonic crystal surface emitting laser element according to claim 1, wherein the doping concentration of said buried layer is within a range of 2.0×10 ¹⁸ to 2.0×10 ¹⁹ cm ⁻³ . The photonic crystal surface-emitting laser element according to claim 1, wherein the buried layer comprises a first undoped buried layer and a second buried layer formed on the first buried layer and doped with an n-type dopant. The photonic crystal surface-emitting laser element according to claim 1, wherein the hetero semiconductor layer is an undoped layer. 6. The photonic crystal surface emitting laser element according to claim 1, wherein the buried layer is made of GaN, and the hetero semiconductor layer is made of InGaN.

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