WO2024113336A1 - Driving circuit, method and system for micro-led pixels - Google Patents

Abstract

A driving circuit, method and system for micro-LED pixels. The driving circuit comprises a sequential storage unit, a NOT gate logic arithmetic unit and a pixel driving unit which are electrically connected to each other. The sequential storage unit is used for receiving a plurality of time sequence control signals, a plurality of pixel data signals and an input control signal which are arranged in a time sequence, and the pixel data signals respectively correspond to the time sequence control signals; the sequential storage unit generates an image control signal according to the plurality of pixel data signals, the input control signal and the plurality of time sequence control signals. The logic arithmetic unit performs operation on the image control signal by using NOT gate logic, so as to generate a driving signal. The pixel driving unit is used for receiving the driving signal and driving, according to the driving signal, micro-LED pixels to emit light. Therefore, the driving circuit, method and system for micro-LED pixels of the present invention can achieve the purpose of reducing the pixel area and avoiding interference between lines.

Description

Micro-LED pixel driving circuit, method and system Technical Field

The present invention relates to the technical field of micro-LED displays, and more specifically, to a driving circuit, method and system for micro-LED pixels.

Background technique

Micro-LED display technology refers to micron-scale LED pixel units, which can be assembled on a drive panel to form a high-density LED display array. Due to the small size, high integration and self-luminescence of micro-LED chips, micro-LED has greater advantages than LCD and OLED in terms of brightness, resolution, contrast, energy consumption, service life, response speed and thermal stability. Early LED display pixels were made of LEDs with three primary colors of red, green and blue (R/G/B).

In the existing micro-LED pixel driving circuit, as shown in FIG. 1 and FIG. 2, it includes a logic operation module (Logic) and a pixel driving module (in the dotted box on the right). The logic operation module and the pixel driving module are electrically connected. The logic operation module receives in parallel the image n-bit data signal D, the timing control signal SF for image timing control, and the WL signal for converting the n-bit data signal D into a data signal DL operable by the logic device. The logic operation module outputs an n-bit Y signal (refer to Y0~Y3 in FIG. 2). Furthermore, the Y0~Y3 signals are subjected to a logic judgment of a non-OR gate to generate a control signal for driving the micro-LED pixel to emit light, and the pixel driving module drives the micro-LED pixel to emit light through the control signal.

However, in the existing technical solution, each pixel has n-1 image n bit data signals D and timing control signals SF input. As shown in Figure 2, the number of data lines and control lines in the display increases with the increase of n, and the timing control signal is only a duty cycle signal used to control the brightness and grayscale of the micro-LED. Therefore, when designing the electrical layout, it will lead to a series of problems such as wiring difficulties, large number of wirings, large pixel area, and mutual interference between lines. Therefore, it is necessary to consider new control methods to improve the problems of the existing technology.

Summary of the invention

In view of this, an object of the present invention is to provide a micro-LED pixel driving circuit, method and system, which can overcome the defects of the prior art, reduce the setting of data lines and control lines, better avoid interference between lines, effectively improve transmission quality and processing efficiency, and reduce pixel area.

To achieve the above object, the present invention discloses a micro-LED pixel driving circuit, which is characterized by comprising:

a sequential storage unit, for receiving a plurality of pixel data signals, an input control signal and a plurality of timing control signals, wherein the plurality of timing control signals are arranged in sequence in a timing sequence, and the plurality of pixel data signals correspond to the plurality of timing control signals respectively, the sequential storage unit receives the plurality of pixel data signals according to the input control signal, and generates an image control signal according to the plurality of pixel data signals and the plurality of timing control signals;

a NOT gate logic operator, electrically connected to the sequential storage unit, for receiving the image control signal and operating the image control signal with NOT gate logic to generate a driving signal; and

A pixel driving unit is electrically connected to the NOT gate logic operator and includes a micro-LED pixel. The pixel driving unit is used to receive the driving signal and drive the micro-LED pixel to emit light according to the driving signal.

Wherein, the sequential storage unit is a FIFO memory.

Wherein, the sequential storage unit further includes a shift register and an OR gate logic operator, the output end of the OR gate logic operator is connected to the shift register, and the shift register is connected to the NOT gate logic operator, the OR gate logic operator is used to receive the input control signal and the multiple timing control signals and perform an OR gate logic operation to generate an output control signal, and the shift register is used to generate the image control signal according to the multiple pixel data signals and the output control signal.

The pixel driving unit further includes a current source and a switch tube, the source of the switch tube is connected to the current source, the gate of the switch tube is connected to the NOT gate logic operator to receive the driving signal, and the drain of the switch tube is connected to the micro-LED pixel.

A driving method of a micro-LED pixel is also disclosed, which is characterized by comprising the following steps:

A sequential storage unit receives a plurality of pixel data signals according to an input control signal, and generates an image control signal according to the plurality of pixel data signals and a plurality of timing control signals, wherein the plurality of timing control signals are sequentially arranged in a timing sequence, and the plurality of pixel data signals correspond to the plurality of timing control signals respectively;

A NOT gate logic operator operates the image control signal with NOT gate logic to generate a driving signal; and

A pixel driving unit receives the driving signal and drives a micro-LED pixel to emit light according to the driving signal.

Wherein, the sequential storage unit is a FIFO memory.

The sequential storage unit further comprises a shift register and an OR gate logic operator, and in the step of receiving the plurality of pixel data signals according to the input control signal and generating the image control signal according to the plurality of pixel data signals and the plurality of timing control signals, the following steps are further performed:

The OR logic operator performs an OR logic operation on the input control signal and the plurality of timing control signals to generate an output control signal; and

The shift register generates the image control signal according to the plurality of pixel data signals and the output control signal.

A micro-LED pixel driving system is also disclosed, which is characterized by comprising:

A display comprising a plurality of micro-LED pixels arranged in a matrix;

a register for storing a plurality of pixel data signals, an input control signal, and a plurality of timing control signals of each of the plurality of micro-LED pixels, wherein the plurality of timing control signals of each of the micro-LED pixels are sequentially arranged in a timing sequence, and the plurality of pixel data signals correspond to the plurality of timing control signals respectively; and

A timing controller is electrically connected to the display and the buffer. The timing controller receives the plurality of pixel data signals, the input control signal and the plurality of timing control signals of the plurality of micro-LED pixels from the buffer respectively. The timing controller generates a plurality of image control signals corresponding to the plurality of micro-LED pixels according to the plurality of pixel data signals, the input control signal and the plurality of timing control signals respectively, and operates the plurality of image control signals by NOT gate logic to generate a plurality of driving signals corresponding to the plurality of micro-LED pixels, and then outputs the plurality of driving signals to the display to drive the plurality of micro-LED pixels to emit light.

Wherein, the timing controller is a FIFO memory.

The timing controller further includes a shift register and an OR gate logic operator, wherein the OR gate logic operator is used to respectively receive the input control signals and the multiple timing control signals of the multiple micro-LED pixels and perform OR gate logic operations to generate multiple output control signals corresponding to the multiple micro-LED pixels, and the shift register generates the multiple image control signals according to the multiple pixel data signals and the multiple output control signals.

In summary, the micro-LED pixel driving circuit, method and system of the present invention sequentially writes image data in a single line through serial input to reduce the complicated data lines and control lines in the circuit, thereby avoiding interference between lines, thereby improving transmission quality and processing efficiency. In addition, when processing more bits of image data, the micro-LED pixel driving circuit of the present invention can still be a single-line input, so when designing the electrical layout, the number of wiring will not increase as the number of bits increases, thereby reducing the pixel area.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram showing the structure of a driving circuit of a micro-LED pixel in the prior art.

FIG. 2 shows a logic circuit diagram of a prior art micro-LED pixel driving circuit.

FIG. 3 shows a schematic structural diagram of a driving circuit for a micro-LED pixel according to a specific embodiment of the present invention.

FIG. 4 shows a timing diagram of writing a pixel data signal according to an input control signal.

FIG. 5 shows a timing diagram of outputting an image control signal according to a timing control signal.

FIG6 shows a schematic structural diagram of a driving circuit for a micro-LED pixel according to another specific embodiment of the present invention.

FIG. 7 is a flowchart showing a method for driving a micro-LED pixel according to an embodiment of the present invention.

FIG. 8 is a flowchart showing a method for driving a micro-LED pixel according to another embodiment of the present invention.

FIG. 9 shows a schematic structural diagram of a driving system for a micro-LED pixel according to another specific embodiment of the present invention.

Detailed ways

In order to make the advantages, spirit and features of the present invention easier and clearer to understand, the following will be described and discussed in detail with reference to the accompanying drawings and embodiments. It is worth noting that these embodiments are only representative embodiments of the present invention, and the specific methods, devices, conditions, materials, etc. exemplified therein are not intended to limit the present invention or the corresponding embodiments.

The terms used in the various embodiments disclosed in the present invention are only used for the purpose of describing specific embodiments, and are not intended to limit the various embodiments disclosed in the present invention. The singular form used in the specification also includes the plural form, unless the context clearly indicates otherwise. Unless otherwise specified, all terms (including technical terms and scientific terms) used in this specification have the same meanings as those generally understood by ordinary technicians in the field to which the various embodiments disclosed in the present invention belong. The above terms (such as terms defined in generally used dictionaries) will be interpreted as having the same meaning as the contextual meaning in the same technical field, and will not be interpreted as having an idealized meaning or an overly formal meaning unless the term is clearly defined in the various embodiments disclosed in the present invention.

Please refer to FIG. 3, FIG. 4 and FIG. 5. FIG. 3 shows a schematic diagram of the structure of a micro-LED pixel driving circuit C according to a specific embodiment of the present invention. FIG. 4 shows a timing diagram of writing a pixel data signal D according to an input control signal WL. FIG. 5 shows a timing diagram of outputting an image control signal according to a timing control signal SF. As shown in FIG. 3, the micro-LED pixel driving circuit C includes a sequential storage unit 1, a NOT gate logic operator 2 and a pixel driving unit 3. The sequential storage unit 1 is electrically connected to the NOT gate logic operator 2, and the NOT gate logic operator 2 is electrically connected to the pixel driving unit 3. The sequential storage unit 1 is used to receive and generate an image control signal according to a plurality of pixel data signals D, an input control signal WL and a plurality of timing control signals SF. The NOT gate logic operator 2 receives and generates a driving signal according to the image control signal generated by the sequential storage unit 1. The pixel driving unit 3 includes a micro-LED pixel 3-3 and is used to drive the micro-LED pixel 3-3 to emit light according to the driving signal generated by the NOT gate logic operator 2.

In this specific embodiment, the sequential storage unit 1 receives a plurality of pixel data signals D according to an input control signal WL, a plurality of timing control signals SF are arranged in sequence in a timing sequence, and the pixel data signals D correspond to the timing control signals SF respectively. In practice, the pixel data signal D may be an external image n bit data signal, and the input control signal WL may be a control signal for controlling the writing of the pixel data signal D. For example, the input control signal WL may be a square wave and may correspond to the pixel data signal D. The timing control signal SF may include a control signal for controlling the brightness and grayscale of the micro-LED pixel 3-3 in a time proportion manner, and may also be arranged in sequence according to the order in which the pixel data signal D is input. For example, when the image is a 4-bit data signal, the sequential storage unit 1 may receive 4 pixel data signals D in series and sequence, and the received 4 timing control signals SF may correspond to the 4 pixel data signals D and be arranged in series and sequence. Each timing control signal SF may correspond to controlling the brightness and grayscale of each bit of the pixel data signal D.

In this specific embodiment, the sequential storage unit 1 can not only satisfy the function of writing and storing external image data, but also satisfy the processing function of being able to receive the timing control signal. In practice, the sequential storage unit 1 can be a FIFO memory 1a (First Input First Output memory). As shown in Figures 4 and 5, when the FIFO memory 1a receives a 4-bit pixel data signal D, an input control signal WL, and a timing control signal SF, the FIFO memory 1a can write and store the pixel data signal D (B0-B3) and store the timing control signal SF according to the rising edge signal in the input control signal WL. Taking Figure 5 as an example, Clock is a periodic signal and each period is t0. The timing control signals SF (SF0-SF3) are signals of t0, 2*t0, 4*t0, and 8*t0, respectively. Then, the FIFO memory 1a generates an image control signal DCT according to the pixel data signal D and the corresponding timing control signal SF (SF0-SF3), and the image control signal can include a 4-bit image control signal. Please note that the numbers and periods of the aforementioned pixel data signal D, input control signal WL and timing control signal SF are not limited to those shown in the figure, and can be determined according to image requirements.

In this specific embodiment, after the sequential storage unit 1 outputs the image control signal DCT, the image control signal DCT can be used as the input end of the NOT gate logic operator 2, and the NOT gate logic operator 2 inverts the image control signal DCT through the NOT gate logic to generate a driving signal. Similarly, the driving signal can also include a 4-bit driving signal.

In this specific embodiment, the pixel driving unit 3 further includes a current source 3-1 and a switch tube 3-2, and the switch tube 3-2 can be a field effect transistor (PMOS). Further, the switch tube 3-2 includes a source, a gate and a drain. The source of the switch tube 3-2 is connected to the current source 3-1, the gate of the switch tube 3-2 is connected to the NOT gate logic operator 2, the drain of the switch tube 3-2 is connected to the positive electrode of the micro-LED pixel 3-3, and the negative electrode of the micro-LED pixel 3-3 is grounded. In practice, after the NOT gate logic operator 2 outputs the driving signal, the gate of the switch tube 3-2 can receive the driving signal, and the switch tube 3-2 can sequentially drive the micro-LED pixel 3-3 to emit light according to the 4-bit driving signal, thereby causing the micro-LED pixel 3-3 to emit an image of a 4-bit data signal.

In practical applications, when the micro-LED pixel driving circuit C of the present invention processes an n-bit image and receives n pixel data signals D, multiple timing control signals SF, and input control signals WL, the sequential storage unit 1 sequentially writes and stores the pixel data signals D and multiple timing control signals SF in a serial input manner, and then analyzes and generates n image control signals DCT. Then, the NOT gate logic operator 2 converts the n image control signals DCT into n driving signals through the NOT gate logic. Finally, the pixel driving unit 3 drives the micro-LED pixel 3-3 to emit light according to the n driving signals. Therefore, the micro-LED pixel driving circuit of the present invention sequentially writes the image data in a single line in a serial input manner to reduce the complicated data lines and control lines in the circuit, thereby avoiding interference between lines, and thus improving the transmission quality and processing efficiency. In addition, when processing more bits of image data, the micro-LED pixel driving circuit of the present invention can still be a single-line input. Therefore, when designing the electrical layout, the number of wiring will not increase with the increase in the number of bits, thereby reducing the pixel area.

In addition to the aforementioned specific embodiments, the sequential storage unit of the micro-LED pixel driving circuit of the present invention may also be in other forms. Please refer to FIG6. FIG6 shows a schematic diagram of the structure of the micro-LED pixel driving circuit C' according to another specific embodiment of the present invention. As shown in FIG6, the difference between this specific embodiment and the aforementioned specific embodiment is that the sequential storage unit 1' of this specific embodiment includes a shift register 1b and an OR gate logic operator 1c. The OR gate logic operator 1c is connected to the shift register 1b, and the shift register 1b is connected to the NOT gate logic operator 2'. In practice, when the sequential storage unit 1' receives the pixel data signal D, the input control signal WL and the timing control signal SF, the OR gate logic operator 1c receives the input control signal WL and the timing control signal SF, and the shift register 1b receives the pixel data signal D. Further, the OR gate logic operator 1c first analyzes the input control signal WL and the timing control signal SF in an OR gate logic manner to generate an output control signal. Then, the shift register 1b analyzes the output control signal and the pixel data signal D to generate an image control signal. The function of the pixel driving unit 3' is substantially the same as that of the pixel driving unit in the aforementioned specific embodiment, and will not be described in detail here.

Please refer to FIG7. FIG7 shows a flowchart of the steps of a driving method of a micro-LED pixel according to a specific embodiment of the present invention. The driving method of the micro-LED pixel of FIG7 can be achieved by the driving circuit C of the micro-LED pixel of FIG3. As shown in FIG7, the driving method of the micro-LED pixel may include the following steps: Step S11: The FIFO memory 1a receives a plurality of pixel data signals D according to an input control signal WL, and generates an image control signal according to the plurality of pixel data signals D and a plurality of timing control signals SF, wherein the timing control signals SF are arranged in sequence in a timing sequence, and the pixel data signals correspond to the timing control signals respectively; Step S12: The NOT gate logic operator 2 operates the image control signal with NOT gate logic to generate a driving signal; and Step S13: The pixel driving unit 3 receives the driving signal and drives the micro-LED pixel 3-3 to emit light according to the driving signal.

Please refer to FIG8. FIG8 shows a flowchart of the steps of a driving method of a micro-LED pixel according to another specific embodiment of the present invention. The driving method of the micro-LED pixel of FIG8 can be achieved by the driving circuit C' of the micro-LED pixel of FIG6. As shown in FIG8, the driving method of the micro-LED pixel may include the following steps: Step S211: The OR logic operator 1c performs an OR logic operation on the input control signal WL and multiple timing control signals SF to generate an output control signal; Step S212: The shift register 1b generates an image control signal according to multiple pixel data signals D and the output control signal; Step S22: The NOT logic operator 2' performs an operation on the image control signal with NOT logic to generate a driving signal; and Step S23: The pixel driving unit 3' receives the driving signal and drives the micro-LED pixel 3-3 to emit light according to the driving signal.

Please refer to FIG9 . FIG9 shows a schematic diagram of the structure of a driving system S for a micro-LED pixel according to another specific embodiment of the present invention. As shown in FIG9 , the driving system S for a micro-LED pixel includes a display 01, a buffer 02, and a timing controller 03, and the display 01, the buffer 02, and the timing controller 03 are electrically connected to each other. The display 01 includes a plurality of micro-LED pixels arranged in a matrix. The buffer 02 is used to store a plurality of pixel data signals, an input control signal, and a plurality of timing control signals for each of the plurality of micro-LED pixels. Among them, the plurality of timing control signals for each micro-LED pixel are arranged in sequence in a timing sequence, and the pixel data signals correspond to the timing control signals respectively. The timing controller 03 receives a plurality of pixel data signals, an input control signal, and a plurality of timing control signals for the plurality of micro-LED pixels from the buffer 02 respectively. The timing controller 03 generates a plurality of image control signals corresponding to the plurality of micro-LED pixels according to the plurality of pixel data signals, the input control signal and the plurality of timing control signals, and operates the plurality of image control signals by means of NOT gate logic to generate a plurality of driving signals corresponding to the plurality of micro-LED pixels, and then outputs the plurality of driving signals to the display 01 to drive the plurality of micro-LED pixels to emit light.

In practice, the buffer 02 may be a memory, and the timing controller 03 may be an integrated control chip and may be a FIFO memory. The timing controller 03 may receive pixel data signals, input control signals, and timing control signals of corresponding micro-LED pixels from the buffer 02 according to the micro-LED pixels to be emitted. Then, the timing controller 03 transmits the generated driving signals of the micro-LED pixels to the corresponding micro-LED pixels in the display 01 and drives the micro-LED pixels to emit light, thereby causing the display 01 to present an image.

The timing controller 03 may also include a shift register and an OR gate logic operator. When the buffer 02 of the micro-LED pixel driving system S receives and stores image data, the OR gate logic operator may receive the input control signal and multiple timing control signals respectively and perform an OR gate logic operation to generate multiple output control signals corresponding to multiple micro-LED pixels. The shift register may generate multiple image control signals for multiple micro-LED pixels according to the multiple output control signals of the multiple micro-LED pixels and the multiple pixel data signals.

In a specific embodiment, the buffer may be a frame buffer memory (Frame Buffer), and the timing controller may be a control board (TCON). In practice, the frame buffer memory may include multiple storage spaces, and the multiple storage spaces correspond to multiple micro-LED pixels of the display. When the buffer receives image data, the buffer may store the pixel data signal, input control signal and timing control signal of each micro-LED pixel in the image data in the storage space corresponding to the micro-LED pixel. Furthermore, the timing controller may receive the pixel data signal, input control signal and timing control signal of the corresponding micro-LED pixel from the corresponding storage space according to the micro-LED pixel to be emitted. Then, the timing controller transmits the generated drive signal of the micro-LED pixel to the corresponding micro-LED pixel in the display and drives the micro-LED pixel to emit light, so that the display presents an image.

In summary, the micro-LED pixel driving circuit of the present invention writes image data in a single row in sequence through serial input, so as to reduce the complicated data lines and control lines in the circuit, thereby avoiding interference between lines, and thus improving transmission quality and processing efficiency. In addition, when processing image data with more bits, the micro-LED pixel driving circuit of the present invention can still be a single-row input, so when designing the electrical layout, the number of wiring will not increase with the increase in the number of bits, thereby reducing the pixel area.

The above detailed description of the preferred specific embodiments is intended to more clearly describe the features and spirit of the present invention, rather than to limit the scope of the present invention by the preferred specific embodiments disclosed above. On the contrary, the purpose is to cover various changes and arrangements with equivalents within the scope of the patent scope to be applied for by the present invention. Although the present invention has been disclosed as above in the form of an implementation method, it is not intended to limit the present invention. Anyone skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope of the attached patent application.

Claims (10)

A micro-LED pixel driving circuit, characterized by comprising: a sequential storage unit, for receiving a plurality of pixel data signals, an input control signal and a plurality of timing control signals, wherein the plurality of timing control signals are arranged in sequence in a timing sequence, and the plurality of pixel data signals correspond to the plurality of timing control signals respectively, the sequential storage unit receives the plurality of pixel data signals according to the input control signal, and generates an image control signal according to the plurality of pixel data signals and the plurality of timing control signals; a NOT gate logic operator, electrically connected to the sequential storage unit, for receiving the image control signal and operating the image control signal with NOT gate logic to generate a driving signal; and A pixel driving unit is electrically connected to the NOT gate logic operator and includes a micro-LED pixel. The pixel driving unit is used to receive the driving signal and drive the micro-LED pixel to emit light according to the driving signal. The micro-LED pixel driving circuit according to claim 1, wherein the sequential storage unit is a FIFO memory. The micro-LED pixel driving circuit as claimed in claim 1 is characterized in that the sequential storage unit further includes a shift register and an OR gate logic operator, the output end of the OR gate logic operator is connected to the shift register, and the shift register is connected to the NOT gate logic operator, the OR gate logic operator is used to receive the input control signal and the multiple timing control signals and perform an OR gate logic operation to generate an output control signal, and the shift register is used to generate the image control signal according to the multiple pixel data signals and the output control signal. The micro-LED pixel driving circuit as described in claim 1 is characterized in that the pixel driving unit further includes a current source and a switch tube, the source of the switch tube is connected to the current source, the gate of the switch tube is connected to the NOT gate logic operator to receive the driving signal, and the drain of the switch tube is connected to the micro-LED pixel. A method for driving a micro-LED pixel, characterized by comprising the following steps: A sequential storage unit receives a plurality of pixel data signals according to an input control signal, and generates an image control signal according to the plurality of pixel data signals and a plurality of timing control signals, wherein the plurality of timing control signals are sequentially arranged in a timing sequence, and the plurality of pixel data signals correspond to the plurality of timing control signals respectively; A NOT gate logic operator operates the image control signal with NOT gate logic to generate a driving signal; and A pixel driving unit receives the driving signal and drives a micro-LED pixel to emit light according to the driving signal. The micro-LED pixel driving method according to claim 5, wherein the sequential storage unit is a FIFO memory. The micro-LED pixel driving method of claim 5, wherein the sequential storage unit further comprises a shift register and an OR gate logic operator, and in the step of the sequential storage unit receiving the plurality of pixel data signals according to the input control signal and generating the image control signal according to the plurality of pixel data signals and the plurality of timing control signals, the following steps are further performed: The OR logic operator performs an OR logic operation on the input control signal and the plurality of timing control signals to generate an output control signal; and The shift register generates the image control signal according to the plurality of pixel data signals and the output control signal. A micro-LED pixel driving system, characterized by comprising: A display comprising a plurality of micro-LED pixels arranged in a matrix; a register for storing a plurality of pixel data signals, an input control signal, and a plurality of timing control signals of each of the plurality of micro-LED pixels, wherein the plurality of timing control signals of each of the micro-LED pixels are sequentially arranged in a timing sequence, and the plurality of pixel data signals correspond to the plurality of timing control signals respectively; and A timing controller is electrically connected to the display and the buffer. The timing controller receives the plurality of pixel data signals, the input control signal and the plurality of timing control signals of the plurality of micro-LED pixels from the buffer respectively. The timing controller generates a plurality of image control signals corresponding to the plurality of micro-LED pixels according to the plurality of pixel data signals, the input control signal and the plurality of timing control signals respectively, and operates the plurality of image control signals by NOT gate logic to generate a plurality of driving signals corresponding to the plurality of micro-LED pixels, and then outputs the plurality of driving signals to the display to drive the plurality of micro-LED pixels to emit light. The micro-LED pixel driving system as claimed in claim 8, characterized in that the timing controller is a FIFO memory. The micro-LED pixel driving system as described in claim 8 is characterized in that the timing controller further includes a shift register and an OR gate logic operator, the OR gate logic operator is used to respectively receive the input control signals and the multiple timing control signals of the multiple micro-LED pixels and perform OR gate logic operations to generate multiple output control signals corresponding to the multiple micro-LED pixels, and the shift register generates the multiple image control signals according to the multiple pixel data signals and the multiple output control signals.

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