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WO2020248466A1 - Back hole lead type pressure sensor and manufacturing method therefor - Google Patents

Back hole lead type pressure sensor and manufacturing method therefor Download PDF

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Publication number
WO2020248466A1
WO2020248466A1 PCT/CN2019/112934 CN2019112934W WO2020248466A1 WO 2020248466 A1 WO2020248466 A1 WO 2020248466A1 CN 2019112934 W CN2019112934 W CN 2019112934W WO 2020248466 A1 WO2020248466 A1 WO 2020248466A1
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WO
WIPO (PCT)
Prior art keywords
electrode
layer
pressure sensor
conductive
supporting substrate
Prior art date
Application number
PCT/CN2019/112934
Other languages
French (fr)
Chinese (zh)
Inventor
李刚
刘迪
胡维
吕萍
Original Assignee
苏州敏芯微电子技术股份有限公司
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Publication of WO2020248466A1 publication Critical patent/WO2020248466A1/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032Packages or encapsulation
    • B81B7/007Interconnections between the MEMS and external electrical signals
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00301Connecting electric signal lines from the MEMS device with external electrical signal lines, e.g. through vias
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L1/00Measuring force or stress, in general
    • G01L1/16Measuring force or stress, in general using properties of piezoelectric devices
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01LMEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
    • G01L9/00Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means
    • G01L9/02Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in ohmic resistance, e.g. of potentiometers, electric circuits therefor, e.g. bridges, amplifiers or signal conditioning
    • G01L9/06Measuring steady of quasi-steady pressure of fluid or fluent solid material by electric or magnetic pressure-sensitive elements; Transmitting or indicating the displacement of mechanical pressure-sensitive elements, used to measure the steady or quasi-steady pressure of a fluid or fluent solid material, by electric or magnetic means by making use of variations in ohmic resistance, e.g. of potentiometers, electric circuits therefor, e.g. bridges, amplifiers or signal conditioning of piezo-resistive devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00Specific applications of microelectromechanical systems
    • B81B2201/02Sensors
    • B81B2201/0264Pressure sensors

Definitions

  • the invention relates to the field of microelectronic mechanical systems and pressure sensors, in particular to a back hole lead type pressure sensor and a preparation method thereof.
  • Pressure sensors can be divided into piezoresistive, capacitive, piezoelectric, etc.
  • piezoresistive pressure sensors are used in aviation, marine, petrochemical, power machinery, etc. due to their small size, high sensitivity, and good linearity. Biomedical engineering, meteorology, geology, seismic surveying and other fields.
  • the common manufacturing method of piezoresistive pressure sensor is to make piezoresistance and electrodes on the upper surface of the sensitive film.
  • one of the packaging methods is to sense the pressure on the front surface of the sensitive film.
  • the electrode of the sensor chip and the electrode of the supporting structure (tube case) are connected together through a metal cord.
  • This packaging requires a metal cord and a cover.
  • the measurement medium is isolated, which leads to a large package.
  • the other kind of package is pressure sensitive on the back side and does not need to be isolated from the measured medium.
  • the piezoresistance, electrode and metal cord of the sensor are all exposed to the external environment.
  • the metal cord is easy to break under strong vibration conditions.
  • the device is not resistant to corrosion and has poor stability.
  • There is also a packaging method using TSV technology that is, filling the through holes with metal to lead, which usually leads to poor temperature characteristics of the sensor.
  • the technical problem to be solved by the present invention is to provide a back hole lead type pressure sensor and a preparation method thereof, which can realize non-wired patch packaging, reduce the packaging size of the pressure sensor, and have good device stability and can be used for Pressure monitoring in liquids or harsh environments.
  • the present invention provides a method for manufacturing a back-hole lead pressure sensor, which includes the following steps: providing a device substrate, the first surface of which is provided with multiple piezoresistors and multiple A conductive pad, the conductive pad is electrically connected to the piezoresistance; a supporting substrate is provided, the supporting substrate has a first surface and a second surface opposed to each other, and the first surface of the supporting substrate has a concave A groove, a plurality of through holes penetrating the supporting substrate from the first surface to the second surface; taking the first surface of the device substrate and the first surface of the supporting substrate as bonding surfaces, The device substrate is bonded to the support substrate, the groove and the first surface of the device substrate form a sealed cavity, the piezoresistance corresponds to the sealed cavity, and the through hole is Corresponding to the conductive pad, the through hole exposes the conductive pad; a plurality of electrodes are formed on the second surface of the supporting substrate, and the electrodes extend along the sidewall of the through
  • the preparation method further includes the following step: forming an insulating layer covering the first surface of the supporting substrate, the second surface of the supporting substrate, and The inner surface of the groove and the side wall of the through hole; in the bonding step, the upper surface of the insulating layer and the first surface of the device substrate are used as bonding surfaces to connect the device substrate and The supporting substrate is bonded.
  • the method for forming a plurality of the electrodes on the second surface of the supporting substrate includes the following steps: forming an electrode layer on the second surface of the supporting substrate, the electrode layer covering the supporting liner The second surface of the bottom, the sidewalls of the through hole, and the conductive pad; the electrode layer is patterned to form a plurality of the electrodes.
  • the method of forming a plurality of the electrodes on the second surface of the supporting substrate includes the following steps: before the bonding step, an electrode layer is formed, and the electrode layer covers the second surface of the supporting substrate. Surface and the sidewall of the through hole; after the bonding step, pattern the electrode layer to form a plurality of initial electrodes; form a conductive transition layer on the surface of the conductive pad, and the conductive transition layer will The conductive pad is electrically connected to the initial electrode, and the initial electrode and the conductive transition layer form the electrode.
  • the preparation method further includes the following step: forming a solder resist layer that covers the electrode and exposes the solder that needs to be electrically connected to the external structure. point.
  • the solder resist layer fills the through hole, or the solder resist layer extends along the surface of the electrode.
  • the preparation method further includes the following step: forming a conductive bump at the solder joint of the electrode, and the conductive bump is used to connect the electrode with The external structure is electrically connected.
  • the present invention also provides a back-hole lead pressure sensor prepared by the above-mentioned preparation method, which comprises: a device layer in which a plurality of piezoresistors and a plurality of conductive pads are arranged, and the conductive pad is The piezoresistive electrical connection; a support layer bonded to the device layer, the support layer has a groove and a plurality of through holes penetrating the support layer, the groove and the device layer form a seal Cavity, the piezoresistance is arranged corresponding to the sealed cavity, the conductive pad is arranged corresponding to the through hole; a plurality of electrodes are arranged on the unbonded surface of the support layer, and the electrodes are along the side of the through hole The wall extends and is electrically connected to the conductive pad.
  • the back hole lead type pressure sensor further includes an insulating layer disposed between the electrode and the supporting layer.
  • the back-hole lead type pressure sensor further includes a conductive transition layer disposed on the surface of the conductive pad, and the electrode is electrically connected to the conductive pad through the conductive transition layer.
  • the back hole lead type pressure sensor further includes a solder resist layer covering the electrode and exposing the solder joints where the electrode needs to be electrically connected to an external structure.
  • the solder resist layer fills the through hole, or the solder resist layer extends along the surface of the electrode.
  • the back hole lead type pressure sensor further includes a plurality of conductive bumps, and the conductive bumps are arranged on the electrodes for electrically connecting the electrodes with an external structure.
  • the advantage of the present invention is that the pressure sensor is prepared by using the through-hole lead technology to realize the non-wired patch package and reduce the package size of the pressure sensor; at the same time, the piezoresistance of the pressure sensor is located in the sealed cavity, and the conductive pad is also connected to the pressure sensor through the through hole.
  • the external structure is electrically connected, less affected by the external environment, and the device has good stability, which can be used for pressure monitoring in liquids or harsh environments.
  • FIG. 1 is a schematic diagram of the steps of the first specific embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention
  • FIGS. 2A to 2H are process flow diagrams of the first specific embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention.
  • 3A to 3D are process flow diagrams of forming a device substrate in the first specific embodiment
  • FIG. 4 is a process flow chart of forming a solder resist layer in the second specific embodiment of the method for manufacturing a back hole lead pressure sensor of the present invention
  • 5A to 5D are process flow diagrams of forming electrodes in the third embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention.
  • Fig. 6 is a schematic structural diagram of a first specific embodiment of a back hole lead type pressure sensor
  • FIG. 7 is a schematic structural diagram of a second specific embodiment of a back hole lead type pressure sensor
  • FIG. 8 is a schematic structural diagram of a third embodiment of a back hole lead type pressure sensor.
  • FIG. 1 is a schematic diagram of the steps of the first specific embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention.
  • the preparation method includes the following steps: step S10, a device substrate is provided, a first surface of the device substrate is provided with a plurality of piezoresistors and a plurality of conductive pads, the conductive pad and the Piezoresistive electrical connection; step S11, a supporting substrate is provided, the supporting substrate has a first surface and a second surface oppositely arranged, the first surface of the supporting substrate has a groove, and a plurality of through holes The first surface to the second surface penetrate the supporting substrate; step S12, using the first surface of the device substrate and the first surface of the supporting substrate as bonding surfaces, the device The substrate is bonded to the supporting substrate, the groove and the first surface of the device substrate form a sealed cavity, the piezoresistance corresponds to the sealed cavity, and the through hole is connected to the conductive pad Correspondingly, the conductive pad is exposed by the through
  • FIGS 2A to 2H are process flow diagrams of the first specific embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention.
  • a device substrate 200 is provided.
  • a first surface 200A of the device substrate 200 is provided with a plurality of piezoresistors 201 and a plurality of conductive pads 202.
  • the conductive pads 202 and the piezoresistors 201 electrical connection.
  • the method of forming the device substrate 200 includes the following steps:
  • a first substrate 300 is provided.
  • the first substrate 300 has a first surface 300A, and a first insulating layer 301 covers the first surface 300A of the first substrate 300.
  • the first substrate 300 includes but is not limited to single crystal silicon or SOI wafer. If the first substrate 300 is an SOI silicon wafer, the upper silicon thickness of the SOI wafer needs to meet the thickness requirement of the sensitive film.
  • the first insulating layer 301 can be formed by a thermal oxidation process, which can reduce the channel effect of ion implantation in the subsequent process of forming piezoresistance.
  • a plurality of piezoresistors 201 and a plurality of concentrated boron wires 302 electrically connected to the piezoresistors 201 are formed on the first surface 300A of the first substrate 300, wherein the piezoresistors 201 are Light boron piezoresistance.
  • the light boron piezoresistor 302 and the concentrated boron wire 302 can be fabricated by photolithography and ion implantation.
  • the piezoresistor 201 is a strained piezoresistance formed by light boron diffusion
  • the concentrated boron wire 302 is a concentrated boron ohmic contact area formed by injecting concentrated boron.
  • piezoresistors 201 are connected by a concentrated boron wire 302 to form a Wheatstone bridge. In other specific embodiments of the present invention, eight piezoresistors 201 may also be used.
  • the first insulating layer 301 is patterned to form a plurality of openings 301A on the first insulating layer 301, and the openings 301A expose the surface of the concentrated boron wire 302.
  • the opening 301A can be formed by photolithography and etching processes.
  • a plurality of conductive pads 202 are formed at the opening 301A, and the conductive pads 202 are electrically connected to the concentrated boron wire 302, thereby forming the device substrate 200.
  • the conductive pad 202 is a metal, which can be made by sputtering or deposition, photolithography and etching, wet etching or dry etching.
  • the conductive pad 202 may also be polysilicon, which may be formed by a doping process.
  • a passivation layer (not shown in the drawings) may be further formed, and the conductive pad is exposed to the passivation layer.
  • a passivation layer can be deposited first, and then the conductive pad is exposed by photolithography and etching processes.
  • the passivation layer can be used to protect the conductive pad 202 and the passivation layer can be used as a bonding layer for subsequent bonding.
  • the passivation layer is not formed.
  • a supporting substrate 210 is provided, and the supporting substrate 210 has a first surface 210A and a second surface 210B opposite to each other.
  • the supporting substrate 210 includes, but is not limited to, a silicon substrate, a glass substrate, and the like.
  • the support substrate 210 is a silicon wafer with a thickness of 400 microns. In other embodiments of the present invention, the thickness of the support substrate 210 may not be limited to 400 microns.
  • the first surface 210A of the supporting substrate 210 has a groove 211.
  • the groove 211 can be formed on the first surface 210A of the supporting substrate 210 by using photolithography and etching processes. It can be understood that the groove 211 does not penetrate the supporting substrate 210.
  • the shape of the groove 211 includes, but is not limited to, a rectangle, a circle, or a polygon.
  • a plurality of through holes 212 penetrate the supporting substrate 210 from the first surface 210A to the second surface 210B.
  • the second surface 210B of the support substrate 210 may be subjected to photolithography and etching processes to form the through hole 212.
  • the through hole 212 is located outside the groove 211, that is, a plurality of the through holes 212 are arranged around the groove 211.
  • the number of the through holes 212 may correspond to the number of the conductive pads 202.
  • the shape of the through hole 212 includes, but is not limited to, a rectangle, a circle, or a polygon.
  • this specific embodiment further includes a step of forming a second insulating layer 213.
  • a second insulating layer 213 is formed.
  • the second insulating layer 213 covers the first surface 210A of the supporting substrate 210, the second surface 210B of the supporting substrate 210, and the groove 211 The inner surface and the side wall of the through hole 212.
  • the second insulating layer 213 may be formed by thermal oxidation or LPCVD process.
  • the function of the second insulating layer 213 is to insulate the supporting substrate 210 from subsequently formed electrodes.
  • the supporting substrate 210 is a non-insulating substrate, the second insulating layer needs to be formed; if the supporting substrate 210 is an insulating substrate, the second insulating layer may not be formed.
  • the supporting substrate 210 is a silicon substrate, and the second insulating layer 213 needs to be formed to insulate the electrode from the supporting substrate 210; in another aspect of the present invention
  • the supporting substrate is a glass substrate, and since the glass substrate itself has insulating properties, the second insulating layer may not be formed.
  • step S12 and FIG. 2D using the first surface 200A of the device substrate 200 and the first surface 210A of the supporting substrate 210 as bonding surfaces, the device substrate 200 and the supporting substrate 210 bonding.
  • the upper surface of the first insulating layer 301 and the upper surface of the second insulating layer 213 are used as bonding surfaces, and the device substrate 200 is bonded to the supporting substrate 210 .
  • the bonding process of the device substrate 200 and the supporting substrate 210 includes, but is not limited to, low-temperature Si-Si fusion bonding, high-temperature Si-Si fusion bonding, and Si-Glass anodic bonding.
  • the conductive pad 202 is metallic aluminum, and the bonding process of the device substrate 200 and the supporting substrate 210 is low-temperature Si-Si fusion bonding, and the bonding The temperature does not exceed the melting point of the conductive pad 202 at 660°C; in another specific embodiment of the present invention, the conductive pad 202 is polysilicon, and the bonding process of the device substrate 200 and the supporting substrate 210 is For high-temperature Si-Si fusion bonding, the bonding temperature does not exceed the melting point of the conductive pad 202 at 1410°C; in another specific embodiment of the present invention, the conductive pad 202 is polysilicon, and the supporting substrate 210 is glass Substrate, the bonding process of the device substrate 200 and the supporting substrate 210 is Si-Glass anode bonding.
  • the groove 211 and the first surface 200A of the device substrate 200 form a sealed cavity 220.
  • the groove 211 and the upper surface of the first insulating layer 301 form the sealed cavity 220.
  • the piezoresistor 201 corresponds to the sealed cavity 220, that is, the piezoresistor 201 is located within the projection range of the sealed cavity 220.
  • the through hole 212 corresponds to the conductive pad 202, and the through hole 212 exposes the conductive pad 202, that is, from the direction of the second surface 210B of the supporting substrate 210, the conductive pad 202 can be observed .
  • a step of aligning the device substrate 200 and the supporting substrate 210 is further included. The effect of this step is to ensure that the piezoresistance 201 corresponds to the sealed cavity 220 and the through hole 212 corresponds to the conductive pad 202.
  • a step of polishing the surface of the device substrate 200 is further included. In this specific embodiment, since the bonding surface of the device substrate 200 is the surface of the first insulating layer 301, before the bonding step, the first insulating layer 301 on the surface of the device substrate 200 is polished. To make its flatness meet the bonding requirements.
  • the device substrate 200 is applied to the device substrate 200 from a surface of the device substrate 200 opposite to the first surface 200A. Perform thinning and polishing. After the thinning and polishing process is completed, the thickness of the device substrate 200 can be reduced to several microns. If the device substrate 200 is a SOI substrate, it is first thinned, thinning to close when the intermediate SiO 2 layer SOI substrate, a wet etched SiO 2, to give the top layer Si film.
  • a plurality of electrodes 230 are formed on the second surface 210B of the supporting substrate 210, and the electrodes 230 extend along the sidewall of the through hole 212 and are electrically connected to the conductive pad 202.
  • the specific steps of forming the electrode 230 are: first, an electrode layer (not shown in the drawings) is formed on the second surface 210B of the supporting substrate 210, and the electrode layer covers the The second surface 210B of the supporting substrate 210, the sidewalls of the through holes 212, and the conductive pad 202; secondly, the electrode layer is patterned to form a plurality of the electrodes 230, wherein photolithography and etching can be used The electrode layer is patterned by processes such as etching to form the electrode 230.
  • the electrode 230 extends along the sidewall of the through hole 212 instead of filling the through hole 212. If the electrode 230 fills the through hole 212, the temperature characteristic of the sensor will deteriorate.
  • the second insulating layer 213 is provided between the electrode 230 and the supporting substrate 210.
  • the preparation method further includes the following steps: forming a solder resist layer 240, the solder resist layer 240 covering the electrode 230 and exposing the The electrode 230 needs a solder joint 230A that is electrically connected to the external structure.
  • the solder resist layer is an organic oligomer, which fills the through hole 212 to improve the performance of the sensor.
  • the solder resist layer 240 is made of inorganic materials such as silicon nitride, silicon oxide, silicon oxynitride, etc., which extends along the surface of the electrode 230, that is, the resist
  • the solder layer 240 covers the electrode 230 in the form of a film.
  • a conductive bump 250 is formed at the solder joint 230A of the electrode 230, and the conductive bump 250 is used to electrically connect the electrode 230 with an external structure.
  • ball reflow is performed on the solder joint 230A to form the conductive bump 250.
  • the conductive bump 250 may be electrically connected to an external printed circuit board and other structures.
  • the electrode 230 is formed after the bonding step
  • the step of forming the electrode includes a step performed before the bonding step and a step performed after the bonding step .
  • the specific instructions are as follows:
  • an electrode layer 500 is formed, and the electrode layer 500 covers the second surface 210B of the supporting substrate 210 and the sidewall of the through hole 212.
  • the material of the electrode layer 500 is polysilicon, which can be formed by an LPCVD process.
  • the electrode layer 500 also covers the first surface 210A of the supporting substrate 210 and the inner sidewall of the groove 211, so in this step, the supporting can be removed by an etching process.
  • the electrode layer 500 on the first surface 210A of the substrate 210 and the inner sidewall of the groove 211 remains, while the electrode layer 500 covering the second surface 210B of the supporting substrate 210 and the sidewall of the through hole 212 remains.
  • the upper surface of the first insulating layer 301 and the upper surface of the second insulating layer 213 are used as bonding surfaces to bond the device substrate 200 and the supporting substrate 210.
  • the bonding process is high-temperature Si-Si fusion bonding, and the temperature does not exceed the melting point of polysilicon, 1410°C.
  • the electrode layer 500 is patterned to form a plurality of initial electrodes 501.
  • a photolithography and etching process may be used to remove part of the electrode layer 500 on the first surface 210A of the supporting substrate 210 to form the initial electrode 501.
  • the initial electrode 501 covers the sidewall of the through hole 212 and a part of the second surface 210B of the supporting substrate 210.
  • a conductive transition layer 502 is formed on the surface of the conductive pad 202, that is, the conductive transition layer 502 is formed at the bottom of the through hole 212.
  • the material of the conductive transition layer 502 includes but is not limited to metal materials.
  • the conductive transition layer 502 electrically connects the conductive pad 202 and the initial electrode 501, that is, the initial electrode 501 and the conductive transition layer 502 together form an electrode 510. After the electrode 510 is formed, the subsequent steps are the same as those of the first specific embodiment, and will not be described again.
  • the materials of the conductive pad 202 and the initial electrode 502 are both polysilicon. If the two are only directly electrically connected, the electrical connection performance is not good and the contact is poor. However, in this embodiment Wherein, the conductive transition layer 502 forms an ohmic contact with the conductive pad 202 and the initial electrode 502, which can enhance the electrical connection performance between the conductive pad 202 and the initial electrode 502.
  • the invention also provides specific implementations of the back-hole lead type pressure sensor prepared by the above-mentioned preparation method.
  • Fig. 6 is a schematic structural diagram of a first specific embodiment of a back hole lead type pressure sensor.
  • the back hole lead type pressure sensor includes a device layer 600, a support layer 610 and a plurality of electrodes 620.
  • a plurality of piezoresistors 601 and a plurality of conductive pads 602 are provided in the device layer 600, and the conductive pads 602 are electrically connected to the piezoresistors 601.
  • the piezoresistor 601 is a light boron piezoresistor, and the light boron piezoresistor is electrically connected to the conductive pad 602 through a concentrated boron wire 603.
  • the device layer 600 includes a first substrate 604 and a first insulating layer 605 disposed on the first substrate 604, and the piezoresistor 601 is disposed in the first substrate 604.
  • the first insulating layer 605 has a plurality of openings (not shown in the drawings), and the conductive pad 602 is disposed in the opening, that is, the conductive pad 602 is exposed outside the first insulating layer 605.
  • the support layer 610 is bonded to the device layer 600.
  • the supporting layer 610 has a groove 611 and a plurality of through holes 612 passing through the supporting layer 610.
  • the groove 611 and the device layer 600 form a sealed cavity 630, and the piezoresistor 601 is disposed corresponding to the sealed cavity 630.
  • the conductive pad 602 is disposed corresponding to the through hole 612, that is, the through hole 612 exposes the conductive pad 602.
  • the electrode 620 is disposed on the unbonded surface of the supporting layer 610, and the electrode 620 extends along the sidewall of the through hole 612 and is electrically connected to the conductive pad 602.
  • the electrode 620 extends along the sidewall of the through hole 612 instead of filling the through hole 612. If the electrode 620 fills the through hole 612, the temperature characteristic of the back hole lead pressure sensor will be deteriorated.
  • the back hole lead type pressure sensor further includes a second insulating layer 640, and the second insulating layer 640 is disposed between the electrode 620 and the supporting layer 610. Further, the second insulating layer 640 is not only disposed between the electrode 620 and the support layer 610, it also covers the entire surface of the support layer 610, the inner side wall of the groove 611, and the through hole 612. The sidewall.
  • the back hole lead type pressure sensor further includes a solder resist layer 650 that covers the electrode 620 and exposes the solder joints 620A where the electrode 620 needs to be electrically connected to an external structure.
  • the solder resist layer 650 fills the through hole 612 to improve the performance of the sensor.
  • the solder resist layer 650 is made of inorganic materials such as silicon nitride, silicon oxide, silicon oxynitride, etc., which extends along the surface of the electrode 620, that is, the resist The solder layer 650 covers the electrode 620 in the form of a thin film.
  • the back-hole lead type pressure sensor further includes a plurality of conductive bumps 660, and the conductive bumps 660 are arranged on the solder joints 620A of the electrode 620 for connecting the electrode 620 is electrically connected to the external structure.
  • Fig. 8 is a schematic structural view of a third specific embodiment of the back hole lead type pressure sensor of the present invention.
  • the third embodiment is different from the first embodiment in that the back-hole lead type pressure sensor further includes a conductive transition layer 800.
  • the conductive transition layer 800 is disposed on the surface of the conductive pad 602, and the electrode 620 is electrically connected to the conductive pad 602 through the conductive transition layer 800.
  • the conductive pad 602 and the electrode 620 are polysilicon, and the conductive transition layer 800 is metal.
  • the electrode 620 does not extend to the conductive pad 602, but is connected to the conductive pad 602 through the conductive transition layer 800, which further improves the connection performance between the conductive pad 602 and the electrode 620.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Pressure Sensors (AREA)
  • Measuring Fluid Pressure (AREA)

Abstract

A back hole lead type pressure sensor and a manufacturing method therefor. The pressure sensor is manufactured using a through hole lead technology, wire-bonding-free SMT packaging is implemented, and the packaging size of the pressure sensor is reduced. In addition, piezoresistors (201, 601) of the pressure sensor are located in a sealing cavity (220, 630), and conductive pads (202, 602) are also electrically connected to an external structure by means of through holes (212, 612); therefore, the pressure sensor is less affected by the external environment, has good device stability, and can be used for monitoring the pressure in liquid or severe environment.

Description

背孔引线式压力传感器及其制备方法Back hole lead type pressure sensor and preparation method thereof 技术领域Technical field
本发明涉及微电子机械系统及压力传感器领域,尤其涉及一种背孔引线式压力传感器及其制备方法。The invention relates to the field of microelectronic mechanical systems and pressure sensors, in particular to a back hole lead type pressure sensor and a preparation method thereof.
背景技术Background technique
随着微机电系统技术的发展,压力传感器的制造已经成为一项较为成熟的技术。压力传感器可分为压阻式、电容式、压电式等,其中压阻式压力传感器由于具有体积小、灵敏度高、线性度好等优点,被应用于航空、航海、石油化工、动力机械、生物医学工程、气象、地质、地震测量等各个领域。With the development of MEMS technology, the manufacture of pressure sensors has become a relatively mature technology. Pressure sensors can be divided into piezoresistive, capacitive, piezoelectric, etc. Among them, piezoresistive pressure sensors are used in aviation, marine, petrochemical, power machinery, etc. due to their small size, high sensitivity, and good linearity. Biomedical engineering, meteorology, geology, seismic surveying and other fields.
压阻式压力传感器常用的制造方法是在敏感薄膜的上表面制作压阻和电极。这种方法制备的传感器,其中一种封装方式是敏感薄膜正面感压,通过金属软线将传感器芯片的电极与支撑结构(管壳)的电极连接在一起,这种封装需要金属软线与被测介质隔离,这导致封装体积大。其另一种封装是背面感压,不需要与被测介质隔离,但是传感器的压阻、电极以及金属软线都是暴露在外界环境中的,在强振动条件下金属软线易断裂,同时器件不耐腐蚀,稳定性差。还有一种使用TSV技术封装的方式,即将金属填充满通孔来引线,这通常会导致传感器的温度特性很差。The common manufacturing method of piezoresistive pressure sensor is to make piezoresistance and electrodes on the upper surface of the sensitive film. For the sensor prepared by this method, one of the packaging methods is to sense the pressure on the front surface of the sensitive film. The electrode of the sensor chip and the electrode of the supporting structure (tube case) are connected together through a metal cord. This packaging requires a metal cord and a cover. The measurement medium is isolated, which leads to a large package. The other kind of package is pressure sensitive on the back side and does not need to be isolated from the measured medium. However, the piezoresistance, electrode and metal cord of the sensor are all exposed to the external environment. The metal cord is easy to break under strong vibration conditions. The device is not resistant to corrosion and has poor stability. There is also a packaging method using TSV technology, that is, filling the through holes with metal to lead, which usually leads to poor temperature characteristics of the sensor.
发明内容Summary of the invention
本发明所要解决的技术问题是,提供一种背孔引线式压力传感器及其制备方法,其能够实现无打线贴片封装,减小了压力传感器的封装尺寸,且器件稳定性好,可用于液体或恶劣环境中压力的监测。The technical problem to be solved by the present invention is to provide a back hole lead type pressure sensor and a preparation method thereof, which can realize non-wired patch packaging, reduce the packaging size of the pressure sensor, and have good device stability and can be used for Pressure monitoring in liquids or harsh environments.
为了解决上述问题,本发明提供了一种背孔引线式压力传感器的制备方法,其包括如下步骤:提供一器件衬底,所述器件衬底的第一表面设置有多个压阻及多个导电垫,所述导电垫与所述压阻电连接;提供一支撑衬底,所述支撑衬底具有相对设置的第一表面及第二表面,所述支撑衬底的第一表面具有一凹槽,多个通孔自所述第一表面至所述第二表面贯穿所述支撑衬底;以所述器件衬底的第一表面及所述支撑衬底的第一表面为键合面,将所述器件衬底与所述支撑衬底键合,所述凹槽与所述器件衬底的第一表面形成一密封腔,所述压阻与所述密封腔对应,所述通孔与所述导电垫对应,所述通孔暴露出所述导电垫;在所述支撑衬底的第二表面形成多个电极,所述电极沿所述通孔的侧壁延伸并与所述导电垫电连接。In order to solve the above problems, the present invention provides a method for manufacturing a back-hole lead pressure sensor, which includes the following steps: providing a device substrate, the first surface of which is provided with multiple piezoresistors and multiple A conductive pad, the conductive pad is electrically connected to the piezoresistance; a supporting substrate is provided, the supporting substrate has a first surface and a second surface opposed to each other, and the first surface of the supporting substrate has a concave A groove, a plurality of through holes penetrating the supporting substrate from the first surface to the second surface; taking the first surface of the device substrate and the first surface of the supporting substrate as bonding surfaces, The device substrate is bonded to the support substrate, the groove and the first surface of the device substrate form a sealed cavity, the piezoresistance corresponds to the sealed cavity, and the through hole is Corresponding to the conductive pad, the through hole exposes the conductive pad; a plurality of electrodes are formed on the second surface of the supporting substrate, and the electrodes extend along the sidewall of the through hole and are connected to the conductive pad Electric connection.
可选地,在键合步骤之前,所述制备方法还包括如下步骤:形成一绝缘层,所述绝缘层覆盖所述支撑衬底的第一表面、所述支撑衬底的第二表面、所述凹槽的内表面及所述通 孔的侧壁;在键合步骤中,以所述绝缘层的上表面及所述器件衬底的第一表面为键合面将所述器件衬底与所述支撑衬底键合。Optionally, before the bonding step, the preparation method further includes the following step: forming an insulating layer covering the first surface of the supporting substrate, the second surface of the supporting substrate, and The inner surface of the groove and the side wall of the through hole; in the bonding step, the upper surface of the insulating layer and the first surface of the device substrate are used as bonding surfaces to connect the device substrate and The supporting substrate is bonded.
可选地,在所述支撑衬底的第二表面形成多个所述电极的方法包括如下步骤:在所述支撑衬底的第二表面形成一电极层,所述电极层覆盖所述支撑衬底的第二表面、所述通孔的侧壁及所述导电垫;图形化所述电极层,形成多个所述电极。Optionally, the method for forming a plurality of the electrodes on the second surface of the supporting substrate includes the following steps: forming an electrode layer on the second surface of the supporting substrate, the electrode layer covering the supporting liner The second surface of the bottom, the sidewalls of the through hole, and the conductive pad; the electrode layer is patterned to form a plurality of the electrodes.
可选地,在所述支撑衬底的第二表面形成多个所述电极的方法包括如下步骤:在键合步骤之前,形成一电极层,所述电极层覆盖所述支撑衬底的第二表面及所述通孔的侧壁;在键合步骤之后,图形化所述电极层,形成多个初始电极;在所述导电垫的表面形成一导电过渡层,所述导电过渡层将所述导电垫与所述初始电极电连接,所述初始电极与所述导电过渡层形成所述电极。Optionally, the method of forming a plurality of the electrodes on the second surface of the supporting substrate includes the following steps: before the bonding step, an electrode layer is formed, and the electrode layer covers the second surface of the supporting substrate. Surface and the sidewall of the through hole; after the bonding step, pattern the electrode layer to form a plurality of initial electrodes; form a conductive transition layer on the surface of the conductive pad, and the conductive transition layer will The conductive pad is electrically connected to the initial electrode, and the initial electrode and the conductive transition layer form the electrode.
可选地,在形成所述电极步骤之后,所述制备方法进一步包括如下步骤:形成一阻焊层,所述阻焊层覆盖所述电极并暴露出所述电极需要与外部结构电连接的焊点。Optionally, after the step of forming the electrode, the preparation method further includes the following step: forming a solder resist layer that covers the electrode and exposes the solder that needs to be electrically connected to the external structure. point.
可选地,所述阻焊层充满所述通孔,或者所述阻焊层沿所述电极的表面延伸。Optionally, the solder resist layer fills the through hole, or the solder resist layer extends along the surface of the electrode.
可选地,在形成所述阻焊层的步骤之后,所述制备方法进一步包括如下步骤:在所述电极的焊点处形成一导电凸块,所述导电凸块用于将所述电极与外部结构电连接。Optionally, after the step of forming the solder resist layer, the preparation method further includes the following step: forming a conductive bump at the solder joint of the electrode, and the conductive bump is used to connect the electrode with The external structure is electrically connected.
本发明还提供一种采用上述的制备方法制备的背孔引线式压力传感器,其包括:一器件层,所述器件层内设置有多个压阻及多个导电垫,所述导电垫与所述压阻电连接;一支撑层,与所述器件层键合,所述支撑层具有一凹槽及多个贯穿所述支撑层的通孔,所述凹槽与所述器件层形成一密封腔,所述压阻对应所述密封腔设置,所述导电垫对应所述通孔设置;多个电极,设置在所述支撑层未键合的表面,所述电极沿所述通孔的侧壁延伸,并与所述导电垫电连接。The present invention also provides a back-hole lead pressure sensor prepared by the above-mentioned preparation method, which comprises: a device layer in which a plurality of piezoresistors and a plurality of conductive pads are arranged, and the conductive pad is The piezoresistive electrical connection; a support layer bonded to the device layer, the support layer has a groove and a plurality of through holes penetrating the support layer, the groove and the device layer form a seal Cavity, the piezoresistance is arranged corresponding to the sealed cavity, the conductive pad is arranged corresponding to the through hole; a plurality of electrodes are arranged on the unbonded surface of the support layer, and the electrodes are along the side of the through hole The wall extends and is electrically connected to the conductive pad.
可选地,所述背孔引线式压力传感器还包括一绝缘层,所述绝缘层设置在所述电极与所述支撑层之间。Optionally, the back hole lead type pressure sensor further includes an insulating layer disposed between the electrode and the supporting layer.
可选地,所述背孔引线式压力传感器还包括一导电过渡层,所述导电过渡层设置在所述导电垫表面,所述电极通过所述导电过渡层与所述导电垫电连接。Optionally, the back-hole lead type pressure sensor further includes a conductive transition layer disposed on the surface of the conductive pad, and the electrode is electrically connected to the conductive pad through the conductive transition layer.
可选地,所述背孔引线式压力传感器还包括一阻焊层,所述阻焊层覆盖所述电极并暴露出所述电极需要与外部结构电连接的焊点。Optionally, the back hole lead type pressure sensor further includes a solder resist layer covering the electrode and exposing the solder joints where the electrode needs to be electrically connected to an external structure.
可选地,所述阻焊层充满所述通孔,或者所述阻焊层沿所述电极的表面延伸。Optionally, the solder resist layer fills the through hole, or the solder resist layer extends along the surface of the electrode.
可选地,所述背孔引线式压力传感器还包括多个导电凸块,所述导电凸块设置在所述电极上,用于将所述电极与外部结构电连接。Optionally, the back hole lead type pressure sensor further includes a plurality of conductive bumps, and the conductive bumps are arranged on the electrodes for electrically connecting the electrodes with an external structure.
本发明的优点在于,使用通孔引线技术制备压力传感器,实现无打线贴片封装,减小 了压力传感器的封装尺寸;同时压力传感器的压阻位于密封腔内,导电垫也通过通孔与外部结构电连接,受外界环境影响较小,器件稳定性好,可用于液体或恶劣环境中压力的监测。The advantage of the present invention is that the pressure sensor is prepared by using the through-hole lead technology to realize the non-wired patch package and reduce the package size of the pressure sensor; at the same time, the piezoresistance of the pressure sensor is located in the sealed cavity, and the conductive pad is also connected to the pressure sensor through the through hole. The external structure is electrically connected, less affected by the external environment, and the device has good stability, which can be used for pressure monitoring in liquids or harsh environments.
附图说明Description of the drawings
图1是本发明背孔引线式压力传感器的制备方法的第一具体实施方式的步骤示意图;1 is a schematic diagram of the steps of the first specific embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention;
图2A~图2H是本发明背孔引线式压力传感器的制备方法的第一具体实施方式的工艺流程图;2A to 2H are process flow diagrams of the first specific embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention;
图3A~图3D是在第一具体实施方式中形成器件衬底的工艺流程图;3A to 3D are process flow diagrams of forming a device substrate in the first specific embodiment;
图4是在本发明背孔引线式压力传感器的制备方法的第二具体实施方式中形成阻焊层的工艺流程图;4 is a process flow chart of forming a solder resist layer in the second specific embodiment of the method for manufacturing a back hole lead pressure sensor of the present invention;
图5A~图5D是在本发明背孔引线式压力传感器的制备方法的第三具体实施方式中形成电极的工艺流程图;5A to 5D are process flow diagrams of forming electrodes in the third embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention;
图6是背孔引线式压力传感器的第一具体实施方式的结构示意图;Fig. 6 is a schematic structural diagram of a first specific embodiment of a back hole lead type pressure sensor;
图7是背孔引线式压力传感器的第二具体实施方式的结构示意图;FIG. 7 is a schematic structural diagram of a second specific embodiment of a back hole lead type pressure sensor;
图8是背孔引线式压力传感器的第三具体实施方式的结构示意图。FIG. 8 is a schematic structural diagram of a third embodiment of a back hole lead type pressure sensor.
具体实施方式Detailed ways
下面结合附图对本发明提供的背孔引线式压力传感器及其制备方法的具体实施方式做详细说明。The specific implementation of the back hole lead type pressure sensor and the preparation method thereof provided by the present invention will be described in detail below with reference to the accompanying drawings.
图1是本发明背孔引线式压力传感器的制备方法的第一具体实施方式的步骤示意图。请参阅图1,所述制备方法包括如下步骤:步骤S10,提供一器件衬底,所述器件衬底的第一表面设置有多个压阻及多个导电垫,所述导电垫与所述压阻电连接;步骤S11,提供一支撑衬底,所述支撑衬底具有相对设置的第一表面及第二表面,所述支撑衬底的第一表面具有一凹槽,多个通孔自所述第一表面至所述第二表面贯穿所述支撑衬底;步骤S12,以所述器件衬底的第一表面及所述支撑衬底的第一表面为键合面,将所述器件衬底与所述支撑衬底键合,所述凹槽与所述器件衬底的第一表面形成一密封腔,所述压阻与所述密封腔对应,所述通孔与所述导电垫对应,所述通孔暴露出所述导电垫;步骤S13,在所述支撑衬底的第二表面形成多个电极,所述电极沿所述通孔的侧壁延伸并与所述导电垫电连接。FIG. 1 is a schematic diagram of the steps of the first specific embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention. Referring to FIG. 1, the preparation method includes the following steps: step S10, a device substrate is provided, a first surface of the device substrate is provided with a plurality of piezoresistors and a plurality of conductive pads, the conductive pad and the Piezoresistive electrical connection; step S11, a supporting substrate is provided, the supporting substrate has a first surface and a second surface oppositely arranged, the first surface of the supporting substrate has a groove, and a plurality of through holes The first surface to the second surface penetrate the supporting substrate; step S12, using the first surface of the device substrate and the first surface of the supporting substrate as bonding surfaces, the device The substrate is bonded to the supporting substrate, the groove and the first surface of the device substrate form a sealed cavity, the piezoresistance corresponds to the sealed cavity, and the through hole is connected to the conductive pad Correspondingly, the conductive pad is exposed by the through hole; step S13, a plurality of electrodes are formed on the second surface of the supporting substrate, and the electrodes extend along the sidewall of the through hole and are electrically connected to the conductive pad. connection.
图2A~图2H是本发明背孔引线式压力传感器的制备方法的第一具体实施方式的工艺流程图。2A to 2H are process flow diagrams of the first specific embodiment of the manufacturing method of the back hole lead type pressure sensor of the present invention.
请参阅步骤S10及图2A,提供一器件衬底200,所述器件衬底200的第一表面200A设置有多个压阻201及多个导电垫202,所述导电垫202与所述压阻201电连接。Referring to step S10 and FIG. 2A, a device substrate 200 is provided. A first surface 200A of the device substrate 200 is provided with a plurality of piezoresistors 201 and a plurality of conductive pads 202. The conductive pads 202 and the piezoresistors 201 electrical connection.
在本具体实施方式中,形成所述器件衬底200的方法包括如下步骤:In this embodiment, the method of forming the device substrate 200 includes the following steps:
请参阅图3A,提供一第一衬底300,所述第一衬底300具有一第一表面300A,一第一绝缘层301覆盖所述第一衬底300的第一表面300A。所述第一衬底300包括但不限于单晶硅或SOI片。若所述第一衬底300为SOI硅片,则所述SOI片的上层硅厚度需要恰好满足敏感薄膜的厚度要求。所述第一绝缘层301可通过热氧化工艺形成,其可在后续形成压阻的工艺中降低离子注入的沟道效应。Referring to FIG. 3A, a first substrate 300 is provided. The first substrate 300 has a first surface 300A, and a first insulating layer 301 covers the first surface 300A of the first substrate 300. The first substrate 300 includes but is not limited to single crystal silicon or SOI wafer. If the first substrate 300 is an SOI silicon wafer, the upper silicon thickness of the SOI wafer needs to meet the thickness requirement of the sensitive film. The first insulating layer 301 can be formed by a thermal oxidation process, which can reduce the channel effect of ion implantation in the subsequent process of forming piezoresistance.
请参阅图3B,在所述第一衬底300的第一表面300A上形成多个压阻201及多个与所述压阻201电连接的浓硼导线302,其中,所述压阻201为淡硼压阻。在该步骤中所述淡硼压阻302及所述浓硼导线302可由光刻、离子注入工艺制作而成。所述压阻201是淡硼扩散形成的应变压阻,所述浓硼导线302是注入浓硼形成的浓硼欧姆接触区。在本具体实施方式中,四个压阻201(附图中绘示两个压阻201)通过浓硼导线302连接而形成惠斯通电桥。在本发明其他具体实施方式中,也可采用八个压阻201。Referring to FIG. 3B, a plurality of piezoresistors 201 and a plurality of concentrated boron wires 302 electrically connected to the piezoresistors 201 are formed on the first surface 300A of the first substrate 300, wherein the piezoresistors 201 are Light boron piezoresistance. In this step, the light boron piezoresistor 302 and the concentrated boron wire 302 can be fabricated by photolithography and ion implantation. The piezoresistor 201 is a strained piezoresistance formed by light boron diffusion, and the concentrated boron wire 302 is a concentrated boron ohmic contact area formed by injecting concentrated boron. In this specific embodiment, four piezoresistors 201 (two piezoresistors 201 are shown in the figure) are connected by a concentrated boron wire 302 to form a Wheatstone bridge. In other specific embodiments of the present invention, eight piezoresistors 201 may also be used.
请参阅图3C,图形化所述第一绝缘层301,以在所述第一绝缘层301上形成多个开口301A,所述开口301A暴露出所述浓硼导线302的表面。在该步骤中,可采用光刻及刻蚀工艺形成所述开口301A。3C, the first insulating layer 301 is patterned to form a plurality of openings 301A on the first insulating layer 301, and the openings 301A expose the surface of the concentrated boron wire 302. In this step, the opening 301A can be formed by photolithography and etching processes.
请参阅图3D,在所述开口301A处形成多个导电垫202,所述导电垫202与所述浓硼导线302电连接,进而形成所述器件衬底200。在该步骤中,所述导电垫202为金属,其可经溅射或淀积、光刻及刻蚀、湿法腐蚀或干法刻蚀的工艺制作而成。在本发明其他具体实施方式中,所述导电垫202还可以为多晶硅,其可通过掺杂工艺而形成。Referring to FIG. 3D, a plurality of conductive pads 202 are formed at the opening 301A, and the conductive pads 202 are electrically connected to the concentrated boron wire 302, thereby forming the device substrate 200. In this step, the conductive pad 202 is a metal, which can be made by sputtering or deposition, photolithography and etching, wet etching or dry etching. In other specific embodiments of the present invention, the conductive pad 202 may also be polysilicon, which may be formed by a doping process.
可选地,在本发明其他具体实施方式中,在形成所述导电垫202后还可以再形成一钝化层(附图中未绘示),所述导电垫暴露于所述钝化层。在该步骤中,可先沉积一层钝化层,再采用光刻及刻蚀工艺暴露出所述导电垫。所述钝化层可用于保护所述导电垫202及所述钝化层可作为后续键合的键合层。在本具体实施方式中,未形成所述钝化层。Optionally, in other specific embodiments of the present invention, after forming the conductive pad 202, a passivation layer (not shown in the drawings) may be further formed, and the conductive pad is exposed to the passivation layer. In this step, a passivation layer can be deposited first, and then the conductive pad is exposed by photolithography and etching processes. The passivation layer can be used to protect the conductive pad 202 and the passivation layer can be used as a bonding layer for subsequent bonding. In this specific embodiment, the passivation layer is not formed.
请参阅步骤S11及图2B,提供一支撑衬底210,所述支撑衬底210具有相对设置的第一表面210A及第二表面210B。所述支撑衬底210包括但不限于硅衬底、玻璃衬底等。在本具体实施方式中,所述支撑衬底210是厚度为400微米的硅片,在本发明其他具体实施方式中,所述支撑衬底210的厚度也可不限于400微米。Referring to step S11 and FIG. 2B, a supporting substrate 210 is provided, and the supporting substrate 210 has a first surface 210A and a second surface 210B opposite to each other. The supporting substrate 210 includes, but is not limited to, a silicon substrate, a glass substrate, and the like. In this embodiment, the support substrate 210 is a silicon wafer with a thickness of 400 microns. In other embodiments of the present invention, the thickness of the support substrate 210 may not be limited to 400 microns.
所述支撑衬底210的第一表面210A具有一凹槽211。在该步骤中,可采用光刻及刻蚀工艺在所述支撑衬底210的第一表面210A形成所述凹槽211。可以理解的是,所述凹槽211并未贯穿所述支撑衬底210。所述凹槽211的形状包括但不限于矩形、圆形或多边形。The first surface 210A of the supporting substrate 210 has a groove 211. In this step, the groove 211 can be formed on the first surface 210A of the supporting substrate 210 by using photolithography and etching processes. It can be understood that the groove 211 does not penetrate the supporting substrate 210. The shape of the groove 211 includes, but is not limited to, a rectangle, a circle, or a polygon.
多个通孔212自所述第一表面210A至所述第二表面210B贯穿所述支撑衬底210。在 本具体实施方式中,可对所述支撑衬底210的第二表面210B进行光刻及刻蚀工艺而形成所述通孔212。进一步,所述通孔212位于所述凹槽211的外侧,即多个所述通孔212环绕所述凹槽211设置。所述通孔212的数量可与所述导电垫202的数量对应。所述通孔212的形状包括但不限于矩形、圆形或多边形。A plurality of through holes 212 penetrate the supporting substrate 210 from the first surface 210A to the second surface 210B. In this embodiment, the second surface 210B of the support substrate 210 may be subjected to photolithography and etching processes to form the through hole 212. Further, the through hole 212 is located outside the groove 211, that is, a plurality of the through holes 212 are arranged around the groove 211. The number of the through holes 212 may correspond to the number of the conductive pads 202. The shape of the through hole 212 includes, but is not limited to, a rectangle, a circle, or a polygon.
可选地,在本具体实施方式中还包括一形成一第二绝缘层213的步骤。请参阅图2C,形成一第二绝缘层213,所述第二绝缘层213覆盖所述支撑衬底210的第一表面210A、所述支撑衬底210的第二表面210B、所述凹槽211的内表面及所述通孔212的侧壁。在该步骤中,可采用热氧化或者LPCVD工艺形成所述第二绝缘层213。所述第二绝缘层213的作用在于将所述支撑衬底210与后续形成的电极绝缘。可以理解的是,若所述支撑衬底210为非绝缘衬底,则需要形成所述第二绝缘层;若所述支撑衬底210为绝缘衬底,则可不形成所述第二绝缘层。具体地说,在本具体实施方式中,所述支撑衬底210为硅衬底,则需要形成所述第二绝缘层213,以将电极与所述支撑衬底210绝缘;在本发明另一具体实施方式中,所述支撑衬底为玻璃衬底,由于玻璃衬底本身具有绝缘特性,则可不形成所述第二绝缘层。Optionally, this specific embodiment further includes a step of forming a second insulating layer 213. 2C, a second insulating layer 213 is formed. The second insulating layer 213 covers the first surface 210A of the supporting substrate 210, the second surface 210B of the supporting substrate 210, and the groove 211 The inner surface and the side wall of the through hole 212. In this step, the second insulating layer 213 may be formed by thermal oxidation or LPCVD process. The function of the second insulating layer 213 is to insulate the supporting substrate 210 from subsequently formed electrodes. It is understandable that if the supporting substrate 210 is a non-insulating substrate, the second insulating layer needs to be formed; if the supporting substrate 210 is an insulating substrate, the second insulating layer may not be formed. Specifically, in this embodiment, the supporting substrate 210 is a silicon substrate, and the second insulating layer 213 needs to be formed to insulate the electrode from the supporting substrate 210; in another aspect of the present invention In specific embodiments, the supporting substrate is a glass substrate, and since the glass substrate itself has insulating properties, the second insulating layer may not be formed.
请参阅步骤S12及图2D,以所述器件衬底200的第一表面200A及所述支撑衬底210的第一表面210A为键合面,将所述器件衬底200与所述支撑衬底210键合。在本具体实施方式中,以所述第一绝缘层301的上表面及所述第二绝缘层213的上表面为键合面,将所述器件衬底200与所述支撑衬底210键合。Referring to step S12 and FIG. 2D, using the first surface 200A of the device substrate 200 and the first surface 210A of the supporting substrate 210 as bonding surfaces, the device substrate 200 and the supporting substrate 210 bonding. In this embodiment, the upper surface of the first insulating layer 301 and the upper surface of the second insulating layer 213 are used as bonding surfaces, and the device substrate 200 is bonded to the supporting substrate 210 .
在该步骤中,所述器件衬底200与所述支撑衬底210的键合工艺包括但不限于低温Si-Si熔融键合、高温Si-Si熔融键合及Si-Glass阳极键合。具体地说,在本具体实施方式中,所述导电垫202为金属铝,则所述器件衬底200与所述支撑衬底210的键合工艺为低温Si-Si熔融键合,其键合温度不超过所述导电垫202的熔点660℃;在本发明另一具体实施方式中,所述导电垫202为多晶硅,则所述器件衬底200与所述支撑衬底210的键合工艺为高温Si-Si熔融键合,其键合温度不超过所述导电垫202的熔点1410℃;在本发明再一具体实施方式中,所述导电垫202为多晶硅,所述支撑衬底210为玻璃衬底,则所述器件衬底200与所述支撑衬底210的键合工艺为Si-Glass阳极键合。In this step, the bonding process of the device substrate 200 and the supporting substrate 210 includes, but is not limited to, low-temperature Si-Si fusion bonding, high-temperature Si-Si fusion bonding, and Si-Glass anodic bonding. Specifically, in this embodiment, the conductive pad 202 is metallic aluminum, and the bonding process of the device substrate 200 and the supporting substrate 210 is low-temperature Si-Si fusion bonding, and the bonding The temperature does not exceed the melting point of the conductive pad 202 at 660°C; in another specific embodiment of the present invention, the conductive pad 202 is polysilicon, and the bonding process of the device substrate 200 and the supporting substrate 210 is For high-temperature Si-Si fusion bonding, the bonding temperature does not exceed the melting point of the conductive pad 202 at 1410°C; in another specific embodiment of the present invention, the conductive pad 202 is polysilicon, and the supporting substrate 210 is glass Substrate, the bonding process of the device substrate 200 and the supporting substrate 210 is Si-Glass anode bonding.
在所述器件衬底200与所述支撑衬底210键合后,所述凹槽211与所述器件衬底200的第一表面200A形成一密封腔220。在本具体实施方式中,所述凹槽211与所述第一绝缘层301的上表面形成所述密封腔220。所述压阻201与所述密封腔220对应,即所述压阻201位于所述密封腔220的投影范围内。所述通孔212与所述导电垫202对应,所述通孔212暴露出所述导电垫202,即自所述支撑衬底210的第二表面210B的方向,能够观察到 所述导电垫202。After the device substrate 200 and the supporting substrate 210 are bonded, the groove 211 and the first surface 200A of the device substrate 200 form a sealed cavity 220. In this embodiment, the groove 211 and the upper surface of the first insulating layer 301 form the sealed cavity 220. The piezoresistor 201 corresponds to the sealed cavity 220, that is, the piezoresistor 201 is located within the projection range of the sealed cavity 220. The through hole 212 corresponds to the conductive pad 202, and the through hole 212 exposes the conductive pad 202, that is, from the direction of the second surface 210B of the supporting substrate 210, the conductive pad 202 can be observed .
可选地,在进行键合步骤之前,还包括一将所述器件衬底200与所述支撑衬底210对位的步骤。该步骤的作用在于,保证所述压阻201与所述密封腔220对应,所述通孔212与所述导电垫202对应。可选地,在进行键合步骤之前,还包括一抛光所述器件衬底200的表面的步骤。在本具体实施方式中,由于所述器件衬底200的键合面为第一绝缘层301的表面,则在进行键合步骤之前,抛光所述器件衬底200表面的第一绝缘层301,以使其平整度满足键合需求。Optionally, before the bonding step, a step of aligning the device substrate 200 and the supporting substrate 210 is further included. The effect of this step is to ensure that the piezoresistance 201 corresponds to the sealed cavity 220 and the through hole 212 corresponds to the conductive pad 202. Optionally, before the bonding step, a step of polishing the surface of the device substrate 200 is further included. In this specific embodiment, since the bonding surface of the device substrate 200 is the surface of the first insulating layer 301, before the bonding step, the first insulating layer 301 on the surface of the device substrate 200 is polished. To make its flatness meet the bonding requirements.
可选地,请参阅图2E,在本具体实施方式中,在键合步骤完成后,自所述器件衬底200的与所述第一表面200A相对的一表面开始对所述器件衬底200进行减薄及抛光。减薄及抛光工艺完成后所述器件衬底200的厚度可减小至几微米。若所述器件衬底200为SOI片,则先进行减薄,减薄至接近SOI片中间的SiO 2层时,湿法腐蚀掉SiO 2,得到顶层Si膜。 Optionally, referring to FIG. 2E, in this specific embodiment, after the bonding step is completed, the device substrate 200 is applied to the device substrate 200 from a surface of the device substrate 200 opposite to the first surface 200A. Perform thinning and polishing. After the thinning and polishing process is completed, the thickness of the device substrate 200 can be reduced to several microns. If the device substrate 200 is a SOI substrate, it is first thinned, thinning to close when the intermediate SiO 2 layer SOI substrate, a wet etched SiO 2, to give the top layer Si film.
请参阅步骤S13及图2F,在所述支撑衬底210的第二表面210B形成多个电极230,所述电极230沿所述通孔212的侧壁延伸并与所述导电垫202电连接。在本具体实施方式中,形成所述电极230的具体步骤为:首先在所述支撑衬底210的第二表面210B形成一电极层(附图中未绘示),所述电极层覆盖所述支撑衬底210的第二表面210B、所述通孔212的侧壁及所述导电垫202;其次,图形化所述电极层,形成多个所述电极230,其中,可采用光刻及刻蚀等工艺图形化所述电极层形成所述电极230。Referring to step S13 and FIG. 2F, a plurality of electrodes 230 are formed on the second surface 210B of the supporting substrate 210, and the electrodes 230 extend along the sidewall of the through hole 212 and are electrically connected to the conductive pad 202. In this embodiment, the specific steps of forming the electrode 230 are: first, an electrode layer (not shown in the drawings) is formed on the second surface 210B of the supporting substrate 210, and the electrode layer covers the The second surface 210B of the supporting substrate 210, the sidewalls of the through holes 212, and the conductive pad 202; secondly, the electrode layer is patterned to form a plurality of the electrodes 230, wherein photolithography and etching can be used The electrode layer is patterned by processes such as etching to form the electrode 230.
在该步骤中,所述电极230沿所述通孔212的侧壁延伸,而并非是充满所述通孔212。若所述电极230充满所述通孔212,则会使传感器的温度特性变差。在本具体实施方式中,所述电极230与所述支撑衬底210之间设置有所述第二绝缘层213。In this step, the electrode 230 extends along the sidewall of the through hole 212 instead of filling the through hole 212. If the electrode 230 fills the through hole 212, the temperature characteristic of the sensor will deteriorate. In this embodiment, the second insulating layer 213 is provided between the electrode 230 and the supporting substrate 210.
可选地,请参阅图2G,在形成所述电极230步骤之后,所述制备方法进一步包括如下步骤:形成一阻焊层240,所述阻焊层240覆盖所述电极230并暴露出所述电极230需要与外部结构电连接的焊点230A。在本具体实施方式中,所述阻焊层为有机低聚物,其充满所述通孔212,以提高所述传感器的性能。在本发明第二具体实施方式中,请参阅图4,所述阻焊层240为氮化硅、氧化硅、氮氧化硅等无机材料,其沿所述电极230的表面延伸,即所述阻焊层240以薄膜的形式覆盖所述电极230。Optionally, referring to FIG. 2G, after the step of forming the electrode 230, the preparation method further includes the following steps: forming a solder resist layer 240, the solder resist layer 240 covering the electrode 230 and exposing the The electrode 230 needs a solder joint 230A that is electrically connected to the external structure. In this embodiment, the solder resist layer is an organic oligomer, which fills the through hole 212 to improve the performance of the sensor. In the second embodiment of the present invention, referring to FIG. 4, the solder resist layer 240 is made of inorganic materials such as silicon nitride, silicon oxide, silicon oxynitride, etc., which extends along the surface of the electrode 230, that is, the resist The solder layer 240 covers the electrode 230 in the form of a film.
可选地,请参阅图2H,在所述电极230的焊点230A处形成一导电凸块250,所述导电凸块250用于将所述电极230与外部结构电连接。在本具体实施方式中,在所述焊点230A上进行植球回流,形成所述导电凸块250。所述导电凸块250可与外部的印刷电路板等结构电连接。Optionally, referring to FIG. 2H, a conductive bump 250 is formed at the solder joint 230A of the electrode 230, and the conductive bump 250 is used to electrically connect the electrode 230 with an external structure. In this specific embodiment, ball reflow is performed on the solder joint 230A to form the conductive bump 250. The conductive bump 250 may be electrically connected to an external printed circuit board and other structures.
在第一具体实施方式中,所述电极230在键合步骤之后形成,而在第三具体实施方式 中,形成电极的步骤包括在键合步骤之前进行的步骤和在键合步骤之后进行的步骤。具体说明如下:In the first embodiment, the electrode 230 is formed after the bonding step, and in the third embodiment, the step of forming the electrode includes a step performed before the bonding step and a step performed after the bonding step . The specific instructions are as follows:
请参阅图5A,在图2C所示的结构图之后,形成一电极层500,所述电极层500覆盖所述支撑衬底210的第二表面210B及所述通孔212的侧壁。所述电极层500的材料为多晶硅,其可通过LPCVD工艺形成。Referring to FIG. 5A, after the structural diagram shown in FIG. 2C, an electrode layer 500 is formed, and the electrode layer 500 covers the second surface 210B of the supporting substrate 210 and the sidewall of the through hole 212. The material of the electrode layer 500 is polysilicon, which can be formed by an LPCVD process.
进一步,在实际工艺中,所述电极层500还覆盖所述支撑衬底210的第一表面210A及所述凹槽211的内侧壁,则在该步骤中,可通过刻蚀工艺去除所述支撑衬底210的第一表面210A及所述凹槽211的内侧壁的电极层500,而保留覆盖所述支撑衬底210的第二表面210B及所述通孔212的侧壁的电极层500。请参阅图5B,以所述第一绝缘层301的上表面及所述第二绝缘层213的上表面为键合面,将所述器件衬底200与所述支撑衬底210键合。在该步骤中,所述键合工艺为高温Si-Si熔融键合,所述温度不超过多晶硅的熔点1410℃即可。Further, in the actual process, the electrode layer 500 also covers the first surface 210A of the supporting substrate 210 and the inner sidewall of the groove 211, so in this step, the supporting can be removed by an etching process. The electrode layer 500 on the first surface 210A of the substrate 210 and the inner sidewall of the groove 211 remains, while the electrode layer 500 covering the second surface 210B of the supporting substrate 210 and the sidewall of the through hole 212 remains. Referring to FIG. 5B, the upper surface of the first insulating layer 301 and the upper surface of the second insulating layer 213 are used as bonding surfaces to bond the device substrate 200 and the supporting substrate 210. In this step, the bonding process is high-temperature Si-Si fusion bonding, and the temperature does not exceed the melting point of polysilicon, 1410°C.
请参阅图5C,图形化所述电极层500,形成多个初始电极501。在该步骤中,可采用光刻及刻蚀工艺去除所述支撑衬底210的第一表面210A上的部分电极层500,形成所述初始电极501。所述初始电极501覆盖所述通孔212的侧壁及所述支撑衬底210的部分第二表面210B。Referring to FIG. 5C, the electrode layer 500 is patterned to form a plurality of initial electrodes 501. In this step, a photolithography and etching process may be used to remove part of the electrode layer 500 on the first surface 210A of the supporting substrate 210 to form the initial electrode 501. The initial electrode 501 covers the sidewall of the through hole 212 and a part of the second surface 210B of the supporting substrate 210.
请参阅图5D,在所述导电垫202的表面形成一导电过渡层502,即在所述通孔212的底部形成所述导电过渡层502。所述导电过渡层502的材料包括但不限于金属材料。所述导电过渡层502将所述导电垫202与所述初始电极501电连接,即所述初始电极501与所述导电过渡层502共同形成一电极510。形成电极510后,后续步骤与第一具体实施方式的步骤相同,不再赘述。Referring to FIG. 5D, a conductive transition layer 502 is formed on the surface of the conductive pad 202, that is, the conductive transition layer 502 is formed at the bottom of the through hole 212. The material of the conductive transition layer 502 includes but is not limited to metal materials. The conductive transition layer 502 electrically connects the conductive pad 202 and the initial electrode 501, that is, the initial electrode 501 and the conductive transition layer 502 together form an electrode 510. After the electrode 510 is formed, the subsequent steps are the same as those of the first specific embodiment, and will not be described again.
在第三具体实施方式中,所述导电垫202及所述初始电极502的材料均为多晶硅,若是仅仅将两者直接电连接,其电连接性能不好,接触不良,而在本具体实施方式中,所述导电过渡层502与所述导电垫202及所述初始电极502均形成欧姆接触,能够加强所述导电垫202与所述初始电极502之间的电连接性能。In the third embodiment, the materials of the conductive pad 202 and the initial electrode 502 are both polysilicon. If the two are only directly electrically connected, the electrical connection performance is not good and the contact is poor. However, in this embodiment Wherein, the conductive transition layer 502 forms an ohmic contact with the conductive pad 202 and the initial electrode 502, which can enhance the electrical connection performance between the conductive pad 202 and the initial electrode 502.
本发明还提供了采用上述的制备方法制备的背孔引线式压力传感器的具体实施方式。The invention also provides specific implementations of the back-hole lead type pressure sensor prepared by the above-mentioned preparation method.
图6是背孔引线式压力传感器的第一具体实施方式的结构示意图。请参阅图6,所述背孔引线式压力传感器包括一器件层600、一支撑层610及多个电极620。Fig. 6 is a schematic structural diagram of a first specific embodiment of a back hole lead type pressure sensor. Please refer to FIG. 6, the back hole lead type pressure sensor includes a device layer 600, a support layer 610 and a plurality of electrodes 620.
所述器件层600内设置有多个压阻601及多个导电垫602,所述导电垫602与所述压阻601电连接。在本具体实施方式中,所述压阻601为淡硼压阻,所述淡硼压阻通过一浓硼导线603与所述导电垫602电连接。所述器件层600包括一第一衬底604及设置在所述第一 衬底604上的第一绝缘层605,所述压阻601设置在所述第一衬底604内。所述第一绝缘层605具有多个开口(附图中未绘示),所述导电垫602设置在所述开口内,即所述导电垫602暴露于所述第一绝缘层605之外。A plurality of piezoresistors 601 and a plurality of conductive pads 602 are provided in the device layer 600, and the conductive pads 602 are electrically connected to the piezoresistors 601. In this specific embodiment, the piezoresistor 601 is a light boron piezoresistor, and the light boron piezoresistor is electrically connected to the conductive pad 602 through a concentrated boron wire 603. The device layer 600 includes a first substrate 604 and a first insulating layer 605 disposed on the first substrate 604, and the piezoresistor 601 is disposed in the first substrate 604. The first insulating layer 605 has a plurality of openings (not shown in the drawings), and the conductive pad 602 is disposed in the opening, that is, the conductive pad 602 is exposed outside the first insulating layer 605.
所述支撑层610与所述器件层600键合。所述支撑层610具有一凹槽611及多个贯穿所述支撑层610的通孔612。所述凹槽611与所述器件层600形成一密封腔630,所述压阻601对应所述密封腔630设置。所述导电垫602对应所述通孔612设置,即所述通孔612暴露出所述导电垫602。The support layer 610 is bonded to the device layer 600. The supporting layer 610 has a groove 611 and a plurality of through holes 612 passing through the supporting layer 610. The groove 611 and the device layer 600 form a sealed cavity 630, and the piezoresistor 601 is disposed corresponding to the sealed cavity 630. The conductive pad 602 is disposed corresponding to the through hole 612, that is, the through hole 612 exposes the conductive pad 602.
所述电极620设置在所述支撑层610未键合的表面,且所述电极620沿所述通孔612的侧壁延伸,并与所述导电垫602电连接。所述电极620沿所述通孔612的侧壁延伸,而并非是充满所述通孔612。若所述电极620充满所述通孔612,会使背孔引线式压力传感器的温度特性变差。The electrode 620 is disposed on the unbonded surface of the supporting layer 610, and the electrode 620 extends along the sidewall of the through hole 612 and is electrically connected to the conductive pad 602. The electrode 620 extends along the sidewall of the through hole 612 instead of filling the through hole 612. If the electrode 620 fills the through hole 612, the temperature characteristic of the back hole lead pressure sensor will be deteriorated.
在本具体实施方式中,所述背孔引线式压力传感器还包括第二绝缘层640,所述第二绝缘层640设置在所述电极620与所述支撑层610之间。进一步,所述第二绝缘层640不仅设置在所述电极620与所述支撑层610之间,其还覆盖所述支撑层610全部表面、所述凹槽611的内侧壁及所述通孔612的侧壁。In this specific embodiment, the back hole lead type pressure sensor further includes a second insulating layer 640, and the second insulating layer 640 is disposed between the electrode 620 and the supporting layer 610. Further, the second insulating layer 640 is not only disposed between the electrode 620 and the support layer 610, it also covers the entire surface of the support layer 610, the inner side wall of the groove 611, and the through hole 612. The sidewall.
进一步,所述背孔引线式压力传感器还包括一阻焊层650,所述阻焊层650覆盖所述电极620并暴露出所述电极620需要与外部结构电连接的焊点620A。在本具体实施方式中,所述阻焊层650充满所述通孔612,以提高所述传感器的性能。在本发明第二具体实施方式中,请参阅图7,所述阻焊层650为氮化硅、氧化硅、氮氧化硅等无机材料,其沿所述电极620的表面延伸,即所述阻焊层650以薄膜的形式覆盖所述电极620。Further, the back hole lead type pressure sensor further includes a solder resist layer 650 that covers the electrode 620 and exposes the solder joints 620A where the electrode 620 needs to be electrically connected to an external structure. In this embodiment, the solder resist layer 650 fills the through hole 612 to improve the performance of the sensor. In the second embodiment of the present invention, referring to FIG. 7, the solder resist layer 650 is made of inorganic materials such as silicon nitride, silicon oxide, silicon oxynitride, etc., which extends along the surface of the electrode 620, that is, the resist The solder layer 650 covers the electrode 620 in the form of a thin film.
进一步,在本具体实施方式中,所述背孔引线式压力传感器还包括多个导电凸块660,所述导电凸块660设置在所述电极620的焊点620A上,用于将所述电极620与外部结构电连接。Further, in this specific embodiment, the back-hole lead type pressure sensor further includes a plurality of conductive bumps 660, and the conductive bumps 660 are arranged on the solder joints 620A of the electrode 620 for connecting the electrode 620 is electrically connected to the external structure.
图8是本发明背孔引线式压力传感器的第三具体实施方式的结构示意图。请参阅图8,第三具体实施方式与第一具体实施方式不同之处在于,所述背孔引线式压力传感器还包括一导电过渡层800。所述导电过渡层800设置在所述导电垫602表面,所述电极620通过所述导电过渡层800与所述导电垫602电连接。在本具体实施方式中,所述导电垫602及所述电极620为多晶硅,所述导电过渡层800为金属。所述电极620并未延伸至所述导电垫602,而是通过所述导电过渡层800与所述导电垫602连接,进一步提高了所述导电垫602与所述电极620的连接性能。Fig. 8 is a schematic structural view of a third specific embodiment of the back hole lead type pressure sensor of the present invention. Referring to FIG. 8, the third embodiment is different from the first embodiment in that the back-hole lead type pressure sensor further includes a conductive transition layer 800. The conductive transition layer 800 is disposed on the surface of the conductive pad 602, and the electrode 620 is electrically connected to the conductive pad 602 through the conductive transition layer 800. In this embodiment, the conductive pad 602 and the electrode 620 are polysilicon, and the conductive transition layer 800 is metal. The electrode 620 does not extend to the conductive pad 602, but is connected to the conductive pad 602 through the conductive transition layer 800, which further improves the connection performance between the conductive pad 602 and the electrode 620.
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员, 在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。The above are only the preferred embodiments of the present invention. It should be pointed out that for those of ordinary skill in the art, without departing from the principle of the present invention, several improvements and modifications can be made, and these improvements and modifications should also be considered This is the protection scope of the present invention.

Claims (14)

  1. 一种背孔引线式压力传感器的制备方法,其特征在于,包括如下步骤:A method for preparing a back hole lead type pressure sensor is characterized in that it comprises the following steps:
    提供一器件衬底,所述器件衬底的第一表面设置有多个压阻及多个导电垫,所述导电垫与所述压阻电连接;Providing a device substrate, a first surface of the device substrate is provided with a plurality of piezoresistors and a plurality of conductive pads, and the conductive pads are electrically connected to the piezoresistors;
    提供一支撑衬底,所述支撑衬底具有相对设置的第一表面及第二表面,所述支撑衬底的第一表面具有一凹槽,多个通孔自所述第一表面至所述第二表面贯穿所述支撑衬底;A supporting substrate is provided. The supporting substrate has a first surface and a second surface opposite to each other. The first surface of the supporting substrate has a groove, and a plurality of through holes extend from the first surface to the The second surface penetrates the supporting substrate;
    以所述器件衬底的第一表面及所述支撑衬底的第一表面为键合面,将所述器件衬底与所述支撑衬底键合,所述凹槽与所述器件衬底的第一表面形成一密封腔,所述压阻与所述密封腔对应,所述通孔与所述导电垫对应,所述通孔暴露出所述导电垫;Using the first surface of the device substrate and the first surface of the supporting substrate as bonding surfaces, the device substrate is bonded to the supporting substrate, and the groove is connected to the device substrate A sealed cavity is formed on the first surface of the piezoresistance, the piezoresistance corresponds to the sealed cavity, the through hole corresponds to the conductive pad, and the through hole exposes the conductive pad;
    在所述支撑衬底的第二表面形成多个电极,所述电极沿所述通孔的侧壁延伸并与所述导电垫电连接。A plurality of electrodes are formed on the second surface of the supporting substrate, and the electrodes extend along the sidewalls of the through holes and are electrically connected to the conductive pads.
  2. 根据权利要求1所述的制备方法,其特征在于,在键合步骤之前,所述制备方法还包括如下步骤:The preparation method according to claim 1, characterized in that, before the bonding step, the preparation method further comprises the following steps:
    形成一绝缘层,所述绝缘层覆盖所述支撑衬底的第一表面、所述支撑衬底的第二表面、所述凹槽的内表面及所述通孔的侧壁;Forming an insulating layer, the insulating layer covering the first surface of the supporting substrate, the second surface of the supporting substrate, the inner surface of the groove and the sidewall of the through hole;
    在键合步骤中,以所述绝缘层的上表面及所述器件衬底的第一表面为键合面将所述器件衬底与所述支撑衬底键合。In the bonding step, the upper surface of the insulating layer and the first surface of the device substrate are used as bonding surfaces to bond the device substrate and the supporting substrate.
  3. 根据权利要求1所述的制备方法,其特征在于,在所述支撑衬底的第二表面形成多个所述电极的方法包括如下步骤:The manufacturing method according to claim 1, wherein the method of forming a plurality of the electrodes on the second surface of the supporting substrate comprises the following steps:
    在所述支撑衬底的第二表面形成一电极层,所述电极层覆盖所述支撑衬底的第二表面、所述通孔的侧壁及所述导电垫;Forming an electrode layer on the second surface of the supporting substrate, the electrode layer covering the second surface of the supporting substrate, the sidewall of the through hole and the conductive pad;
    图形化所述电极层,形成多个所述电极。The electrode layer is patterned to form a plurality of the electrodes.
  4. 根据权利要求1所述的制备方法,其特征在于,在所述支撑衬底的第二表面形成多个所述电极的方法包括如下步骤:The manufacturing method according to claim 1, wherein the method of forming a plurality of the electrodes on the second surface of the supporting substrate comprises the following steps:
    在键合步骤之前,形成一电极层,所述电极层覆盖所述支撑衬底的第二表面及所述通孔的侧壁;Before the bonding step, an electrode layer is formed, the electrode layer covering the second surface of the supporting substrate and the sidewall of the through hole;
    在键合步骤之后,图形化所述电极层,形成多个初始电极;After the bonding step, pattern the electrode layer to form a plurality of initial electrodes;
    在所述导电垫的表面形成一导电过渡层,所述导电过渡层将所述导电垫与所述初始电极电连接,所述初始电极与所述导电过渡层形成所述电极。A conductive transition layer is formed on the surface of the conductive pad, and the conductive transition layer electrically connects the conductive pad and the initial electrode, and the initial electrode and the conductive transition layer form the electrode.
  5. 根据权利要求1~4任意一项所述的制备方法,其特征在于,在形成所述电极步骤之后,所述制备方法进一步包括如下步骤:The preparation method according to any one of claims 1 to 4, characterized in that, after the step of forming the electrode, the preparation method further comprises the following steps:
    形成一阻焊层,所述阻焊层覆盖所述电极并暴露出所述电极需要与外部结构电连接的焊 点。A solder resist layer is formed, the solder resist layer covers the electrode and exposes the solder joints where the electrode needs to be electrically connected to the external structure.
  6. 根据权利要求5所述的制备方法,其特征在于,所述阻焊层充满所述通孔,或者所述阻焊层沿所述电极的表面延伸。The manufacturing method according to claim 5, wherein the solder resist layer fills the through hole, or the solder resist layer extends along the surface of the electrode.
  7. 根据权利要求5所述的制备方法,其特征在于,在形成所述阻焊层的步骤之后,所述制备方法进一步包括如下步骤:5. The preparation method according to claim 5, wherein after the step of forming the solder resist layer, the preparation method further comprises the following steps:
    在所述电极的焊点处形成一导电凸块,所述导电凸块用于将所述电极与外部结构电连接。A conductive bump is formed at the solder joint of the electrode, and the conductive bump is used to electrically connect the electrode with an external structure.
  8. 根据权利要求1所述的制备方法,其特征在于,将所述器件衬底与所述支撑衬底键合的方法为低温Si-Si熔融键合、高温Si-Si熔融键合或Si-玻璃阳极键合。The preparation method according to claim 1, wherein the method for bonding the device substrate and the supporting substrate is low-temperature Si-Si fusion bonding, high-temperature Si-Si fusion bonding, or Si-glass Anode bonding.
  9. 一种采用权利要求1~8任意一项所述的制备方法制备的背孔引线式压力传感器,其特征在于,包括:A back hole lead type pressure sensor prepared by using the preparation method of any one of claims 1 to 8, characterized in that it comprises:
    一器件层,所述器件层内设置有多个压阻及多个导电垫,所述导电垫与所述压阻电连接;A device layer, a plurality of piezoresistors and a plurality of conductive pads are arranged in the device layer, and the conductive pads are electrically connected to the piezoresistors;
    一支撑层,与所述器件层键合,所述支撑层具有一凹槽及多个贯穿所述支撑层的通孔,所述凹槽与所述器件层形成一密封腔,所述压阻对应所述密封腔设置,所述导电垫对应所述通孔设置;A support layer is bonded to the device layer, the support layer has a groove and a plurality of through holes penetrating the support layer, the groove and the device layer form a sealed cavity, and the piezoresistance Corresponding to the sealed cavity, and the conductive pad is corresponding to the through hole;
    多个电极,设置在所述支撑层未键合的表面,所述电极沿所述通孔的侧壁延伸,并与所述导电垫电连接。A plurality of electrodes are arranged on the unbonded surface of the support layer, and the electrodes extend along the sidewalls of the through holes and are electrically connected to the conductive pads.
  10. 根据权利要求9所述的背孔引线式压力传感器,其特征在于,所述背孔引线式压力传感器还包括一绝缘层,所述绝缘层设置在所述电极与所述支撑层之间。9. The back hole lead type pressure sensor according to claim 9, wherein the back hole lead type pressure sensor further comprises an insulating layer disposed between the electrode and the support layer.
  11. 根据权利要求9所述的背孔引线式压力传感器,其特征在于,所述背孔引线式压力传感器还包括一导电过渡层,所述导电过渡层设置在所述导电垫表面,所述电极通过所述导电过渡层与所述导电垫电连接。The back hole lead type pressure sensor according to claim 9, characterized in that the back hole lead type pressure sensor further comprises a conductive transition layer, the conductive transition layer is arranged on the surface of the conductive pad, and the electrode passes through The conductive transition layer is electrically connected to the conductive pad.
  12. 根据权利要求9~11任意一项所述的背孔引线式压力传感器,其特征在于,所述背孔引线式压力传感器还包括一阻焊层,所述阻焊层覆盖所述电极并暴露出所述电极需要与外部结构电连接的焊点。The back hole lead type pressure sensor according to any one of claims 9 to 11, wherein the back hole lead type pressure sensor further comprises a solder resist layer, the solder resist layer covering the electrode and exposing The electrodes require solder joints that are electrically connected to the external structure.
  13. 根据权利要求12所述的背孔引线式压力传感器,其特征在于,所述阻焊层充满所述通孔,或者所述阻焊层沿所述电极的表面延伸。The back hole lead type pressure sensor according to claim 12, wherein the solder resist layer fills the through hole, or the solder resist layer extends along the surface of the electrode.
  14. 根据权利要求9~11任意一项所述的背孔引线式压力传感器,其特征在于,所述背孔引线式压力传感器还包括多个导电凸块,所述导电凸块设置在所述电极上,用于将所述电极与外部结构电连接。The back hole lead type pressure sensor according to any one of claims 9 to 11, wherein the back hole lead type pressure sensor further comprises a plurality of conductive bumps, and the conductive bumps are arranged on the electrode , Used to electrically connect the electrode with the external structure.
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