CN108362408A - Pressure sensor and its manufacturing method - Google Patents
Pressure sensor and its manufacturing method Download PDFInfo
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- CN108362408A CN108362408A CN201810190163.9A CN201810190163A CN108362408A CN 108362408 A CN108362408 A CN 108362408A CN 201810190163 A CN201810190163 A CN 201810190163A CN 108362408 A CN108362408 A CN 108362408A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L1/00—Measuring force or stress, in general
- G01L1/14—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
- G01L1/142—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors
- G01L1/148—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors using semiconductive material, e.g. silicon
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Abstract
The present invention relates to a kind of pressure sensor and its manufacturing method, the pressure sensor includes：Substrate；Positioned at the passivation layer of the substrate surface；Positioned at the first time electrode, second time electrode and connection electrode of the passivation layer surface, the connection electrode connects first time electrode and second time electrode；The first top electrode being supported in above first time electrode, the first top electrode constitute inductance capacitance with first time electrode；There is the second top electrode being supported in above second time electrode support portion, the second top electrode to constitute reference capacitance with second time electrode between first top electrode and first time electrode；Cover the insulating layer of first top electrode, the second top electrode.Above method making step is simple, improves technique manufacturability.
Description
Technical field
The present invention relates to MEMS technology field more particularly to a kind of pressure sensor and its manufacturing methods.
Background technology
Pressure sensor is the energy converter for converting pressure signal to electrical signal.
According to the difference of operation principle, pressure sensor is broadly divided into pressure resistance type, condenser type and piezoelectric type etc..Currently,
Piezoresistive pressure sensor is since its manufacturing process and semiconductor technology compatibility are high, manufacturing process is simple, interface circuit is simple
The advantages that, it is the mainstream technology of current pressure sensor.But piezoresistive pressure sensor but has temperature characterisitic poor, sensitivity
It is low, the shortcomings of power consumption is big, it is not appropriate for some low-power consumption and application field with high accuracy.
Many advantages, such as capacitance pressure transducer, size itself is small, at low cost, and good temp characteristic, precision are high, low in energy consumption,
So that capacitance pressure transducer, technology is got growing concern for.Capacitance pressure transducer, is that pressure signal is become electricity
Hold the energy converter of signal.Capacitance pressure transducer, includes variable capacitance, and wherein one or two electrode of variable capacitance is by pressing
Power sensitive membrane is formed, and under ambient pressure effect, the pressure sensitive film as capacitance electrode, which is deformed, causes capacitance gap to be sent out
It is raw to change, it changes so as to cause capacitance, the change of capacitance becomes voltage or electric current by the processing of subsequent conditioning circuit
Signal.Since capacitance pressure transducer, precision is high, temperature stability is good, can be very good to be applied to the related applications such as altimeter
In the middle.
But silicon dioxide sacrificial layer complicated involved in the manufacturing process of the capacitance pressure transducer, of the prior art is emptied
Technique and release aperture is sealed to the technique to form vacuum chamber, processing step is complex, and technique manufacturability is poor.
Invention content
The technical problem to be solved by the invention is to provide a kind of pressure sensor and its manufacturing method, making step letters
It is single, improve technique manufacturability.
To solve the above-mentioned problems, the present invention provides a kind of pressure sensor, including pressure sensing chip, the pressure
Sensing chip includes：Substrate；Positioned at the passivation layer of the substrate surface；Positioned at the passivation layer surface first time electrode,
Two times electrodes and connection electrode, the connection electrode connect first time electrode and second time electrode；It is supported in described first
The first top electrode above lower electrode, the first top electrode constitute inductance capacitance with first time electrode；It is supported on second time electrode
Second top electrode of side has support portion, the second top electrode and second time electricity between first top electrode and first time electrode
Pole constitutes reference capacitance；Cover the insulating layer of first top electrode, the second top electrode.
Optionally, the pressure sensing chip further include positioned at the passivation layer surface around first time electrode,
The peripheral electrode of second time electrode and connection electrode setting.
Optionally, the pressure sensing chip further includes：Through the insulating layer and positioned at first top electrode and the
The first through hole of two upper electrode surfaces；The first metal contact wires of the first through hole are filled, and are located at the insulating layer table
First pad of face and connection first metal contact wires；Through the insulating layer and positioned at the of the peripheral electrode surface
Two through-holes；The second metal contact wires of second through-hole are filled, and positioned at the surface of insulating layer and connection described second
Second pad of metal contact wires, for connecting direct current biasing.
Optionally, the pressure sensing chip includes：Two inductance capacitances, two reference capacitances.
Optionally, the pressure sensing chip further includes：Positioned at the insulating layer, the first top electrode and the second top electrode
The stressor layers on surface.
Optionally, the stressor layers are the composite membrane for including silicon nitride and ethyl orthosilicate.
Optionally, the support portion includes more than two support columns；Or the support portion includes more than two strips
Support bar, described two above strip support bars intersections or arranged in parallel.
Optionally, further include：Circuit board, dedicated IC chip and the leachy metal cap of tool；The special collection
The circuit board surface is adhered to by the first layer of silica gel at circuit chip；The pressure sensing chip is viscous by the second layer of silica gel
Invest the dedicated IC chip surface；The metal cap is located at the circuit board surface, is formed and is held with the circuit board
Receive the cavity of the dedicated IC chip and pressure sensing chip.
To solve the above-mentioned problems, specific implementation mode of the invention also provides a kind of manufacturing method of pressure sensor,
Including forming pressure sensing chip, the method for forming pressure sensing chip further comprises：First substrate is provided；Described first
Substrate surface forms passivation layer；First time electrode, second time electrode and connection electrode are formed in the passivation layer surface, it is described
Connection electrode connects first time electrode and second time electrode；Support portion is formed in second lower electrode surface；There is provided the
Two substrates；Insulating layer is formed in second substrate surface；It is powered in the first top electrode of surface of insulating layer formation, second
Pole；Second substrate is bonded with the first substrate so that first top electrode is located above first time electrode,
First top electrode constitutes inductance capacitance with first time electrode, and second top electrode is located above second time electrode, and second powers on
Pole constitutes reference capacitance with second time electrode；Remove second substrate.
Optionally, while forming first time electrode, second time electrode and connection electrode, formation surrounds described the
The peripheral electrode of electrode, second time electrode and connection electrode setting once.
Optionally, further include：The insulating layer is etched to first top electrode and the second upper electrode surface, forms first
Through-hole；The insulating layer is etched to the peripheral electrode surface, forms the second through-hole；In the first through hole, the second through-hole
Metal material is filled, the first metal contact wires being located in the first through hole, second in second through-hole are formed
Metal contact wires, positioned at the first pad of the surface of insulating layer and connection first metal contact wires, be located at the insulation
Second pad of layer surface and connection second metal contact wires.
Optionally, two inductance capacitances and two reference capacitances are formed.
Optionally, further include：Before being bonded, in the insulating layer, the first top electrode and the second top electrode table
Face forms stress material layer, and is planarized to the stress material layer, formed cover the insulating layer, the first top electrode with
And second top electrode stressor layers.
Optionally, the stressor layers are the composite membrane for including silicon nitride and ethyl orthosilicate.
Optionally, the support portion includes two upper support columns；Or the support portion includes more than two strip branch
Stay, described two above strip support bars intersections or arranged in parallel.
Optionally, further include：Circuit board, dedicated IC chip and the leachy metal cap of tool are provided；Described
Circuit board surface coats the first layer of silica gel, and the dedicated IC chip is placed in the first silica gel layer surface；Described
Dedicated IC chip surface coats the second layer of silica gel, and the pressure sensing chip of formation is placed in the second layer of silica gel table
Face；Electrical connection will be bonded together to form by gold thread between the pressure sensing chip, dedicated IC chip and circuit board；It will
Metal cap is welded in the circuit board surface, is formed with the circuit board and accommodates the dedicated IC chip and pressure sensing
The cavity of chip.：
The manufacturing method of the pressure sensor of the present invention forms groove in the first substrate surface in advance, is used as between capacitance
The upper/lower electrode of gap, capacitance is respectively formed in two substrate surfaces, then by wafer bond techniques, by the first substrate and second
Substrate is bonded together, and capacitance pressure transducer, is consequently formed.The above method avoid load sacrificial layer empty technique with
And release aperture is sealed to the technique to form vacuum chamber, substantially increase the manufacturability of technique.And the present invention is formed simultaneously can
The inductance capacitance of change and fixed reference capacitance, when ambient pressure changes, inductance capacitance changes, and reference capacitance is not
Variation, can be derived that accurate pressure value by data processing.
Description of the drawings
Fig. 1 is the modular structure schematic diagram of the pressure sensor of the embodiment of the invention；
Fig. 2 is the schematic top plan view of the pressure sensing chip of the embodiment of the invention；
Fig. 3 to Figure 16 is the structural schematic diagram of the forming process of the pressure sensor of the embodiment of the invention.
Specific implementation mode
The specific implementation mode of pressure sensor provided by the invention and its manufacturing method is done in detail below in conjunction with the accompanying drawings
Explanation.
Referring to FIG. 1, the modular structure schematic diagram of the pressure sensor 100 for the embodiment of the invention.
The pressure sensor 100 includes a pressure sensing chip 101, dedicated IC chip (ASIC) 102 and defeated
Outgoing interface 103.Pressure sensing chip 101 is MEMS sensor.In the specific implementation mode, the pressure sensing chip 101 is
It is made of 4 bridge arm capacitances, including a pair of of inductance capacitance Cs and a pair of of reference capacitance Cr.When ambient pressure changes,
The inductance capacitance Cs pressure sensitive films of pressure sensing chip 101 deform upon, and inductance capacitance Cs changes, and reference capacitance Cr
Do not change, deltaC/C is exported, by ASIC reading circuits, to export the pressure value under current environment.
Referring to FIG. 2, the schematic top plan view of the pressure sensing chip 200 for the embodiment of the invention.
The pressure sensing chip 200 includes substrate 201, capacitance 202,203,204 and 205, respectively a pair of of induced electricity
Hold and a pair of of reference capacitance.For example, capacitance 202 and capacitance 203 are inductance capacitance Cs, capacitance 204 and capacitance 205 are reference capacitance
Cr；In other specific implementation modes, inductance capacitance and reference capacitance may be other combinations.In the specific implementation mode,
The capacitance 202~204 is arranged in two rows, two column array, in other specific implementation modes of the present invention, the capacitance 202~
204 can also be other spread patterns, such as arrange and arrange in a line four；The capacitance 202~205 can be capacity plate antenna, circle
The capacitance of shape capacitance or other arbitrary shapes, is not limited thereto.It is also formed on the substrate 201 and each capacitance connection
Pad 206 is exported to dedicated IC chip (ASIC) and is examined for being connect with the interface of dedicated IC chip (ASIC)
Survey signal.
~Figure 16 is please referred to Fig.3, is the structure of the forming process of the pressure sensing chip of the embodiment of the invention
Schematic diagram.Specifically, using along the sections A-B of pressure sensing chip 200 as signal.
Referring to FIG. 3, providing the first substrate 300.
First substrate 300 is monocrystalline substrate, and in other specific implementation modes, first substrate 300 may be used also
Think other semi-conducting materials such as SiGe, Ge.
First substrate 300 has first surface 301.
Referring to FIG. 4, forming passivation layer 401 on the first surface 301 of first substrate 300.
Using techniques such as low-pressure chemical vapor deposition or thermal oxides on the first surface 301 of first substrate 300 shape
At the passivation layer 401.Specifically, the material of the passivation layer 401 can be the nitride such as silica or silicon nitride.It is described
Passivation layer 401 is for being isolated the capacitance the first substrate 300 and be subsequently formed.
Fig. 5 a are please referred to, first time electrode 502, second time electrode 503 and connection are formed on 401 surface of the passivation layer
Electrode 504, the connection electrode 504 connect first time electrode 502 and second time electrode 503.
Specifically, the method for formation first time electrode 502, second time electrode 503, connection electrode 504 includes：Institute
Passivation layer 401 surface deposition, one layer of electrode material layer is stated, then forms graphical photoresist layer in the electrode material layer surface
Or Patterned masking layer etches the electrode material then using the graphical photoresist layer or Patterned masking layer as mask
Layer, forms specific figure, including first time electrode 502, second time electrode 503 and connection electrode 504, the connection
Electrode 504 connects first time electrode 502 and second time electrode 503.In the specific implementation mode, first time electrode 502,
Two times electrodes 503 and connection electrode 504 are process, and be same material simultaneously in being generally aligned in the same plane, it is preferred that
It can be DOPOS doped polycrystalline silicon material, there is electric action, play and similarly acted on metal；And polysilicon as with silicon materials
Stress is more easily done when combining in the material being close, and other materials, such as the dielectric materials such as silica or silicon nitride
Match, reduces electrode warps, improve electrode flatness, finally improve the consistency of capacitance size.In other of the present invention
In specific implementation mode, the electrode material layer can also be other conductive materials.
In Fig. 5 a, first time electrode 502 and second time electrode 503 are illustrated only, it is practical referring to FIG. 2, should
In specific implementation mode, there are two first time electrode 502 and two second time electrodes 503 for formation, to be subsequently formed two
Inductance capacitance, two reference capacitances.In other specific implementation modes, more than two inductance capacitances can also be formed, and
The reference capacitance of corresponding number.
In the specific implementation mode, lower electrode of first time electrode 502 as inductance capacitance, second time 503 conduct of electrode
The lower electrode of reference capacitance, connection electrode 504 are inductance capacitance and the respective first time electrode 502 of reference capacitance, second time electricity
The connection electrode of pole 503.
In the specific mode, first time electrode 502, second time electrode are formed etching the electrode material layer
503 and while connection electrode 504, it is also formed and surrounds first time electrode 502, second time electrode 503 and connection electrode 504
The peripheral electrode 501 of setting.There is passivation layer 401 between first time electrode 502, second time electrode 503 and substrate 300,
Therefore it will produce parasitic capacitance.The peripheral electrode 501 subsequently can external direct current biasing, to reduce first time electrode 502, second
Parasitic capacitance between lower electrode 503 and substrate 300.In the specific implementation mode, 501 lopping of peripheral electrode setting, and with the
Once electrode 502, second time electrode 503 are spaced apart.In view of symmetry, the peripheral electrode 501 at be symmetrical arranged, in order to
Convenient for being subsequently bonded, it is desirable that have higher flatness.
Incorporated by reference to reference to figure 5b, Fig. 5 b are the schematic top plan view of Fig. 5 a structures.
The peripheral electrode 501 is located at peripheral region, and first time electrode 502, second time electrode 503 and connect
It is isolated by groove 506 between electrode 504, prevents short circuit；First time electrode 502, second time electricity 503 with connection electrode 504 it
Between have groove 505.The width of the groove 505 and groove 506 may be the same or different.Groove 505 and groove 506
Width can influence chip size, usually can be by the width of groove 505 and groove 506 under the premise of ensureing isolation effect
20 μm~30 μm are limited in, can also be adjusted according to actual conditions.
The connection electrode 504 is between first time electrode 502 and second time electrode 503, by being located at groove
Connecting line 507 in 505 connects.The equivalent width of the length and groove 505 of the connecting line 507, in order to avoid the connection
Line 507 is meticulous, is easy open circuit, and the width of the connecting line 507 is preferable at 20 microns or more.
Fig. 6 a are please referred to, support portion 601' is formed on second time electrode, 503 surface.
In the specific implementation mode, while forming the support portion 601', also in the peripheral electrode 501 and even
504 surface of receiving electrode is respectively formed supporting layer 601 and supporting layer 602.
Specifically, the method for forming the support portion 601' and support portion 602 includes：Form covering passivation layer 401, periphery
Electrode 501,504 surface of first time electrode 502, second time electrode 503 and connection electrode layer of support material；To the support
Material layer is patterned, and forms supporting layer 601, supporting layer 602 and support portion 601'.
The material of the layer of support material can be the dielectric materials such as silica, silicon nitride, and thermal oxide or change may be used
It learns gas-phase deposition and forms the layer of support material.601 size of the supporting layer is less than the size of peripheral electrode 501, described
The size of supporting layer 602 is less than the size of connection electrode 504.The support portion 601' is located at second time electrode of reference capacitance
503 surfaces primarily serve the effect of fixed support, when ambient pressure acts on the presser sensor of reference capacitance and inductance capacitance
In the top electrode of film, i.e. reference capacitance and inductance capacitance, inductance capacitance changes since pressure sensitive film deforms, and refers to
Presence of the capacitance due to support portion 601' so that the pressure sensitive film of reference capacitance part do not deform upon or deformation quantity very
It is small so that can be ignored.Reference capacitance is occurred as soon as in this way not change, and inductance capacitance changes, it is special integrated
Circuit chip (ASIC) will detect the variable quantity of inductance capacitance output signal, by data processing, obtain current air pressure
Value and temperature value.
Fig. 6 b are please referred to, form the top view of second time electrode of electrode 503 under the reference capacitance of support portion 601' for surface.
In the specific implementation mode, the support portion 601' includes the support bar of two right-angled intersection arrangements in a strip shape.
Fig. 6 c are please referred to, are the top view of another embodiment of second time electrode of electrode 503 under the reference capacitance.It should
In specific implementation mode, the support portion 601' is in the form of a column array arrangement.
In other specific described modes of the present invention, support portion 601' is not limited only to above two shaped formation.It is described
Support portion 601' includes two upper support columns；Or the support portion 601' includes more than two strip support bars, described two
A above strip support bar intersection or arranged in parallel.The structure and arranging density of the support portion 601' can be according to described
The size of two times electrodes 503 is configured, so that the pressure sensitive film of finally formed reference capacitance will not be because of ambient pressure
It deforms upon, so that it is guaranteed that the capacitance size of reference capacitance does not change with ambient pressure.
Referring to FIG. 7, providing the second substrate 701, insulating layer is formed on 701 surface of the second substrate.
Second substrate 701 can be Silicon Wafer, can also be the base materials such as glass.
Using chemical vapor deposition method, insulating layer is formed on 701 surface of the second substrate, the specific mode
In, the insulating layer includes positioned at the oxide skin(coating) 702 on 701 surface of the second substrate and positioned at 702 surface of the oxide skin(coating)
Nitride layer 703.Specifically, the oxide skin(coating) 702 can be silicon oxide layer, the nitride layer 703 can be nitridation
Silicon layer.The oxide skin(coating) 702 and nitride layer 703 can be grown according to certain thickness ratio to give birth to according to certain thickness proportion
It is long, to carry out stress adjusting；The insulating layer that the oxide skin(coating) 702 and nitride layer 703 are constituted plays passivation insulation.
In other specific implementation modes of the present invention, the insulating layer can also only include a monolayer material layer, such as
Silicon oxide layer or silicon nitride layer.
Referring to FIG. 8, forming the first top electrode 801, the second top electrode 802 in the surface of insulating layer.
In the specific mode, polysilicon layer is generated in 703 surface deposition of the nitride layer, and etch the polycrystalline
Silicon layer forms top electrode figure, including：First top electrode 801, the top electrode as inductance capacitance；Second top electrode 802 is made
For the top electrode of reference capacitance.First top electrode, 801 and second top electrode 802 uses same material, and first powers on
Pole 801 and the second top electrode 802 are in relative position and the first time electrode 502 of the second substrate 701 and second time electrode 503 the
The relative position of one substrate 300 is consistent, and the area of first time electrode 502, the first top electrode 801 is identical, constitutes induction
Capacitance；Second time electrode 503, the area of the second top electrode 802 are identical, constitute reference capacitance.
It is answered referring to FIG. 9, being formed on the nitride layer 703, the first top electrode 801 and 802 surface of the second top electrode
The dead-wood bed of material 901.
In the specific implementation mode, the stress material layer is the composite membrane of silicon nitride and ethyl orthosilicate (TEOS), is adopted
The stress material layer 901 is formed with low-pressure chemical vapor deposition (LPCVD) technique.The stress material layer 901 mainly rises and adjusts
The effect for saving stress, it is required when the ratio of silicon nitride and ethyl orthosilicate is according to design to answer in the stress material layer 901
Force value selects.
The thickness of the stress material layer 901 be higher than first top electrode under 801 and second top electrode 802 thickness,
So that first time electrode, 801 and second top electrode 802 can be answered masterpiece by the stress material layer 901
With.
In other specific implementation modes, the stress material layer 901 can also be the stacked structure of multilayer material layer, lead to
Cross the stress that quantity, material and thickness of material layer etc. adjusts the stress material layer 901.For example, the stress material layer
901 can be the stacked structure of silicon nitride layer and teos layer, can also be the heap of silicon nitride, silica and silicon oxynitride
Stack structure.
Referring to FIG. 10, being planarized to the stress material layer 901, the formation covering insulating layer, first power on
The stressor layers 1001 of pole 801 and the second top electrode 802.
Due to the presence of first top electrode, 801 and second top electrode 802, the stress material layer 901 that is formed in Fig. 9
Uneven surface, will using chemical mechanical grinding (CMP) technique in the specific implementation mode for the ease of being subsequently bonded
The stress material layer 901 polishes, and forms stressor layers 1001, and the stressor layers 1001 still cover first top electrode 801
With 802 surface of the second top electrode.
1 is please referred to Fig.1, second substrate 701 is bonded with the first substrate 300 so that first top electrode
801 are located at the top of first time electrode 502, the first top electrode 801 and first time composition inductance capacitance of electrode 502, and described the
Two top electrodes 802 are located at second time 503 top of electrode, and the second top electrode 802 and second time electrode 503 constitute reference capacitance.
In the specific implementation mode, by the structure left-hand thread formed in Figure 10 in the structure shown in Fig. 6 a, using silica-
Silica-bound technique is bonded, specifically, the supporting layer 601, supporting layer 602 and support portion 601' and stressor layers
It is bonded by silica-silica bonding technology between 1001, second substrate 701 is supported in the first substrate
300 tops, to form inductance capacitance and reference capacitance.
Also, there is cavity between the first top electrode 801 and first time electrode 502 of the inductance capacitance, described first
When top electrode 801 deforms upon, the capacitance of the inductance capacitance changes.And the second top electrode 802 of the reference capacitance
There is support portion 601' support between second time electrode 503, when ambient pressure changes, second top electrode 802
Will not deform upon, thus can holding capacitor value fix, as with reference to capacitance.
2 are please referred to Fig.1, second substrate 701 is removed.
The second good substrate 701 of para-linkage carries out being thinned to the oxide layer 702 using CMP process, by second base
Bottom 701 completely removes so that and the oxide skin(coating) 702, nitride layer 703 can experience ambient pressure variation, so that the
One top electrode 801 changes with pressure, and the capacitance of inductance capacitance changes therewith.
3 are please referred to Fig.1, the insulating layer is etched to 801 and second top electrode of the first top electrode, 802 surface, is formed
First through hole 1301.
It is sequentially etched the oxide skin(coating) 702, nitride layer 703 to first top electrode, 801 and second top electrode 802
Surface etches the first through hole 1301.
4 are please referred to Fig.1, the insulating layer is etched to 501 surface of the peripheral electrode, forms the second through-hole 1401.
The oxide skin(coating) 702, nitride layer 703, stressor layers 1001 and supporting course 601 are sequentially etched to the periphery
601 surface of electrode forms second through-hole 1401.
5 are please referred to Fig.1, metal material, the metal material are filled in the first through hole 1301, the second through-hole 1401
It can be aluminium or gold etc., deposit etching technics or lift-off techniques may be used, be formed and be located in the first through hole 1301
The first metal contact wires (not identified in figure), the second metal contact wires in second through-hole 1401 (do not mark in figure
Know), positioned at the first pad 1501 and 1502 of 701 surface of the oxide skin(coating) and connection first metal contact wires, be located at
Second pad 1503 of 701 surface of the oxide skin(coating) and connection second metal contact wires.Second pad 1503 exists
In actual product use, for connecing direct current biasing, to reduce parasitic capacitance, the performance of product is improved.First pad 1501 is made
For the output end of the first top electrode 801 of inductance capacitance, the first pad 1502 is that the second top electrode 802 of reference capacitance exports
End, will interconnect with another pair inductance capacitance and reference capacitance (not shown), be formed such as the MEMS pressure sensings in Fig. 1
Capacitance connection structure shown in chip 101.
6 are please referred to Fig.1, circuit board 1601, dedicated IC chip 1603 and the leachy metal cap of tool are provided
1608；The first layer of silica gel 1602 is coated on 1601 surface of the circuit board, the dedicated IC chip 1603 is placed in institute
State 1602 surface of the first layer of silica gel；The second layer of silica gel 1605 is coated on 1603 surface of the dedicated IC chip, will be formed
Pressure sensing chip 1607 be placed in 1605 surface of the second layer of silica gel；By the pressure sensing chip 1607, special integrated
Electrical connection is bonded together to form by gold thread 1606 between circuit chip 1603 and circuit board 1601；Metal cap 1608 is welded in institute
1601 surface of circuit board is stated, is formed with the circuit board 1601 and accommodates the dedicated IC chip 1603 and pressure sense die
The cavity of piece 1607.
In the forming process of above-mentioned pressure sensor, groove is formed in the first substrate surface in advance, is used as capacitance gap,
The upper/lower electrode of capacitance is respectively formed in two substrate surfaces, then by wafer bond techniques, by the first substrate and the second base
Bottom is bonded together, and capacitance pressure transducer, is consequently formed.The above method avoid load sacrificial layer empty technique and
Release aperture is sealed to the technique to form vacuum chamber, substantially increases the manufacturability of technique.
Further, the present invention is formed simultaneously variable inductance capacitance and fixed reference capacitance, when ambient pressure occurs
Variation, inductance capacitance changes, and reference capacitance does not change, and can be derived that accurate pressure value by data processing.
The specific implementation mode of the present invention also provides a kind of pressure sensor, including a pressure sensing chip.
5 are please referred to Fig.1, is the structural schematic diagram of the pressure sensing chip.
The pressure sensing chip includes：Substrate 300；Passivation layer 401 positioned at 300 surface of the substrate；Positioned at described
First time electrode 502 on 401 surface of passivation layer, second time electrode 503 and connection electrode 504, the connection electrode 504 connect institute
State first time electrode 502 and second time electrode 503；It is supported in the first top electrode 801 of first time electrode, 502 top, the
One top electrode 801 and first time electrode 502 constitute inductance capacitance；It is supported in the second top electrode of second time 503 top of electrode
802, there is support portion 601', under the second top electrode 802 and second between second top electrode 802 and second time electrode 503
Electrode 503 constitutes reference capacitance；Cover the insulating layer of first top electrode 801, the second top electrode 802.
In first time electrode 502, second time electrode 503, connection electrode 504 and the first top electrode 801 and second
The material of electrode 803 is polysilicon, and in other specific implementation modes, above-mentioned electrode can also use other conductive materials.It should
In specific implementation mode, lower electrode of first time electrode 502 as inductance capacitance, second time electrode 503 is as with reference to capacitance
Lower electrode, connection electrode 504 are the connections of inductance capacitance and the respective first time electrode 502 of reference capacitance, second time electrode 503
Electrode.In the specific implementation mode, the pressure sensing chip includes that there are two inductance capacitance, two reference capacitances.At other
Can also include more than two inductance capacitances and more than two reference capacitances in specific implementation mode.
In the specific implementation mode, the pressure sensing chip further includes surrounding institute positioned at 401 surface of the passivation layer
State the peripheral electrode 501 that first time electrode 502, second time electrode 503 and connection electrode 504 are arranged.The peripheral electrode 501 is used
In external direct current biasing, to reduce parasitic capacitance.
Fig. 5 b are please referred to, the peripheral electrode 501 is located at peripheral region, with first time electrode 502, second time electrode
It is isolated by groove between 503 and connection electrode 504, prevents short circuit；First time electrode 502, second time electricity 503 and connect electricity
There is groove between pole 504.
The support portion 601' is located at second time electrode, 503 surface of reference capacitance, primarily serves the effect of fixed support,
When ambient pressure acts on the pressure sensitive film of reference capacitance and inductance capacitance, inductance capacitance since pressure sensitive film deforms and
It changes, and reference capacitance is due to the presence of support portion 601' so that shape does not occur for the pressure sensitive film of reference capacitance part
Become or deformation quantity is very small so that can be ignored.In a specific embodiment, the support portion 601' includes
The support bar (please referring to Fig. 6 b) of two right-angled intersection arrangements in a strip shape, in another specific implementation mode, the support portion
601' is in the form of a column array arrangement (please referring to Fig. 6 c), and in other specific described modes of the present invention, support portion 601' is not only limited
In above two shaped formation.The support portion 601' includes two upper support columns；Or the support portion 601' includes two
The above strip support bar, described two above strip support bars intersections or arranged in parallel.The structure of the support portion 601'
And arranging density can be configured according to the size of second time electrode 503, so that finally formed reference capacitance
Pressure sensitive film will not be deformed upon because of ambient pressure, so that it is guaranteed that the capacitance size of reference capacitance does not become with ambient pressure
Change.
In the specific implementation mode, 501 surface of the peripheral electrode also has supporting layer 601,504 table of the connection electrode
Face has supporting layer 602, and the material of the supporting layer 601,602 and support portion 601' can be Jie such as silica, silicon nitride
Material.
The insulating layer includes oxide skin(coating) 702 and nitride layer 703, and the oxide skin(coating) 702 can be silica
Layer, the nitride layer 703 can be silicon nitride layer.The oxide skin(coating) 702 and nitrogen can be grown according to certain thickness ratio
Compound layer 703 is grown according to certain thickness proportion, to carry out stress adjusting；The oxide skin(coating) 702 and nitride layer 703
The insulating layer of composition plays passivation insulation.The insulating layer can also only include a monolayer material layer, such as silicon oxide layer
Or silicon nitride layer.
In the specific implementation mode, the pressure sensing chip further includes：Positioned at the insulating layer, the first top electrode 801
And the stressor layers 1001 on 802 surface of the second top electrode.The stressor layers 1001 are silicon nitride and ethyl orthosilicate (TEOS)
Composite membrane, main to act to adjust stress, the ratio of silicon nitride and ethyl orthosilicate is according to required stress value when designing
To select.In other specific implementation modes, the stressor layers 1001 can also be the stacked structure of multilayer material layer, pass through material
Quantity, material and thickness of the bed of material etc. adjust the stress of the stress material layer 901.For example, the stressor layers 1001 can be with
It is the stacked structure of silicon nitride layer and teos layer, can also be the stacked structure of silicon nitride, silica and silicon oxynitride.
The pressure sensing chip further includes powering on through the insulating layer and positioned at first top electrode 801 and second
The first through hole on 802 surface of pole；Fill the first metal contact wires of the first through hole, and positioned at the surface of insulating layer and
Connect the first pad 1501,1502 of first metal contact wires；Through the insulating layer and it is located at the peripheral electrode table
Second through-hole in face；The second metal contact wires of second through-hole are filled, and positioned at the surface of insulating layer and connection institute
The second pad 1503 for stating the second metal contact wires, for connecting direct current biasing.
6 are please referred to Fig.1, for the structural schematic diagram of the pressure sensor of another specific implementation mode of the present invention.
The pressure sensor includes：Circuit board 1601, dedicated IC chip 1603, pressure sensing chip 1607 with
And has leachy metal cap 1608；The dedicated IC chip 1603 is adhered to the electricity by the first layer of silica gel 1602
Road plate surface；The pressure sensing chip 1607 is adhered to the dedicated IC chip 1603 by the second layer of silica gel 1605
Surface；The metal cap 1608 is located at 1601 surface of the circuit board, is formed with the circuit board 1601 and accommodates the special collection
At the cavity of circuit chip 1603 and pressure sensing chip 1607.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art
Member, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications also should be regarded as
Protection scope of the present invention.
Claims (16)
1. a kind of pressure sensor, including pressure sensing chip, which is characterized in that the pressure sensing chip includes：
Substrate；
Positioned at the passivation layer of the substrate surface；
Positioned at the first time electrode, second time electrode and connection electrode of the passivation layer surface, described in the connection electrode connection
First time electrode and second time electrode；
The first top electrode being supported in above first time electrode, the first top electrode constitute inductance capacitance with first time electrode；
The second top electrode being supported in above second time electrode has support between first top electrode and first time electrode
Portion, the second top electrode constitute reference capacitance with second time electrode；
Cover the insulating layer of first top electrode, the second top electrode.
2. pressure sensor according to claim 1, which is characterized in that the pressure sensing chip further includes positioned at described
The peripheral electrode around first time electrode, second time electrode and connection electrode setting of passivation layer surface.
3. pressure sensor according to claim 2, which is characterized in that the pressure sensing chip further includes：Through institute
State insulating layer and the first through hole positioned at first top electrode and the second upper electrode surface；Fill the first of the first through hole
Metal contact wires, and positioned at the surface of insulating layer and the first pad of connection first metal contact wires；Through described
Insulating layer and the second through-hole for being located at the peripheral electrode surface；The second metal contact wires of second through-hole are filled, and
Positioned at the surface of insulating layer and the second pad of connection second metal contact wires, for connecting direct current biasing.
4. pressure sensor according to claim 1, which is characterized in that the pressure sensing chip includes：
Two inductance capacitances, two reference capacitances.
5. pressure sensor according to claim 1, which is characterized in that the pressure sensing chip further includes：Positioned at institute
State insulating layer, the first top electrode and the second upper electrode surface stressor layers.
6. pressure sensor according to claim 5, which is characterized in that the stressor layers be include silicon nitride and positive silicic acid
The composite membrane of ethyl ester.
7. pressure sensor according to claim 1, which is characterized in that the support portion includes more than two support columns；
Or the support portion includes more than two strip support bars, described two above strip support bars intersect or parallel
Row.
8. pressure sensor according to claim 1, which is characterized in that further include：Circuit board, dedicated IC chip
And the leachy metal cap of tool；The dedicated IC chip is adhered to the circuit board surface by the first layer of silica gel；
The pressure sensing chip is adhered to the dedicated IC chip surface by the second layer of silica gel；The metal cap is located at institute
Circuit board surface is stated, forms the cavity for accommodating the dedicated IC chip and pressure sensing chip with the circuit board.
9. a kind of manufacturing method of pressure sensor, including form pressure sensing chip, which is characterized in that the formation pressure passes
Sense chip further comprises：
First substrate is provided；
Passivation layer is formed in first substrate surface；
First time electrode, second time electrode and connection electrode are formed in the passivation layer surface, the connection electrode connects institute
State first time electrode and second time electrode；
Support portion is formed in second lower electrode surface；
Second substrate is provided；
Insulating layer is formed in second substrate surface；
The first top electrode, the second top electrode are formed in the surface of insulating layer；
Second substrate is bonded with the first substrate so that first top electrode is located on first time electrode
Side, the first top electrode constitute inductance capacitance with first time electrode, and second top electrode is located above second time electrode, on second
Electrode and second time electrode constitute reference capacitance；
Remove second substrate.
10. the manufacturing method of pressure sensor according to claim 9, which is characterized in that forming first time electricity
While pole, second time electrode and connection electrode, formed around first time electrode, second time electrode and connection electrode setting
Peripheral electrode.
11. the manufacturing method of pressure sensor according to claim 10, which is characterized in that further include：It etches described exhausted
Edge layer forms first through hole to first top electrode and the second upper electrode surface；The insulating layer is etched to the periphery electricity
Pole surface forms the second through-hole；Metal material is filled in the first through hole, the second through-hole, is formed logical positioned at described first
The first metal contact wires in hole, the second metal contact wires in second through-hole, be located at the surface of insulating layer and
Connect the first pad of first metal contact wires, positioned at the surface of insulating layer and connection second metal contact wires
Second pad.
12. the manufacturing method of pressure sensor according to claim 9, which is characterized in that formed two inductance capacitances and
Two reference capacitances.
13. the manufacturing method of pressure sensor according to claim 9, which is characterized in that further include：It is carrying out being bonded it
Before, stress material layer is formed in the insulating layer, the first top electrode and the second upper electrode surface, and to the stress material layer
Planarized, formed cover the insulating layer, the first top electrode and the second top electrode stressor layers.
14. the manufacturing method of pressure sensor according to claim 13, which is characterized in that the stressor layers be include nitrogen
The composite membrane of SiClx and ethyl orthosilicate.
15. the manufacturing method of pressure sensor according to claim 9, which is characterized in that the support portion includes two
Upper support column；Or the support portion includes more than two strip support bars, described two above strip support bars intersect
Or it is arranged in parallel.
16. the manufacturing method of pressure sensor according to claim 9, which is characterized in that further include：Offer circuit board,
Dedicated IC chip and the leachy metal cap of tool；The first layer of silica gel is coated in the circuit board surface, it will be described special
It is placed in the first silica gel layer surface with IC chip；The second silica gel is coated on the dedicated IC chip surface
Layer, the second silica gel layer surface is placed in by the pressure sensing chip of formation；By the pressure sensing chip, application-specific integrated circuit
Electrical connection is bonded together to form by gold thread between chip and circuit board；Metal cap is welded in the circuit board surface, and it is described
Circuit board forms the cavity for accommodating the dedicated IC chip and pressure sensing chip.
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