WO2020107577A1 - 显示面板的驱动方法 - Google Patents
显示面板的驱动方法 Download PDFInfo
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- WO2020107577A1 WO2020107577A1 PCT/CN2018/122198 CN2018122198W WO2020107577A1 WO 2020107577 A1 WO2020107577 A1 WO 2020107577A1 CN 2018122198 W CN2018122198 W CN 2018122198W WO 2020107577 A1 WO2020107577 A1 WO 2020107577A1
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- multiplexed signal
- multiplexed
- signal
- display panel
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- 238000000034 method Methods 0.000 title claims abstract description 34
- 239000010409 thin film Substances 0.000 claims description 19
- 238000010586 diagram Methods 0.000 description 9
- 239000004973 liquid crystal related substance Substances 0.000 description 8
- 229910017435 S2 In Inorganic materials 0.000 description 7
- 239000000758 substrate Substances 0.000 description 5
- 230000009286 beneficial effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0439—Pixel structures
- G09G2300/0465—Improved aperture ratio, e.g. by size reduction of the pixel circuit, e.g. for improving the pixel density or the maximum displayable luminance or brightness
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
- G09G2300/0804—Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
- G09G2310/0213—Addressing of scan or signal lines controlling the sequence of the scanning lines with respect to the patterns to be displayed, e.g. to save power
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0297—Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
- G09G2330/023—Power management, e.g. power saving using energy recovery or conservation
Definitions
- the present invention relates to the field of display technology, and in particular to a driving method of a display panel.
- CTR Ray Tube
- liquid crystal display devices which include a liquid crystal display panel and a backlight module.
- the working principle of the LCD panel is based on the thin film transistor array substrate (Thin Film Transistor Array Substrate, TFT Array Substrate) and the color film (Color Filter, CF) liquid crystal molecules are poured between the substrates, and a driving voltage is applied to the two substrates to control the rotation direction of the liquid crystal molecules, so as to refract the light of the backlight module to generate a picture.
- a pixel line has a data line (Data line) and a scan line (Gate line), this approach can control the opening of the gate on each scan line And the input of data on each data line, but as the resolution of the LCD panel increases and the resolution increases, the number of data lines and scanning lines will also increase, along with the fan-out routing of the data lines The area of the occupied area increases, which affects the penetration rate and display effect.
- the multiplexed drive architecture has been widely used, such as 1to6 De-mux drive architecture, the so-called 1to6 De-mux drive architecture refers to the technology that uses the principle of time-division multiplexing to charge 6 columns of pixels with one data signal. Referring to FIG.
- an existing display panel with a 1to6 Dex-mux driving architecture includes a plurality of driving units, and each driving unit includes a plurality of sub-pixels 100 arranged in multiple rows and 12 columns, 12 data lines 200, and multiple One scanning line 300 and two multiplexing modules 400.
- One row of sub-pixels 100 corresponds to one data line 200
- one row of sub-pixels 100 corresponds to one scanning line 300.
- Each multiplexing module 400 includes 6 thin-film transistors T10, and 6 of each multiplexing module 400
- the gates of the thin film transistor T10 are respectively connected to the first multiplexed signal MUX10, the second multiplexed signal MUX20, the third multiplexed signal MUX30, the fourth multiplexed signal MUX40, and the fifth multiplexed signal
- the sources of the six thin film transistors T10 of one of the two multiplexed modules 400 are all connected to the Nth data signal DN, where N is a positive integer and the drain It is respectively connected to the six data lines 200 connected to the odd-numbered sub-pixels 100 in the 12-column sub-pixels 100, and the sources of the other six thin-film transistors T10 in the two multiplexing modules 400 are all connected to the N+1th
- the output ends are respectively connected to six data lines 200 connected to the even-numbered sub-pixels 100 in the 12-col
- the display panel when the display panel is driven, it includes a plurality of frame periods that are sequentially performed, and each frame period includes a plurality of row periods that are sequentially performed, and a plurality of scan lines 300 are sequentially high power in the plurality of row periods.
- the signal MUX50 and the sixth multiplexed signal MUX60 sequentially generate a high-level pulse to control the corresponding thin film transistor T10 to turn on and write the corresponding data signal into the corresponding sub-pixel 100.
- This driving method can reduce the number of data lines.
- the area of the space occupied by the fan-out traces to achieve a narrow border, but each multiplexed signal needs to be changed from low to high and then low again in a row period, and the power consumption is relatively high.
- An object of the present invention is to provide a driving method of a display panel, which can reduce the number of potential changes of a multiplexed signal and reduce power consumption.
- the present invention provides a driving method of a display panel, including the following steps:
- Step S1 Provide a display panel
- the display panel includes multiple driving units; each driving unit includes multiple sub-pixels arranged in multiple rows and 2m columns, 2m data lines, and two multiplexing modules, m is a positive integer greater than 1; one The column sub-pixels are correspondingly connected to one data line; each multiplexing module includes m switching elements, the m switching elements in each multiplexing module are respectively connected to m multiplexing signals, and two multiplexing The input terminals of the m switching elements of one of the multiplexing modules are all connected to the nth data signal, and the output terminals are respectively connected to the m data lines connected to the odd-numbered sub-pixels of the 2m-column sub-pixels, and two multiplexing modules The input terminals of the m switching elements of the other are connected to the n+1th data signal, and the output terminals are respectively connected to m data lines connected to the even-numbered sub-pixels of the 2m-column sub-pixels, and n is a positive integer;
- Step S2 Enter the 2i-1th line cycle
- the m multiplexed signals sequentially generate high-potential pulses according to a preset sequence from the beginning of the 2i-1 line period, and multiplex the last high-potential pulse generated in the 2i-1th line period
- the high potential pulse of the signal lasts until the end of the 2i-1th line period; i is a positive integer;
- Step S3 Enter the 2ith line cycle
- the m multiplexed signals sequentially generate high-potential pulses in the reverse order to the preset order from the beginning of the 2i line period, and multiplex the last high-potential pulse in the 2i line period The high-potential pulse of the signal continues until the end of the 2i-th line period.
- m 6; the control terminals of the six switching elements in each multiplexing module are respectively connected to the first multiplexed signal, the second multiplexed signal, the third multiplexed signal, and the fourth Multiplexed signal, fifth multiplexed signal, sixth multiplexed signal.
- the first multiplexed signal, the second multiplexed signal, the third multiplexed signal, the fourth multiplexed signal, the fifth The multiplexed signal and the sixth multiplexed signal sequentially generate high potential pulses;
- the sixth multiplexed signal, the fifth multiplexed signal, the fourth multiplexed signal, the third multiplexed signal, the second multiplexed sequentially generate high potential pulses.
- the fourth multiplexed signal, the fifth multiplexed signal, the sixth multiplexed signal, the first multiplexed signal, the second The multiplexed signal and the third multiplexed signal sequentially generate high potential pulses;
- the third multiplexed signal, the second multiplexed signal, the first multiplexed signal, the sixth multiplexed signal, the fifth multiplexed sequentially generate high potential pulses.
- step S2 in the 2i-1th line period, the third multiplexed signal, the fourth multiplexed signal, the fifth multiplexed signal, the sixth multiplexed signal, the first The multiplexed signal and the second multiplexed signal sequentially generate high potential pulses;
- the second multiplexed signal, the first multiplexed signal, the sixth multiplexed signal, the fifth multiplexed signal, the fourth multiplexed sequentially generate high potential pulses.
- the second multiplexed signal, the third multiplexed signal, the fourth multiplexed signal, the fifth multiplexed signal, the sixth The multiplexed signal and the first multiplexed signal sequentially generate high potential pulses;
- the first multiplexed signal, the sixth multiplexed signal, the fifth multiplexed signal, the fourth multiplexed signal, the third multiplexed sequentially generate high potential pulses.
- step S2 in the 2i-1th line period, the fifth multiplexed signal, the sixth multiplexed signal, the first multiplexed signal, the second multiplexed signal, the third The multiplexed signal and the fourth multiplexed signal sequentially generate high potential pulses;
- the fourth multiplexed signal, the third multiplexed signal, the second multiplexed signal, the first multiplexed signal, the sixth multiplexed sequentially generate high potential pulses.
- the sixth multiplexed signal, the first multiplexed signal, the second multiplexed signal, the third multiplexed signal, the fourth The multiplexed signal and the fifth multiplexed signal sequentially generate high potential pulses;
- the multiplexed signal and the sixth multiplexed signal sequentially generate high potential pulses.
- the switching element is a thin film transistor, the control end of the switching element is the gate of the thin film transistor, the input end of the switching element is the source of the thin film transistor, and the output end of the switching element is the drain of the thin film transistor.
- the driving unit further includes a plurality of scanning lines; a row of sub-pixels is correspondingly connected to one scanning line;
- the voltage on the scanning line corresponding to the sub-pixel of the p-th row is a high potential, and the voltage on the other scanning lines except the scanning line corresponding to the sub-pixel of the p-th row Is a low potential;
- p is a positive integer;
- step S3 during the 2i-th row period, the voltage on the scanning line corresponding to the sub-pixel in the p+1 row is high, and other scanning lines except the scanning line corresponding to the sub-pixel in the p+1 row The voltage is low.
- m multiplexed signals sequentially generate high-potential pulses in accordance with a preset sequence from the beginning of the 2i-1 line cycle, and the second i-1
- the high-potential pulse of the last multiplexed signal that generates a high-potential pulse within the line period lasts until the end of the 2i-1th line period, and the m multiplexed signals start from the start of the 2i line period in accordance with The high-potential pulses are generated sequentially in the reverse order of the preset order.
- the high-potential pulse of the multiplexed signal that generates the high-potential pulse last in the 2ith line period lasts until the end of the 2ith line period, thereby reducing
- the number of potential changes of the multiplexed signal during the frame period reduces power consumption.
- FIG. 1 is a structural diagram of a display panel of an existing 1to6 Dex-mux driving architecture
- FIG. 2 is a driving timing diagram of the display panel shown in FIG. 1;
- FIG. 3 is a flowchart of a driving method of a display panel of the present invention.
- step S1 of the driving method of the display panel of the present invention is a schematic diagram of step S1 of the driving method of the display panel of the present invention.
- step S2 and step S3 of the first embodiment of the display panel driving method of the present invention are schematic diagrams of step S2 and step S3 of the first embodiment of the display panel driving method of the present invention.
- step S2 and step S3 of the second embodiment of the display panel driving method of the present invention are schematic diagrams of step S2 and step S3 of the second embodiment of the display panel driving method of the present invention.
- step S2 and step S3 of the third embodiment of the display panel driving method of the present invention are schematic diagrams of step S2 and step S3 of the third embodiment of the display panel driving method of the present invention.
- step S2 and step S3 of the fourth embodiment of the display panel driving method of the present invention are schematic diagrams of step S2 and step S3 of the fourth embodiment of the display panel driving method of the present invention.
- step S2 and step S3 of the fifth embodiment of the display panel driving method of the present invention are schematic diagrams of step S2 and step S3 of the fifth embodiment of the display panel driving method of the present invention.
- step S2 and step S3 of the sixth embodiment of the display panel driving method of the present invention are schematic diagrams of step S2 and step S3 of the sixth embodiment of the display panel driving method of the present invention.
- the present invention provides a driving method of a display panel, including the following steps:
- step S1 See the picture 4 To provide a display panel.
- the display panel includes a plurality of driving units.
- Each drive unit includes multiple rows 2m Multiple sub-pixels arranged in columns 10 , 2m Data line 20 , And two multiplexing modules 40 , m Is greater than 1 Positive integer.
- a column of sub-pixels 10 Correspondingly connect a data line 20 .
- Each multiplex module 40 Both include m Switching element 41 , Each multiplexing module 40 middle m Switching element 41 Separate access m Multiplexed signals, two multiplexed modules 40 One of m Switching element 41 Are connected to the input n Data signal Dn , The output is 2m Column subpixel 10 Middle odd column subpixels 10 Connected m Data line 20 Connection, two multiplexing modules 40 Of the other m Switching element 41 Are connected to the input n+1 Data signal Dn+1 , The output is 2m Column subpixel 10 Middle even column subpixels 10 Connected m Data line 20 connection, n It is a positive integer.
- the switching element 41 Thin film transistor T1 the switching element 41 Thin film transistor T1 , Switching element 41 Thin film transistor T1 Gate, switching element 41 Thin film transistor T1 Source, switching element 41 Thin film transistor T1 Drain.
- the driving unit further includes a plurality of scanning lines 30 , A row of subpixels 10 Correspondingly connect a scanning line 30 .
- Each multiplex module 40 middle 6 Switching element 41 The control ends of the MUX1 , The second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 6th multiplexed signal MUX6 .
- step S2 Enter the first 2i-1 Line cycle.
- the steps S2 In 2i-1 Within one line period, the first multiplexed signal MUX1 , The second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 6th multiplexed signal MUX6 In turn, high-potential pulses are generated.
- the steps S2 In 2i-1 Within line periods, the first p Row subpixel 10 Corresponding scan line 30 Voltage on Gp For high potential, except for p Row subpixel 10 Corresponding scan line 30 Scan lines other than 30 The voltage on is low. p It is a positive integer.
- step S3 Enter the first 2i Line cycle.
- the steps S3 In 2i within a line period, the sixth multiplexed signal MUX6 5th multiplexed signal MUX5 , The fourth multiplexed signal MUX4 , The third multiplexed signal MUX3 , The second multiplexed signal MUX2 , The first multiplexed signal MUX1 In turn, high-potential pulses are generated.
- the steps S3 In 2i Within line periods, the first p+1 Row subpixel 10 Corresponding scan line 30 Voltage on Gp+1 For high potential, except for p+1 Row subpixel 10 Corresponding scan line 30 Scan lines other than 30 The voltage on is low.
- the first multiplexed signal MUX1 , The second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 6th multiplexed signal MUX6 Generate high potential pulses in turn, the sixth multiplexed signal MUX6 The high potential pulse of 2i-1 At the end of a line cycle, at 2i Sixth multiplexed signal from the beginning of a line cycle MUX6 5th multiplexed signal MUX5 , The fourth multiplexed signal MUX4 , The third multiplexed signal MUX3 , The second multiplexed signal MUX2 , The first multiplexed signal MUX1 Generate high-potential pulses in sequence, the first multiplexed signal MUX1 The high potential pulse of 2i The end of
- the steps S3 In 2i Within a line period, the third multiplexed signal MUX3 , The second multiplexed signal MUX2 , The first multiplexed signal MUX1 6th multiplexed signal MUX6 5th multiplexed signal MUX5 , The fourth multiplexed signal MUX4 In turn, high-potential pulses are generated. The rest are the same as in the first embodiment, and will not be repeated here.
- the fourth multiplexed signal MUX4 5th multiplexed signal MUX5 6th multiplexed signal MUX6 , The first multiplexed signal MUX1 , The second multiplexed signal MUX2 , The third multiplexed signal MUX3 Generate high-potential pulses in turn, the third multiplexed signal MUX3 The high potential pulse of 2i-1 At the end of a line cycle, at 2i The third multiplexed signal from the beginning of a line period MUX3 , The second multiplexed signal MUX2 , The first multiplexed signal MUX1 6th multiplexed signal MUX6 5th multiplexed signal MUX5 , The fourth multiplexed signal MUX4 Generate high-potential pulses in turn, the fourth multiplexed signal MUX4 The high potential pulse of 2i The end of
- the fourth multiplexed signal MUX4 In section 2i-1 Line cycle and 2i The duration of each line period only needs to be changed once from low potential to high potential and then to low potential, so that within a frame period, the six multiplexed signals change from low to high potential and then to Low potential times are 5 Sub-pixel 10 Compared with the prior art, the number of lines of six multiplexed signals changes from low potential to high potential and then to low potential by about one-sixth, which can effectively reduce power consumption.
- the difference between the third embodiment of the method for driving a display panel of the present invention and the first embodiment described above is that the steps S2 In 2i-1 Within a line period, the third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 6th multiplexed signal MUX6 , The first multiplexed signal MUX1 , The second multiplexed signal MUX2 In turn, high-potential pulses are generated.
- the steps S3 In 2i Within a line period, the second multiplexed signal MUX2 , The first multiplexed signal MUX1 6th multiplexed signal MUX6 5th multiplexed signal MUX5 , The fourth multiplexed signal MUX4 , The third multiplexed signal MUX3 In turn, high-potential pulses are generated. The rest are the same as in the first embodiment, and will not be repeated here.
- the 2i-1 From the beginning of a line cycle, the third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 6th multiplexed signal MUX6 , The first multiplexed signal MUX1 , The second multiplexed signal MUX2 Generate high-potential pulses in turn, the second multiplexed signal MUX2 The high potential pulse of 2i-1 At the end of a line cycle, at 2i The second multiplexed signal from the beginning of a line cycle MUX2 , The first multiplexed signal MUX1 6th multiplexed signal MUX6 5th multiplexed signal MUX5 , The fourth multiplexed signal MUX4 , The third multiplexed signal MUX3 Generate high-potential pulses in turn, the third multiplexed signal MUX3 The high potential pulse of 2i The end of each line cycle
- the difference between the fourth embodiment of the method for driving a display panel of the present invention and the first embodiment described above is that the steps S2 In 2i-1 Within a line period, the second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 6th multiplexed signal MUX6 , The first multiplexed signal MUX1 In turn, high-potential pulses are generated.
- the steps S3 In 2i Within one line period, the first multiplexed signal MUX1 6th multiplexed signal MUX6 5th multiplexed signal MUX5 , The fourth multiplexed signal MUX4 , The third multiplexed signal MUX3 , The second multiplexed signal MUX2 In turn, high-potential pulses are generated. The rest are the same as in the first embodiment, and will not be repeated here.
- the second multiplexed signal MUX2 in the first 2i-1 From the beginning of a line cycle, the second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 6th multiplexed signal MUX6 ,
- the first multiplexed signal MUX1 Generate high-potential pulses in sequence, the first multiplexed signal MUX1 The high potential pulse of 2i-1 At the end of a line cycle, at 2i
- the first multiplexed signal from the beginning of a line cycle MUX1 6th multiplexed signal MUX6 5th multiplexed signal MUX5 ,
- the fourth multiplexed signal MUX4 The third multiplexed signal MUX3 ,
- the second multiplexed signal MUX2 Generate high-potential pulses in turn, the second multiplexed signal MUX2 The high potential pulse of 2
- the difference between the fifth embodiment of the method for driving a display panel of the present invention and the first embodiment described above is that the steps S2 In 2i-1 Within a line period, the fifth multiplexed signal MUX5 6th multiplexed signal MUX6 , The first multiplexed signal MUX1 , The second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 In turn, high-potential pulses are generated.
- the steps S3 In 2i Within a line period, the fourth multiplexed signal MUX4 , The third multiplexed signal MUX3 , The second multiplexed signal MUX2 , The first multiplexed signal MUX1 6th multiplexed signal MUX6 5th multiplexed signal MUX5 In turn, high-potential pulses are generated. The rest are the same as in the first embodiment, and will not be repeated here.
- the fifth multiplexed signal MUX5 6th multiplexed signal MUX6 in the first 2i-1 From the beginning of a line cycle, the fifth multiplexed signal MUX5 6th multiplexed signal MUX6 , The first multiplexed signal MUX1 , The second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 Generate high-potential pulses in turn, the fourth multiplexed signal MUX4 The high potential pulse of 2i-1 At the end of a line cycle, at 2i The fourth multiplexed signal from the beginning of each line period MUX4 , The third multiplexed signal MUX3 , The second multiplexed signal MUX2 , The first multiplexed signal MUX1 6th multiplexed signal MUX6 5th multiplexed signal MUX5 Generate high-potential pulses in sequence, the fifth multiplexed signal MUX5
- the difference between the sixth embodiment of the display panel driving method of the present invention and the first embodiment described above is that the steps S2 In 2i-1 Within a line period, the sixth multiplexed signal MUX6 , The first multiplexed signal MUX1 , The second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 In turn, high-potential pulses are generated.
- the sixth multiplexed signal MUX6 From the beginning of a line cycle, the sixth multiplexed signal MUX6 , The first multiplexed signal MUX1 , The second multiplexed signal MUX2 , The third multiplexed signal MUX3 , The fourth multiplexed signal MUX4 5th multiplexed signal MUX5 Generate high-potential pulses in sequence, the fifth multiplexed signal MUX5 The high potential pulse of 2i-1 At the end of a line cycle, at 2i The fifth multiplexed signal from the beginning of a line period MUX5 , The fourth multiplexed signal MUX4 , The third multiplexed signal MUX3 , The second multiplexed signal MUX2 , The first multiplexed signal MUX1 6th multiplexed signal MUX6 Generate high potential pulses in turn, the sixth multiplexed signal MUX6 The high potential pulse of 2i The end of
- m Multiplexed signals 2i-1 From the beginning of each line cycle, high-potential pulses are generated in order 2i-1 The last high-potential pulse of the multiplexed signal that generates the high-potential pulse lasts until 2i-1
- m Multiplexed signals 2i From the beginning of each line cycle, high-potential pulses are generated in sequence in reverse order to the 2i The last high-potential pulse of the multiplexed signal that generates the high-potential pulse lasts until 2i
- the end time of each line period can reduce the number of potential changes of the multiplexed signal in one frame period and reduce power consumption.
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Abstract
一种显示面板的驱动方法，该驱动方法包括，m个多路复用信号在2i-1个行周期的开始时刻起依照预设顺序依次产生高电位脉冲，在第2i-1个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第2i-1个行周期的结束时刻（S2），m个多路复用信号在2i个行周期的开始时刻起依照与预设顺序相反的顺序依次产生高电位脉冲，在第2i个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第2i个行周期的结束时刻(S3)，从而能够减少一帧周期内多路复用信号的电位变化次数，降低功耗
Description
本发明涉及显示技术领域，尤其涉及一种显示面板的驱动方法。
随着显示技术的发展，液晶显示装置（Liquid Crystal Display，LCD）等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点，已经逐步取代阴极射线管（Cathode
Ray Tube，CRT）显示屏，被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
现有市场上的液晶显示装置大部分为背光型液晶显示装置，其包括液晶显示面板及背光模组（backlight module）。液晶显示面板的工作原理是在薄膜晶体管阵列基板（Thin Film Transistor Array Substrate，TFT Array Substrate）与彩膜（Color
Filter，CF）基板之间灌入液晶分子，并在两片基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
在传统的液晶显示装置的驱动架构中，一个像素电极上分别有一条数据线（Data line）和一条扫描线（Gate line），这种做法可以很好地控制每条扫描线上栅极的打开及每条数据线上数据的输入，但是，随着液晶显示面板的解析度的增加和分辨率的增加，数据线及扫描线的条数也会增加，随之带来数据线的扇出走线所占区域的面积增加，从而影响穿透率及显示效果。为解决这一问题，多路复用的驱动架构得到了广泛的应用，例如1to6
De-mux驱动架构，所谓1to6 De-mux驱动架构是指采用分时复用的原理利用一个数据信号为6列像素进行充电的技术。请参阅图1，现有的一种1to6 Dex-mux驱动架构的显示面板包括多个驱动单元，每一驱动单元包括呈多行12列排布的多个子像素100、12条数据线200、多条扫描线300及两个多路复用模块400。一列子像素100对应连接一条数据线200，一行子像素100对应连接一条扫描线300，每一多路复用模块400均包括6个薄膜晶体管T10，每一多路复用模块400中的6个薄膜晶体管T10的栅极分别接入第一多路复用信号MUX10、第二多路复用信号MUX20、第三多路复用信号MUX30、第四多路复用信号MUX40、第五多路复用信号MUX50及第六多路复用信号MUX60，两个多路复用模块400中的一个的6个薄膜晶体管T10的源极均接入第N个数据信号DN，N为正整数，漏极分别与12列子像素100中奇数列子像素100所连接的6条数据线200连接，两个多路复用模块400中的另一个的6个薄膜晶体管T10的源极均接入第N+1个数据信号DN+1，输出端分别与12列子像素100中偶数列子像素100所连接的6条数据线200连接。请参阅图2，该显示面板进行驱动时包括依次进行的多个帧周期，每一帧周期包括多个依次进行的多个行周期，多条扫描线300依次在多个行周期中为高电平，在每一个行周期内，第一多路复用信号MUX10、第二多路复用信号MUX20、第三多路复用信号MUX30、第四多路复用信号MUX40、第五多路复用信号MUX50及第六多路复用信号MUX60依次产生一高电平脉冲，控制对应的薄膜晶体管T10导通将对应的数据信号写入对应的子像素100中，此种驱动方式能够减少数据线扇出走线所占空间的面积以实现窄边框，但在一个行周期内每一个多路复用信号均需要进行一次由低电位变为高电位再变为低电位，功耗相对较高。
本发明的目的在于提供一种显示面板的驱动方法，能够减少多路复用信号的电位变化次数，降低功耗。
为实现上述目的，本发明提供一种显示面板的驱动方法，包括如下步骤：
步骤S1、提供显示面板；
所述显示面板包括多个驱动单元；每一驱动单元包括呈多行2m列排布的多个子像素、2m条数据线、及两个多路复用模块，m为大于1的正整数；一列子像素对应连接一条数据线；每一多路复用模块均包括m个开关元件，每一多路复用模块中的m个开关元件分别接入m个多路复用信号，两个多路复用模块中的一个的m个开关元件的输入端均接入第n个数据信号，输出端分别与2m列子像素中奇数列子像素所连接的m条数据线连接，两个多路复用模块中的另一个的m个开关元件的输入端均接入第n+1个数据信号，输出端分别与2m列子像素中偶数列子像素所连接的m条数据线连接，n为正整数；
步骤S2、进入第2i-1个行周期；
所述m个多路复用信号在2i-1个行周期的开始时刻起依照预设顺序依次产生高电位脉冲，在第2i-1个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第2i-1个行周期的结束时刻；i为正整数；
步骤S3、进入第2i个行周期；
所述m个多路复用信号在2i个行周期的开始时刻起依照与预设顺序相反的顺序依次产生高电位脉冲，在第2i个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第2i个行周期的结束时刻。
m为6；每一多路复用模块中的6个开关元件的控制端分别接入第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号。
所述步骤S2中，在第2i-1个行周期内，第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号依次产生高电位脉冲；
所述步骤S3中，在第2i个行周期内，第六多路复用信号、第五多路复用信号、第四多路复用信号、第三多路复用信号、第二多路复用信号、第一多路复用信号依次产生高电位脉冲。
所述步骤S2中，在第2i-1个行周期内，第四多路复用信号、第五多路复用信号、第六多路复用信号、第一多路复用信号、第二多路复用信号、第三多路复用信号依次产生高电位脉冲；
所述步骤S3中，在第2i个行周期内，第三多路复用信号、第二多路复用信号、第一多路复用信号、第六多路复用信号、第五多路复用信号、第四多路复用信号依次产生高电位脉冲。
所述步骤S2中，在第2i-1个行周期内，第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号、第一多路复用信号、第二多路复用信号依次产生高电位脉冲；
所述步骤S3中，在第2i个行周期内，第二多路复用信号、第一多路复用信号、第六多路复用信号、第五多路复用信号、第四多路复用信号、第三多路复用信号依次产生高电位脉冲。
所述步骤S2中，在第2i-1个行周期内，第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号、第一多路复用信号依次产生高电位脉冲；
所述步骤S3中，在第2i个行周期内，第一多路复用信号、第六多路复用信号、第五多路复用信号、第四多路复用信号、第三多路复用信号、第二多路复用信号依次产生高电位脉冲。
所述步骤S2中，在第2i-1个行周期内，第五多路复用信号、第六多路复用信号、第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号依次产生高电位脉冲；
所述步骤S3中，在第2i个行周期内，第四多路复用信号、第三多路复用信号、第二多路复用信号、第一多路复用信号、第六多路复用信号、第五多路复用信号依次产生高电位脉冲。
所述步骤S2中，在第2i-1个行周期内，第六多路复用信号、第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号依次产生高电位脉冲；
所述步骤S3中，在第2i个行周期内，第五多路复用信号、第四多路复用信号、第三多路复用信号、第二多路复用信号、第一多路复用信号、第六多路复用信号依次产生高电位脉冲。
所述开关元件为薄膜晶体管，开关元件的控制端为薄膜晶体管的栅极，开关元件的输入端为薄膜晶体管的源极，开关元件的输出端为薄膜晶体管的漏极。
所述驱动单元还包括多条扫描线；一行子像素对应连接一条扫描线；
所述步骤S2中，在第2i-1个行周期内，第p行子像素对应的扫描线上的电压为高电位，除了第p行子像素对应的扫描线以外的其他扫描线上的电压为低电位；p为正整数；
所述步骤S3中，在第2i个行周期内，第p+1行子像素对应的扫描线上的电压为高电位，除了第p+1行子像素对应的扫描线以外的其他扫描线上的电压为低电位。
本发明的有益效果：本发明的显示面板的驱动方法中，m个多路复用信号在2i-1个行周期的开始时刻起依照预设顺序依次产生高电位脉冲，在第2i-1个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第2i-1个行周期的结束时刻， m个多路复用信号在2i个行周期的开始时刻起依照与预设顺序相反的顺序依次产生高电位脉冲，在第2i个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第2i个行周期的结束时刻，从而能够减少一帧周期内多路复用信号的电位变化次数，降低功耗。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的一种1to6 Dex-mux驱动架构的显示面板的结构图；
图2为图1所示的显示面板的驱动时序图；
图3为本发明的显示面板的驱动方法的流程图；
图4为本发明的显示面板的驱动方法的步骤S1的示意图；
图5为本发明的显示面板的驱动方法的第一实施例的步骤S2及步骤S3的示意图；
图6为本发明的显示面板的驱动方法的第二实施例的步骤S2及步骤S3的示意图；
图7为本发明的显示面板的驱动方法的第三实施例的步骤S2及步骤S3的示意图；
图8为本发明的显示面板的驱动方法的第四实施例的步骤S2及步骤S3的示意图；
图9为本发明的显示面板的驱动方法的第五实施例的步骤S2及步骤S3的示意图；
图10为本发明的显示面板的驱动方法的第六实施例的步骤S2及步骤S3的示意图。
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图
3
，本发明提供一种显示面板的驱动方法，包括如下步骤：
步骤
S1
、请参阅图
4
，提供显示面板。
所述显示面板包括多个驱动单元。每一驱动单元包括呈多行
2m
列排布的多个子像素
10
、
2m
条数据线
20
、及两个多路复用模块
40
，
m
为大于
1
的正整数。一列子像素
10
对应连接一条数据线
20
。每一多路复用模块
40
均包括
m
个开关元件
41
，每一多路复用模块
40
中的
m
个开关元件
41
分别接入
m
个多路复用信号，两个多路复用模块
40
中的一个的
m
个开关元件
41
的输入端均接入第
n
个数据信号
Dn
，输出端分别与
2m
列子像素
10
中奇数列子像素
10
所连接的
m
条数据线
20
连接，两个多路复用模块
40
中的另一个的
m
个开关元件
41
的输入端均接入第
n+1
个数据信号
Dn+1
，输出端分别与
2m
列子像素
10
中偶数列子像素
10
所连接的
m
条数据线
20
连接，
n
为正整数。
具体地，所述开关元件
41
为薄膜晶体管
T1
，开关元件
41
的控制端为薄膜晶体管
T1
的栅极，开关元件
41
的输入端为薄膜晶体管
T1
的源极，开关元件
41
的输出端为薄膜晶体管
T1
的漏极。
具体地，所述驱动单元还包括多条扫描线
30
，一行子像素
10
对应连接一条扫描线
30
。
具体地，请参阅图
4
，在本发明的第一实施例中，
m
为
6
。每一多路复用模块
40
中的
6
个开关元件
41
的控制端分别接入第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
。
步骤
S2
、进入第
2i-1
个行周期。
所述
m
个多路复用信号在
2i-1
个行周期的开始时刻起依照预设顺序依次产生高电位脉冲，在第
2i-1
个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第
2i-1
个行周期的结束时刻，
i
为正整数。
具体地，请参阅图
5
，在本发明的第一实施例中，所述步骤
S2
中，在第
2i-1
个行周期内，第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
依次产生高电位脉冲。
具体地，所述步骤
S2
中，在第
2i-1
个行周期内，第
p
行子像素
10
对应的扫描线
30
上的电压
Gp
为高电位，除了第
p
行子像素
10
对应的扫描线
30
以外的其他扫描线
30
上的电压为低电位。
p
为正整数。
步骤
S3
、进入第
2i
个行周期。
所述
m
个多路复用信号在
2i
个行周期的开始时刻起依照与预设顺序相反的顺序依次产生高电位脉冲，在第
2i
个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第
2i
个行周期的结束时刻。
具体地，请参阅图
5
，在本发明的第一实施例中，所述步骤
S3
中，在第
2i
个行周期内，第六多路复用信号
MUX6
、第五多路复用信号
MUX5
、第四多路复用信号
MUX4
、第三多路复用信号
MUX3
、第二多路复用信号
MUX2
、第一多路复用信号
MUX1
依次产生高电位脉冲。
具体地，所述步骤
S3
中，在第
2i
个行周期内，第
p+1
行子像素
10
对应的扫描线
30
上的电压
Gp+1
为高电位，除了第
p+1
行子像素
10
对应的扫描线
30
以外的其他扫描线
30
上的电压为低电位。
需要说明的是，在本发明的第一实施例中，在第
2i-1
个行周期的开始时刻起，第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
依次产生高电位脉冲，第六多路复用信号
MUX6
的高电位脉冲持续至第
2i-1
个行周期的结束时刻，在
2i
个行周期的开始时刻起第六多路复用信号
MUX6
、第五多路复用信号
MUX5
、第四多路复用信号
MUX4
、第三多路复用信号
MUX3
、第二多路复用信号
MUX2
、第一多路复用信号
MUX1
依次产生高电位脉冲，第一多路复用信号
MUX1
的高电位脉冲持续至第
2i
个行周期的结束时刻，从而第一多路复用信号
MUX1
在第
2i-1
个行周期及第
2i
个行周期的持续时间内只需要进行一次由低电位变为高电位再变为低电位，第六多路复用信号
MUX6
在第
2i-1
个行周期及第
2i
个行周期的持续时间内也只需要进行一由低电位变为高电位再变为低电位，使得在一帧周期内，六条多路复用信号总的由低电位变为高电位再变为低电位次数为
5
倍的子像素
10
行数，相比于现有技术，六条多路复用信号总的由低电位变为高电位再变为低电位次数降低约六分之一，从而能够有效的降低功耗。
请结合图
4
及图
6
，本发明的显示面板的驱动方法的第二实施例与上述的第一实施例的区别在于，所述步骤
S2
中，在第
2i-1
个行周期内，第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
、第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
依次产生高电位脉冲。所述步骤
S3
中，在第
2i
个行周期内，第三多路复用信号
MUX3
、第二多路复用信号
MUX2
、第一多路复用信号
MUX1
、第六多路复用信号
MUX6
、第五多路复用信号
MUX5
、第四多路复用信号
MUX4
依次产生高电位脉冲。其余均与第一实施例相同，在此不再赘述。
需要说明的是，在本发明的第二实施例中，在第
2i-1
个行周期的开始时刻起，第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
、第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
依次产生高电位脉冲，第三多路复用信号
MUX3
的高电位脉冲持续至第
2i-1
个行周期的结束时刻，在
2i
个行周期的开始时刻起第三多路复用信号
MUX3
、第二多路复用信号
MUX2
、第一多路复用信号
MUX1
、第六多路复用信号
MUX6
、第五多路复用信号
MUX5
、第四多路复用信号
MUX4
依次产生高电位脉冲，第四多路复用信号
MUX4
的高电位脉冲持续至第
2i
个行周期的结束时刻，从而第三多路复用信号
MUX3
在第
2i-1
个行周期及第
2i
个行周期的持续时间内只需要进行一次由低电位变为高电位再变为低电位，第四多路复用信号
MUX4
在第
2i-1
个行周期及第
2i
个行周期的持续时间内也只需要进行一次由低电位变为高电位再变为低电位，使得在一帧周期内，六条多路复用信号总的由低电位变为高电位再变为低电位次数为
5
倍的子像素
10
行数，相比于现有技术，六条多路复用信号总的由低电位变为高电位再变为低电位次数降低约六分之一，从而能够有效的降低功耗。
请结合图
4
及图
7
，本发明的显示面板的驱动方法的第三实施例与上述的第一实施例的区别在于，所述步骤
S2
中，在第
2i-1
个行周期内，第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
、第一多路复用信号
MUX1
、第二多路复用信号
MUX2
依次产生高电位脉冲。所述步骤
S3
中，在第
2i
个行周期内，第二多路复用信号
MUX2
、第一多路复用信号
MUX1
、第六多路复用信号
MUX6
、第五多路复用信号
MUX5
、第四多路复用信号
MUX4
、第三多路复用信号
MUX3
依次产生高电位脉冲。其余均与第一实施例相同，在此不再赘述。
需要说明的是，在本发明的第三实施例中，在第
2i-1
个行周期的开始时刻起，第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
、第一多路复用信号
MUX1
、第二多路复用信号
MUX2
依次产生高电位脉冲，第二多路复用信号
MUX2
的高电位脉冲持续至第
2i-1
个行周期的结束时刻，在
2i
个行周期的开始时刻起第二多路复用信号
MUX2
、第一多路复用信号
MUX1
、第六多路复用信号
MUX6
、第五多路复用信号
MUX5
、第四多路复用信号
MUX4
、第三多路复用信号
MUX3
依次产生高电位脉冲，第三多路复用信号
MUX3
的高电位脉冲持续至第
2i
个行周期的结束时刻，从而第三多路复用信号
MUX3
在第
2i-1
个行周期及第
2i
个行周期的持续时间内只需要进行一次由低电位变为高电位再变为低电位，第二多路复用信号
MUX2
在第
2i-1
个行周期及第
2i
个行周期的持续时间内也只需要进行一次由低电位变为高电位再变为低电位，使得在一帧周期内，六条多路复用信号总的由低电位变为高电位再变为低电位次数为
5
倍的子像素
10
行数，相比于现有技术，六条多路复用信号总的由低电位变为高电位再变为低电位次数降低约六分之一，从而能够有效的降低功耗。
请结合图
4
及图
8
，本发明的显示面板的驱动方法的第四实施例与上述的第一实施例的区别在于，所述步骤
S2
中，在第
2i-1
个行周期内，第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
、第一多路复用信号
MUX1
依次产生高电位脉冲。所述步骤
S3
中，在第
2i
个行周期内，第一多路复用信号
MUX1
、第六多路复用信号
MUX6
、第五多路复用信号
MUX5
、第四多路复用信号
MUX4
、第三多路复用信号
MUX3
、第二多路复用信号
MUX2
依次产生高电位脉冲。其余均与第一实施例相同，在此不再赘述。
需要说明的是，在本发明的第四实施例中，在第
2i-1
个行周期的开始时刻起，第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
、第六多路复用信号
MUX6
、第一多路复用信号
MUX1
依次产生高电位脉冲，第一多路复用信号
MUX1
的高电位脉冲持续至第
2i-1
个行周期的结束时刻，在
2i
个行周期的开始时刻起第一多路复用信号
MUX1
、第六多路复用信号
MUX6
、第五多路复用信号
MUX5
、第四多路复用信号
MUX4
、第三多路复用信号
MUX3
、第二多路复用信号
MUX2
依次产生高电位脉冲，第二多路复用信号
MUX2
的高电位脉冲持续至第
2i
个行周期的结束时刻，从而第一多路复用信号
MUX1
在第
2i-1
个行周期及第
2i
个行周期的持续时间内只需要进行一次由低电位变为高电位再变为低电位，第二多路复用信号
MUX2
在第
2i-1
个行周期及第
2i
个行周期的持续时间内也只需要进行一次由低电位变为高电位再变为低电位，使得在一帧周期内，六条多路复用信号总的由低电位变为高电位再变为低电位次数为
5
倍的子像素
10
行数，相比于现有技术，六条多路复用信号总的由低电位变为高电位再变为低电位次数降低约六分之一，从而能够有效的降低功耗。
请结合图
4
及图
9
，本发明的显示面板的驱动方法的第五实施例与上述的第一实施例的区别在于，所述步骤
S2
中，在第
2i-1
个行周期内，第五多路复用信号
MUX5
、第六多路复用信号
MUX6
、第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
依次产生高电位脉冲。所述步骤
S3
中，在第
2i
个行周期内，第四多路复用信号
MUX4
、第三多路复用信号
MUX3
、第二多路复用信号
MUX2
、第一多路复用信号
MUX1
、第六多路复用信号
MUX6
、第五多路复用信号
MUX5
依次产生高电位脉冲。其余均与第一实施例相同，在此不再赘述。
需要说明的是，在本发明的第五实施例中，在第
2i-1
个行周期的开始时刻起，第五多路复用信号
MUX5
、第六多路复用信号
MUX6
、第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
依次产生高电位脉冲，第四多路复用信号
MUX4
的高电位脉冲持续至第
2i-1
个行周期的结束时刻，在
2i
个行周期的开始时刻起第四多路复用信号
MUX4
、第三多路复用信号
MUX3
、第二多路复用信号
MUX2
、第一多路复用信号
MUX1
、第六多路复用信号
MUX6
、第五多路复用信号
MUX5
依次产生高电位脉冲，第五多路复用信号
MUX5
的高电位脉冲持续至第
2i
个行周期的结束时刻，从而第四多路复用信号
MUX4
在第
2i-1
个行周期及第
2i
个行周期的持续时间内只需要进行一次由低电位变为高电位再变为低电位，第五多路复用信号
MUX5
在第
2i-1
个行周期及第
2i
个行周期的持续时间内也只需要进行一次由低电位变为高电位再变为低电位，使得在一帧周期内，六条多路复用信号总的由低电位变为高电位再变为低电位次数为
5
倍的子像素
10
行数，相比于现有技术，六条多路复用信号总的由低电位变为高电位再变为低电位次数降低约六分之一，从而能够有效的降低功耗。
请结合图
4
及图
10
，本发明的显示面板的驱动方法的第六实施例与上述的第一实施例的区别在于，所述步骤
S2
中，在第
2i-1
个行周期内，第六多路复用信号
MUX6
、第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
依次产生高电位脉冲。所述步骤
S3
中，在第
2i
个行周期内第五多路复用信号
MUX5
、第四多路复用信号
MUX4
、第三多路复用信号
MUX3
、第二多路复用信号
MUX2
、第一多路复用信号
MUX1
、第六多路复用信号
MUX6
依次产生高电位脉冲。其余均与第一实施例相同，在此不再赘述。
需要说明的是，在本发明的第六实施例中，在第
2i-1
个行周期的开始时刻起，第六多路复用信号
MUX6
、第一多路复用信号
MUX1
、第二多路复用信号
MUX2
、第三多路复用信号
MUX3
、第四多路复用信号
MUX4
、第五多路复用信号
MUX5
依次产生高电位脉冲，第五多路复用信号
MUX5
的高电位脉冲持续至第
2i-1
个行周期的结束时刻，在
2i
个行周期的开始时刻起第五多路复用信号
MUX5
、第四多路复用信号
MUX4
、第三多路复用信号
MUX3
、第二多路复用信号
MUX2
、第一多路复用信号
MUX1
、第六多路复用信号
MUX6
依次产生高电位脉冲，第六多路复用信号
MUX6
的高电位脉冲持续至第
2i
个行周期的结束时刻，从而第五多路复用信号
MUX5
在第
2i-1
个行周期及第
2i
个行周期的持续时间内只需要进行一次由低电位变为高电位再变为低电位，第六多路复用信号
MUX6
在第
2i-1
个行周期及第
2i
个行周期的持续时间内也只需要进行一次由低电位变为高电位再变为低电位，使得在一帧周期内，六条多路复用信号总的由低电位变为高电位再变为低电位次数为
5
倍的子像素
10
行数，相比于现有技术，六条多路复用信号总的由低电位变为高电位再变为低电位次数降低约六分之一，从而能够有效的降低功耗。
综上所述，本发明的显示面板的驱动方法中，
m
个多路复用信号在
2i-1
个行周期的开始时刻起依照预设顺序依次产生高电位脉冲，在第
2i-1
个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第
2i-1
个行周期的结束时刻，
m
个多路复用信号在
2i
个行周期的开始时刻起依照与预设顺序相反的顺序依次产生高电位脉冲，在第
2i
个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第
2i
个行周期的结束时刻，从而能够减少一帧周期内多路复用信号的电位变化次数，降低功耗。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (10)
- 一种显示面板的驱动方法，包括如下步骤：步骤S1、提供显示面板；所述显示面板包括多个驱动单元；每一驱动单元包括呈多行2m列排布的多个子像素、2m条数据线、及两个多路复用模块，m为大于1的正整数；一列子像素对应连接一条数据线；每一多路复用模块均包括m个开关元件，每一多路复用模块中的m个开关元件分别接入m个多路复用信号，两个多路复用模块中的一个的m个开关元件的输入端均接入第n个数据信号，输出端分别与2m列子像素中奇数列子像素所连接的m条数据线连接，两个多路复用模块中的另一个的m个开关元件的输入端均接入第n+1个数据信号，输出端分别与2m列子像素中偶数列子像素所连接的m条数据线连接，n为正整数；步骤S2、进入第2i-1个行周期；所述m个多路复用信号在2i-1个行周期的开始时刻起依照预设顺序依次产生高电位脉冲，在第2i-1个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第2i-1个行周期的结束时刻；i为正整数；步骤S3、进入第2i个行周期；所述m个多路复用信号在2i个行周期的开始时刻起依照与预设顺序相反的顺序依次产生高电位脉冲，在第2i个行周期内最后一个产生高电位脉冲的多路复用信号的高电位脉冲持续至第2i个行周期的结束时刻。
- 如权利要求1所述的显示面板的驱动方法，其中，m为6；每一多路复用模块中的6个开关元件的控制端分别接入第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号。
- 如权利要求2所述的显示面板的驱动方法，其中，所述步骤S2中，在第2i-1个行周期内，第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号依次产生高电位脉冲；所述步骤S3中，在第2i个行周期内，第六多路复用信号、第五多路复用信号、第四多路复用信号、第三多路复用信号、第二多路复用信号、第一多路复用信号依次产生高电位脉冲。
- 如权利要求2所述的显示面板的驱动方法，其中，所述步骤S2中，在第2i-1个行周期内，第四多路复用信号、第五多路复用信号、第六多路复用信号、第一多路复用信号、第二多路复用信号、第三多路复用信号依次产生高电位脉冲；所述步骤S3中，在第2i个行周期内，第三多路复用信号、第二多路复用信号、第一多路复用信号、第六多路复用信号、第五多路复用信号、第四多路复用信号依次产生高电位脉冲。
- 如权利要求2所述的显示面板的驱动方法，其中，所述步骤S2中，在第2i-1个行周期内，第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号、第一多路复用信号、第二多路复用信号依次产生高电位脉冲；所述步骤S3中，在第2i个行周期内，第二多路复用信号、第一多路复用信号、第六多路复用信号、第五多路复用信号、第四多路复用信号、第三多路复用信号依次产生高电位脉冲。
- 如权利要求2所述的显示面板的驱动方法，其中，所述步骤S2中，在第2i-1个行周期内，第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号、第六多路复用信号、第一多路复用信号依次产生高电位脉冲；所述步骤S3中，在第2i个行周期内，第一多路复用信号、第六多路复用信号、第五多路复用信号、第四多路复用信号、第三多路复用信号、第二多路复用信号依次产生高电位脉冲。
- 如权利要求2所述的显示面板的驱动方法，其中，所述步骤S2中，在第2i-1个行周期内，第五多路复用信号、第六多路复用信号、第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号依次产生高电位脉冲；所述步骤S3中，在第2i个行周期内，第四多路复用信号、第三多路复用信号、第二多路复用信号、第一多路复用信号、第六多路复用信号、第五多路复用信号依次产生高电位脉冲。
- 如权利要求2所述的显示面板的驱动方法，其中，所述步骤S2中，在第2i-1个行周期内，第六多路复用信号、第一多路复用信号、第二多路复用信号、第三多路复用信号、第四多路复用信号、第五多路复用信号依次产生高电位脉冲；所述步骤S3中，在第2i个行周期内，第五多路复用信号、第四多路复用信号、第三多路复用信号、第二多路复用信号、第一多路复用信号、第六多路复用信号依次产生高电位脉冲。
- 如权利要求1所述的显示面板的驱动方法，其中，所述开关元件为薄膜晶体管，开关元件的控制端为薄膜晶体管的栅极，开关元件的输入端为薄膜晶体管的源极，开关元件的输出端为薄膜晶体管的漏极。
- 如权利要求1所述的显示面板的驱动方法，其中，所述驱动单元还包括多条扫描线；一行子像素对应连接一条扫描线；所述步骤S2中，在第2i-1个行周期内，第p行子像素对应的扫描线上的电压为高电位，除了第p行子像素对应的扫描线以外的其他扫描线上的电压为低电位；p为正整数；所述步骤S3中，在第2i个行周期内，第p+1行子像素对应的扫描线上的电压为高电位，除了第p+1行子像素对应的扫描线以外的其他扫描线上的电压为低电位。
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| CN109859712A (zh) * | 2019-03-18 | 2019-06-07 | 武汉华星光电技术有限公司 | 显示面板的驱动方法 |
| CN109872678B (zh) * | 2019-04-23 | 2021-10-12 | 昆山国显光电有限公司 | 一种显示面板的驱动方法和显示装置 |
| CN113781948B (zh) * | 2021-09-24 | 2023-11-28 | 武汉华星光电技术有限公司 | 显示面板及显示装置 |
| CN116013191B (zh) * | 2022-12-30 | 2024-02-13 | 北京显芯科技有限公司 | 显示设备 |
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| CN106292096A (zh) * | 2016-10-13 | 2017-01-04 | 武汉华星光电技术有限公司 | 一种De‑mux液晶显示设备及其驱动方法 |
| CN106531096A (zh) * | 2016-11-28 | 2017-03-22 | 武汉华星光电技术有限公司 | Rgbw四基色显示面板的驱动方法 |
| CN108550342A (zh) * | 2018-07-02 | 2018-09-18 | 京东方科技集团股份有限公司 | 数据驱动电路及其驱动方法、阵列基板和显示面板 |
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| CN101216649A (zh) * | 2008-01-10 | 2008-07-09 | 京东方科技集团股份有限公司 | 液晶显示装置阵列基板及驱动方法 |
| CN101216650A (zh) * | 2008-01-14 | 2008-07-09 | 京东方科技集团股份有限公司 | 液晶显示装置阵列基板及驱动方法 |
| JP7141241B2 (ja) * | 2018-05-17 | 2022-09-22 | キヤノン株式会社 | 表示装置 |
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| CN106292096A (zh) * | 2016-10-13 | 2017-01-04 | 武汉华星光电技术有限公司 | 一种De‑mux液晶显示设备及其驱动方法 |
| CN106531096A (zh) * | 2016-11-28 | 2017-03-22 | 武汉华星光电技术有限公司 | Rgbw四基色显示面板的驱动方法 |
| CN108550342A (zh) * | 2018-07-02 | 2018-09-18 | 京东方科技集团股份有限公司 | 数据驱动电路及其驱动方法、阵列基板和显示面板 |
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