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WO2013034075A1 - 电压驱动像素电路及其驱动方法、显示面板 - Google Patents

电压驱动像素电路及其驱动方法、显示面板 Download PDF

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Publication number
WO2013034075A1
WO2013034075A1 PCT/CN2012/081012 CN2012081012W WO2013034075A1 WO 2013034075 A1 WO2013034075 A1 WO 2013034075A1 CN 2012081012 W CN2012081012 W CN 2012081012W WO 2013034075 A1 WO2013034075 A1 WO 2013034075A1
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WIPO (PCT)
Prior art keywords
transistor
driving
voltage
line
gate
Prior art date
Application number
PCT/CN2012/081012
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English (en)
French (fr)
Inventor
吴仲远
王刚
Original Assignee
京东方科技集团股份有限公司
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Priority to US13/698,003 priority Critical patent/US8941309B2/en
Publication of WO2013034075A1 publication Critical patent/WO2013034075A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/60—Circuit arrangements for operating LEDs comprising organic material, e.g. for operating organic light-emitting diodes [OLED] or polymer light-emitting diodes [PLED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements

Definitions

  • the disclosed technical solution relates to a voltage-driven pixel circuit, a driving method thereof, and a display panel. Background technique
  • OLED Organic Electroluminescence Display
  • AMOLED Active Matrix OLED
  • AMOLED uses a thin film transistor (TFT) to construct a pixel circuit to provide a corresponding current for the OLED device.
  • TFT thin film transistor
  • a low temperature polysilicon thin film transistor (LTPS TFT) or an oxide thin film transistor (Oxide TFT) is used.
  • LTPS TFT low temperature polysilicon thin film transistor
  • Oxide TFT oxide thin film transistor
  • amorphous-Si TFTs, a-Si TFTs amorphous-Si TFTs
  • Oxide TFTs have higher mobility and more stable characteristics, and are more suitable for use in AMOLED displays.
  • Oxide TFT has good uniformity of process, but similar to a-Si TFT, its wide-value voltage will drift under long-term pressure and high temperature. Due to different display screens, the threshold value of TFT in each part of the panel is also Different, it will cause a difference in display brightness, and since this difference is related to the previously displayed image, it often appears as an afterimage phenomenon.
  • the backplane power line has a certain resistance
  • the driving current of all pixels is provided by ARVDD
  • the power supply voltage in the backplane near the ARVDD power supply position is compared with the power supply position.
  • the power supply voltage in the far area is high. This phenomenon is called IR Drop.
  • IR Dro Since the voltage of ARVDD is related to the current, IR Dro also causes current differences in different regions, which in turn produces moiré during display. ⁇ Build a pixel list with P-Type TFT
  • the LTPS process is particularly sensitive to this problem because its storage capacitor is connected between the ARVDD and the gate of the TFT.
  • the voltage of the ARVDD changes, which directly affects the Vgs of the driving TFT tube.
  • the OLED device may cause non-uniformity in electrical performance due to uneven film thickness during vapor deposition.
  • a storage capacitor is connected between the gate of the driving TFT and the anode of the OLED, and when the data voltage is transmitted to the gate, if the anode voltage of each pixel is different , the Vgs actually loaded on the TFT are also different, so that the display brightness is different due to the difference in driving current.
  • AMOLEDs can be divided into three categories according to the type of drive: digital, current and voltage.
  • the digital driving method realizes the gray scale by controlling the driving time by using the TFT as a switch, and does not need to compensate for the non-uniformity, but the operating frequency thereof increases exponentially with the increase of the display size, resulting in a large power consumption, and The physical limits of the design are reached within a certain range and are therefore not suitable for large size display applications.
  • the current-driven method realizes gray scale by directly supplying currents of different sizes to the driving tube, which can better compensate TFT non-uniformity and IR Drop, but when writing low-gradation signals, small current is on the data line. Larger parasitic capacitance charging will cause the writing time to be too long.
  • the driving IC provides a voltage signal representing the gray scale.
  • the voltage signal is converted into a current signal of the driving tube inside the pixel circuit, thereby driving the OLED to realize the brightness gray scale.
  • the method has the advantages of fast driving speed and simple realization, and is suitable for driving large-sized panels, and is widely used in the industry.
  • additional TFT and capacitor components are needed to compensate for TFT non-uniformity, IR Dro and OLED non-uniformities.
  • FIG. 1 shows the most traditional voltage-driven pixel circuit structure (2T1C) consisting of two TFT transistors and one capacitor.
  • the switch tube T2 transmits the voltage on the data line to the gate of the driving tube T1, and the driving tube T1 converts the data voltage into a corresponding current supply to the OLED device.
  • the driving tube T1 should be in the saturation region, in one row.
  • a constant current is supplied during the scan time. Its current can be expressed as:
  • Vth non-uniformity and drift but does not compensate for OLED non-uniformity.
  • this structure compensates for the Vth non-uniformity, drift, and OLED non-uniformity of the drive tube T1, but requires six TFTs and one capacitor, and the structure is complicated.
  • this structure can only compensate for the non-uniformity and drift of the driving tube T1, and cannot compensate for the OLED non-uniformity.
  • this structure can compensate for the effects of Vth non-uniformity, drift, and OLED non-uniformity, but requires 5 T2C, which is not easy to achieve high aperture ratio design.
  • the driver circuit can not solve the problem of TFT non-uniformity, IR Dro and OLED non-uniformity.
  • One embodiment of the disclosed technical solution provides a voltage-driven pixel circuit including: a driving transistor, a holding transistor, a switching transistor, a compensation transistor, a storage capacitor, and an OLED device, a gate connection gate line of the switching transistor, a source Connecting a data line, a drain connected to one end of the storage capacitor and a source of the holding transistor for controlling writing of a voltage signal in the data line; a gate of the holding transistor is connected to a first control signal line for controlling its conduction, and a drain is connected to a gate of the driving transistor for holding a gate voltage of the driving transistor;
  • the gate of the compensation transistor is connected to a second control signal line for controlling its conduction, the source is connected to the drain of the driving transistor, and the drain is connected to the gate of the driving transistor;
  • the source of the driving transistor is connected to the other end of the storage capacitor and the anode of the OLED device for driving the OLED device;
  • the drain of the driving transistor and the source of the compensation transistor are both connected to the first power line; the cathode of the OLED device is connected to the second power line.
  • Another embodiment of the disclosed technical solution provides a driving method of the above voltage-driven pixel circuit, comprising the following steps:
  • S3 turning off the switching transistor and the compensation transistor, and turning on the holding transistor and the OLED device, maintaining a gate voltage of the driving transistor, and driving the OLED device to emit light by using a voltage stored in the storage capacitor.
  • Yet another embodiment of the disclosed technical solution provides a display panel including the voltage driven pixel circuit described above.
  • FIG. 1 is a schematic structural view of a conventional voltage-driven pixel circuit
  • FIG. 2 is a schematic structural view of another conventional voltage-driven pixel circuit
  • FIG. 3 is a schematic structural view of another conventional voltage-driven pixel circuit
  • FIG. 4 is a schematic structural view of another conventional voltage-driven pixel circuit
  • FIG. 5 is a schematic structural view of another conventional voltage-driven pixel circuit
  • FIG. 6 is a schematic structural diagram of a voltage driving pixel circuit according to an embodiment of the present invention.
  • FIG. 7 is a driving timing chart of the voltage driving pixel circuit driving method shown in FIG. 6;
  • FIG. 8 is a schematic diagram showing the structure of an equivalent circuit when the voltage driving pixel circuit shown in FIG. 6 operates according to the driving timing chart shown in FIG. 7;
  • Figure 10 is a graph comparing the voltage non-uniformity compensation simulation results of the OLED device of the voltage-driven pixel circuit shown in Figure 6 and the voltage-driven pixel circuit shown in Figure 1. detailed description
  • the voltage-driven pixel circuit includes: four TFT transistors (n-type) and one capacitor and one OLED device, which are a driving transistor 1, a holding transistor 2, a switching transistor 3, a compensation transistor 4, and a storage capacitor, respectively.
  • the OLED device is equivalent in electrical performance to a parallel connection of a light emitting diode and a capacitor COLED.
  • the gate of the switching transistor 3 is connected to the gate line SCAN, the source is connected to the data line VD, and the drain is connected to one end of the storage capacitor 5 and the source of the holding transistor 2 for controlling the writing of the voltage signal in the data line.
  • the gate of the holding transistor 2 is connected to the first control signal line EM, the drain is connected to the gate of the driving transistor 1, for holding the gate voltage of the driving transistor 1, and the first control signal line EM is used for controlling the switching of the holding transistor 2.
  • the gate of the compensation transistor 4 is connected to the second control signal line VC, the source is connected to the drain of the driving transistor 1, the drain is connected to the gate of the driving transistor 1, and the second control signal line VC is used to control the switching of the compensation transistor 4.
  • the source of the driving transistor 1 is connected to the other end of the storage capacitor 5 and the anode of the OLED device 6 for driving the OLED device 6.
  • the drain of the driving transistor 1 and the source of the compensating transistor 4 are both connected to the first power line VP.
  • the cathode of the OLED device 6 is connected to the second power line VN.
  • FIG. 8 is a schematic diagram of an equivalent circuit structure when the voltage driving pixel circuit operates, and the driving method is divided into three phases: an initialization phase, and its main purpose The source N3 point of the driving transistor 1 is precharged to a low level.
  • the equivalent circuit is as shown in (a) of Figure 8, the data line VD, the second power line VN is the high power supply level (ARVDD), and the first power line VP is the low power supply level (ARVSS) due to
  • the OLED device 6 can be equivalent in electrical performance to a parallel connection of a light emitting diode and a capacitor C OLED , so that the OLED device 6 is reversed in turn.
  • the gate line SCAN, the first control signal line EM is at a high switching level (VGH), and the second control signal line VC is at a low switching level (VGL).
  • VD is the data voltage V DATA ( n ) of the current frame (nth frame)
  • VP is the DC reference level (VREF)
  • VN is the high power supply level.
  • ARVDD OLED device 6 remains inverted.
  • SCAN SCAN
  • VC is the high switching level (VGH)
  • EM is the low switching level (VGL).
  • VP is the high power supply level (ARVDD)
  • VN is the low power supply level (ARVSS)
  • the OLED is conducting.
  • SCAN SCAN
  • VC low switching levels (VGL)
  • EM high switching level (VGH)
  • driving transistor 1 and holding transistor 2 are turned on
  • switching transistor 3 and compensation transistor 4 are turned off
  • storage capacitor 5 is connected to driving transistor 1
  • the V GS of the driving transistor 1 is maintained, and the stored charge remains unchanged.
  • Figure 9 shows the simulation results for compensating for the non-uniformity of the threshold voltage.
  • 2T1C is the traditional structure with compensation function.
  • 4T1C is the circuit structure used in the embodiment of the disclosed technical solution.
  • the threshold voltage drifts by ⁇ 0.6V
  • the maximum drift of the OLED current with the conventional 2T1C structure may reach over 90%
  • the 4T1C structure in the embodiment of the disclosed technical solution has an OLED current fluctuation of less than 10%.
  • Figure 10 is a simulation result of compensating for the non-uniformity of the OLED voltage.
  • 2T1C is a conventional structure with compensation.
  • the maximum drift of the OLED current may reach 60%.
  • the 4T1C structure in the embodiment of the technical solution has an OLED current fluctuation of less than 5%.
  • the circuit using the 4T1C structure has a significant improvement over the 2T1C structure in compensating the threshold voltage non-uniformity, drift and OLED non-uniformity, and at the same time, the occupied area is smaller than that of the pixel circuits of other structures. Only 4 TFT tubes and 1 capacitor are needed, which makes it easier to achieve a high aperture ratio.
  • the disclosed technical solution also provides a display panel including the above-described voltage-driven pixel circuit.
  • the voltage driving pixel circuit is formed on the array substrate of the display panel.
  • the array substrate is provided with a plurality of data lines and gate lines.
  • the plurality of data lines and the gate lines define a plurality of voltage driving pixel circuits.
  • the array substrate further includes a driving And a chip, configured to provide a timing signal for the gate line, the data line, the first control signal line, and the second control signal line, and provide a power signal for the first power line and the second power line. Since the display panel uses the above voltage to drive the pixel circuit, the display effect is good, and the image sticking phenomenon is avoided.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)

Abstract

一种电压驱动像素电路、其驱动方法以及包含该电压驱动像素电路的显示面板。该电压驱动像素电路包括：驱动晶体管（1）、保持晶体管（2）、开关晶体管（3）、补偿晶体管（4）、存储电容（5）和OLED器件（6）。该开关晶体管（3）的栅极连接栅线（SCAN），开关晶体管（3）的源极连接数据线（VD），开关晶体管（3）的漏极连接存储电容（5）的一端以及保持晶体管（2）的源极。该保持晶体管（2）的栅极连接第一控制信号线（EM），该第一控制信号线（EM）控制保持晶体管（2）的导通与断开。该保持晶体管（2）的漏极连接驱动晶体管（1）的栅极。该补偿晶体管（4）的栅极连接第二控制信号线（VC），该第二控制信号线（VC）控制补偿晶体管（4）的导通与断开。该补偿晶体管（4）的源极连接驱动晶体管（1）的漏极，补偿晶体管（4）的漏极连接驱动晶体管（1）的栅极。该驱动晶体管（1）的源极连接存储电容（5）的另一端和OLED器件（6）的阳极。该驱动晶体管（1）的漏极和补偿晶体管（4）的源极均连接第一电源线（VP），OLED器件（6）的阴极连接第二电源线（VN）。该驱动电路有效地补偿N型TFT驱动晶体管（1）的阈值电压非均匀性和OLED器件（6）的非均匀性。

Description

电压驱动像素电路及其驱动方法、 显示面板 技术领域
公开的技术方案涉及电压驱动像素电路及其驱动方法、 显示面板。 背景技术
有机发光显示二极管 ( Organic Electroluminesence Display, OLED )作为 一种电流型发光器件已越来越多地被应用于高性能显示中。 传统的无源矩阵 有机发光显示 （ Passive Matrix OLED ) 随着显示尺寸的增大， 需要更短的单 个像素的驱动时间， 因而需要增大瞬态电流， 增加功耗。 同时大电流的应用 会造成 ITO线上压降过大， 并使 OLED工作电压过高， 进而降低其效率。 而 有源矩阵有机发光显示 （Active Matrix OLED, AMOLED )通过开关管逐行 扫描输入 OLED电流， 可以很好地解决这些问题。
但在 AMOLED背板设计中， 存在像素和像素之间的亮度的非均匀性问 题。
首先， AMOLED釆用薄膜晶体管 ( TFT )构建像素电路为 OLED器件提 供相应的电流。 多釆用低温多晶硅薄膜晶体管 （LTPS TFT )或氧化物薄膜晶 体管（ Oxide TFT )。与一般的非晶硅薄膜晶体管（ amorphous-Si TFT, a-Si TFT ) 相比， LTPS TFT和 Oxide TFT具有更高的迁移率和更稳定的特性， 更适合应 用于 AMOLED显示中。 但是由于晶化工艺的局限性， 对于在大面积玻璃基 板上制作的 LTPS TFT, 常常由于诸如阔值电压、 迁移率等电学参数上具有非 均匀性， 这种非均匀性会转化为 OLED显示器件的电流差异和亮度差异， 并 被人眼所感知， 即云紋（mura )现象。 Oxide TFT 虽然工艺的均匀性较好， 但是与 a-Si TFT类似， 在长时间加压和高温下， 其阔值电压会出现漂移， 由 于显示画面不同， 面板各部分 TFT的阔值漂移量也不同， 会造成显示亮度差 异， 由于这种差异与之前显示的图像有关， 因此常呈现为残影现象。
第二， 在大尺寸显示应用中， 由于背板电源线存在一定电阻， 且所有像 素的驱动电流都由 ARVDD提供， 因此在背板中靠近 ARVDD电源供电位置 区域的电源电压相比较离供电位置较远区域的电源电压要高， 这种现象被称 为电阻压降（ IR Drop )。 由于 ARVDD的电压与电流相关， IR Dro 也会造成 不同区域的电流差异， 进而在显示时产生云紋。 釆用 P-Type TFT构建像素单 元的 LTPS 工艺对这一问题尤其敏感，因为其存储电容连接在 ARVDD与 TFT 栅极之间 , ARVDD的电压改变， 会直接影响驱动 TFT管的 Vgs。
第三， OLED器件在蒸镀时由于膜厚不均也会造成电学性能的非均匀性。 对于釆用 N-Type TFT构建像素单元的 a-Si 或 Oxide TFT工艺， 其存储电容 连接在驱动 TFT栅极与 OLED阳极之间， 在数据电压传输到栅极时， 如果各 像素 OLED阳极电压不同， 则实际加载在 TFT上的 Vgs也不同， 从而由于驱 动电流不同造成显示亮度差异。
AMOLED按照驱动类型可以划分为三大类： 数字式、 电流式和电压式。 其中， 数字式驱动方法通过将 TFT作为开关控制驱动时间的方式实现灰阶， 无需补偿非均勾性， 但是其工作频率随显示尺寸增大而成倍上升， 导致很大 的功耗， 并在一定范围内达到设计的物理极限， 因此不适合大尺寸显示应用。 电流式驱动法通过直接提供大小不同的电流给驱动管的方式实现灰阶， 它可 以较好地补偿 TFT非均匀性及 IR Drop, 但是在写入低灰阶信号时， 小电流 对数据线上较大的寄生电容充电会造成写入时间过长， 这一问题在大尺寸显 示中尤其严重并且难以克 电压式驱动方法与传统 AMLCD驱动方法类似， 由驱动 IC提供一个表示灰阶的电压信号，该电压信号会在像素电路内部被转 化为驱动管的电流信号， 从而驱动 OLED实现亮度灰阶， 这种方法具有驱动 速度快， 实现简单的优点， 适合驱动大尺寸面板， 被业界广泛釆用， 但是需 要设计额外的 TFT和电容器件来补偿 TFT非均匀性、 IR Dro 和 OLED非均 匀性。
图 1为最传统的釆用 2个 TFT晶体管， 1个电容组成的电压驱动型像素 电路结构 （2T1C )。 其中开关管 T2将数据线上的电压传输到驱动管 T1的栅 极， 驱动管 T1将这个数据电压转化为相应的电流供给 OLED器件， 在正常 工作时， 驱动管 T1应处于饱和区， 在一行的扫描时间内提供恒定电流。 其电 流可表示为：
1 w 2
I OLED ~ ~2 ^" C。X · · ~ ^oled ~ ^th )
其中 /„为载流子迁移率， C。x为栅氧化层电容， W/L为晶体管宽长比， 为数据电压， fe/为 OLED工作电压， 为所有像素单元共享， 为晶 体管 T1的阔值电压。 由上式可知， 如果不同像素单元之间的 不同， 则电 流存在差异。 如果像素的 随时间发生漂移， 则可能造成先后电流不同， 导 致残影。 且由于 OLED器件非均匀性引起 OLED工作电压不同， 也会导致电 流差异。
面向 Vth非均匀性、 漂移和 OLED非均匀性的像素结构有很多种， 针对 大尺寸， 高分辨率的背板设计， 需要结构简单、 釆用元器件较少的像素电路 结构。
如参考文献 [1]中的结构， 如图 2所示， 这种结构仅可补偿驱动管 T4的
Vth非均匀性和漂移， 但不能补偿 OLED非均匀性。
如参考文献 [2]中的结构， 如图 3所示， 这种结构可补偿驱动管 T1的 Vth 非均匀性、漂移和 OLED非均匀性，但需要 6个 TFT 和 1个电容，结构复杂。
如参考文献 [3]中的结构， 如图 4所示， 这种结构仅可补偿驱动管 T1的 非均匀性和漂移， 不能补偿 OLED非均匀性。
如参考文献 [4]中的结构，如图 5所示，这种结构可以补偿 Vth非均匀性、 漂移和 OLED非均匀性的影响，但是需要 5 T2C ,不易于实现高开口率的设计。
综上所述，在 AMOLED像素结构设计中，驱动电路无法很好地解决 TFT 非均匀性、 IR Dro 和 OLED非均匀性问题。
参考文献如下：
[1] "A New a-Si:H Thin-Film Transistor Pixel Circuit for Active-Matrix Organic Light-Emitting Diodes" IEEE ELECTRON DEVICE LETTERS, VOL. 24, NO. 9, SEPTEMBER 2003.
[2] "A New a-Si:H TFT Pixel Circuit Compensating the Threshold Voltage Shift of a-Si:H TFT and OLED for Active Matrix OLED" IEEE ELECTRON DEVICE LETTERS, VOL. 26, NO. 12, DECEMBER 2005.
[3] "A New Pixel Circuit for Active Matrix Organic Light Emitting Diodes" IEEE ELECTRON DEVICE LETTERS, VOL. 23, NO. 9, SEPTEMBER 2002.
[4] "Amorphous Oxide TFT Backplane for Large Size AMOLED TVs" SID 2010. 发明内容
公开的技术方案的一个实施例提供了一种电压驱动像素电路， 包括： 驱 动晶体管、 保持晶体管、 开关晶体管、 补偿晶体管、 存储电容和 OLED器件， 所述开关晶体管的栅极连接栅线， 源极连接数据线， 漏极连接所述存储电容 的一端和所述保持晶体管的源极， 用于控制数据线中的电压信号的写入； 所述保持晶体管的栅极连接用于控制其导通的第一控制信号线， 漏极连 接所述驱动晶体管的栅极， 用于保持所述驱动晶体管的栅极电压；
所述补偿晶体管的栅极连接用于控制其导通的第二控制信号线， 源极连 接所述驱动晶体管的漏极， 漏极连接所述驱动晶体管的栅极；
所述驱动晶体管的源极连接存储电容的另一端和所述 OLED器件的阳极， 用于驱动所述 OLED器件；
所述驱动晶体管的漏极和补偿晶体管的源极均连接第一电源线； 所述 OLED器件的阴极连接第二电源线。
公开的技术方案的另一个实施例提供了一种上述电压驱动像素电路的驱 动方法， 包括以下步骤：
S1 : 导通所述驱动晶体管、 保持晶体管和开关晶体管， 反向截止所述 OLED器件， 使所述驱动晶体管的源极预充至低电平；
S2: 导通所述补偿晶体管， 关断所述保持晶体管， 为所述存储电容预充 入用于补偿所述驱动晶体管的阔值电压的电压；
S3:关断所述开关晶体管和补偿晶体管，并导通所述保持晶体管和 OLED 器件， 保持所述驱动晶体管的栅极电压， 利用存储在所述存储电容中的电压 驱动所述 OLED器件发光。
公开的技术方案的又一个实施例提供了一种显示面板， 包括上述的电压 驱动像素电路。 附图说明
图 1是现有的一种电压驱动像素电路的结构示意图；
图 2是现有的另一种电压驱动像素电路的结构示意图；
图 3是现有的另一种电压驱动像素电路的结构示意图；
图 4是现有的另一种电压驱动像素电路的结构示意图；
图 5是现有的另一种电压驱动像素电路的结构示意图；
图 6是本发明实施例的一种电压驱动像素电路的结构示意图；
图 7是图 6所示的电压驱动像素电路驱动方法的驱动时序图；
图 8是图 6所示的电压驱动像素电路按图 7所示的驱动时序图工作时的等 效电路结构示意图；
图 9是图 6所示的电压驱动像素电路和图 1所示的电压驱动像素电路的 TFT阔值电压非均匀性补偿模拟结果比较曲线图；
图 10是图 6所示的电压驱动像素电路和图 1所示的电压驱动像素电路的 OLED器件电压非均匀性 卜偿模拟结果比较曲线图。 具体实施方式
下面结合附图和实施例， 对本发明的具体实施方式作进一步详细描述。 以下实施例用于说明本发明， 但不用来限制本发明的范围。
如图 6所示， 电压驱动像素电路包括： 4个 TFT晶体管 （n型）和 1个电容 和 1个 OLED器件， 分别是驱动晶体管 1、 保持晶体管 2、 开关晶体管 3、 补偿晶 体管 4、 存储电容 5和 OLED器件 6, OLED器件在电学性能上等效一个发光二 极管和电容 COLED的并联。
开关晶体管 3的栅极连接栅线 SCAN, 源极连接数据线 VD, 漏极连接存储 电容 5的一端和保持晶体管 2的源极， 用于控制数据线中的电压信号的写入。 保持晶体管 2的栅极连接第一控制信号线 EM, 漏极连接驱动晶体管 1的栅极， 用于保持驱动晶体管 1的栅极电压，第一控制信号线 EM用于控制保持晶体管 2 的通断。 补偿晶体管 4的栅极连接第二控制信号线 VC, 源极连接驱动晶体管 1 的漏极， 漏极连接驱动晶体管 1的栅极， 第二控制信号线 VC用于控制补偿晶 体管 4的通断。驱动晶体管 1的源极连接存储电容 5的另一端和 OLED器件 6的阳 极， 用于驱动 OLED器件 6。 驱动晶体管 1的漏极和补偿晶体管 4的源极均连接 第一电源线 VP。 OLED器件 6的阴极连接第二电源线 VN。
如图 7所示， 为上述电压驱动像素电路驱动方法的驱动时序图， 图 8为电 压驱动像素电路工作时的等效电路结构示意图， 驱动方法共分为三个阶段： 初始化阶段， 其主要目的是使驱动晶体管 1的源极 N3点预充至低电平。 在初始化阶段， 等效电路如图 8中 （a ) 所示， 数据线 VD, 第二电源线 VN为高电源电平 （ARVDD ), 第一电源线 VP为低电源电平 （ARVSS ), 由 于 OLED器件 6在电学性能上可等效为一个发光二极管和电容 COLED的并联， 因此 OLED器件 6反相截止。 栅线 SCAN、 第一控制信号线 EM为高开关电 平 （VGH ), 第二控制信号线 VC为低开关电平 （VGL )。 此时， 保持晶体管 2和开关晶体管 3导通， 补偿晶体管 4关断， 电路 N1和 N2点经保持晶体管 2和开关晶体管 3向 N1点传输高电源电平 ARVDD ,开启驱动晶体管 1使 N3 点放电至 ARVSS。 补偿阶段， 等效电路如图 8中 （b)所示， VD为当前帧 （第 n帧） 的数 据电压 VDATA( n )、 VP为直流参考电平（ VREF ), VN为高电源电平（ ARVDD ), OLED器件 6保持反相截止。 SCAN、 VC为高开关电平（VGH), EM为低开 关电平 （VGL)。 在这个阶段， 由于电容 5的自举效应， 当 VD变为 VDATA(n) 时， N3点的电压变为负的 VDATA(n) - ARVDD + ARVSS, 由于 VREF > 0 , 且 驱动晶体管 1形成二极管导通连接， 电流自 VREF向 N3点充电， 直至 N3点 电压升高至 VREF- Vth, 使驱动晶体管 1截止， 在补偿阶段结束时， 存储在 存储电容 5两端的电荷为 (VREF - Vth - VDATA(n))-CsT, CST为存储电容的电容 值。
保持发光阶段， 等效电路如图 8中 （c) 所示， 在这个阶段， VP为高电 源电平（ARVDD), VN为低电源电平 （ARVSS), OLED正向导通。 SCAN、 VC为低开关电平（VGL), EM为高开关电平（ VGH), 驱动晶体管 1和保持 晶体管 2导通， 开关晶体管 3和补偿晶体管 4关断， 存储电容 5连接在驱动 晶体管 1的栅极和源极之间， 保持驱动晶体管 1的 VGS, 其存储的电荷保持 不变， 随着 OLED器件 6的电流趋于稳定， N3点电压变为 VOLED, 由于存储 电容 5的自举效应， N1和 N2点电压变为 V0LED+VDATA(n) - VREF+Vth。保持 驱动晶体管 1的 VGS保持为 VDATA(n) - VREF+Vth, 此时流过驱动晶体管 1的 电流为：
IOLEO = -βη-0οχ- - [VDATA (") - VREF + Vthn― Vth]2 = ~ n-Cox- --[VDATA(n)-VREFf
其中 /„为载流子迁移率， C。x为栅氧化层电容， W/L为晶体管宽长比， 由上式可知， 其电流与阔值电压和 OLED两端的电压无关， 因此基本消除了 阔值电压非均匀性、 漂移以及 OLED电气性能非均匀性的影响。
图 9所示为补偿阔值电压非均匀性的模拟结果， 2T1C为带补偿功能的 传统结构， 4T1C为公开的技术方案的实施例釆用的电路结构， 二种结构中驱 动管宽长比釆用相同 W/L=30/10, 模拟仿真时釆用相同的 TFT模型。 当阔值 电压漂移 ±0.6V时， 釆用传统 2T1C结构 OLED电流最大漂移可能达到 90% 以上，而公开的技术方案的实施例中的 4T1C结构， OLED电流波动小于 10%。 图 10为补偿 OLED电压非均匀性的模拟结果， 2T1C为带补偿的传统结构， 当 OLED工作电压漂移 ±0.45V, OLED电流最大漂移可能达到 60%, 而公开 的技术方案的实施例中的 4T1C结构， OLED电流波动小于 5%。
由此可见，釆用 4T1C结构的电路在补偿阔值电压非均匀性、漂移和 OLED 非均匀性上相对于 2T1C结构有明显改善， 同时相比较同类其他结构的像素电 路， 其占用面积更小， 只需要 4个 TFT管和 1个电容， 更易实现高开口率。
公开的技术方案还提供了一种显示面板， 包括上述的电压驱动像素电路。 该电压驱动像素电路形成在所述显示面板的阵列基板上， 阵列基板上设置有 多条数据线和栅线， 多条数据线和栅线限定了多个电压驱动像素电路； 阵列 基板还包括驱动芯片， 用于为所述栅线、 数据线、 第一控制信号线和第二控 制信号线提供时序信号， 为第一电源线和第二电源线提供电源信号。 由于该 显示面板釆用上述的电压驱动像素电路， 因此显示效果好， 避免了残影现象。
以上实施方式仅用于说明本发明， 而并非对本发明的限制， 有关技术领 域的普通技术人员， 在不脱离本发明的精神和范围的情况下， 还可以做出各 种变化和变型， 因此所有等同的技术方案也属于本发明的范畴， 本发明的专 利保护范围应由权利要求限定。

Claims

权 利 要 求 书
1、 一种电压驱动像素电路， 包括： 驱动晶体管、 保持晶体管、 开关晶体 管、 补偿晶体管、 存储电容和 OLED器件，
所述开关晶体管的栅极连接栅线， 源极连接数据线， 漏极连接所述存储 电容的一端和所述保持晶体管的源极，用于控制数据线中的电压信号的写入； 所述保持晶体管的栅极连接用于控制其导通的第一控制信号线， 漏极连 接所述驱动晶体管的栅极， 用于保持所述驱动晶体管的栅极电压；
所述补偿晶体管的栅极连接用于控制其导通的第二控制信号线， 源极连 接所述驱动晶体管的漏极， 漏极连接所述驱动晶体管的栅极；
所述驱动晶体管的源极连接存储电容的另一端和所述 OLED器件的阳极， 用于驱动所述 OLED器件；
所述驱动晶体管的漏极和补偿晶体管的源极均连接第一电源线； 所述 OLED器件的阴极连接第二电源线。
2、一种如权利要求 1所述的电压驱动像素电路的驱动方法， 包括以下步 骤：
S1 : 导通所述驱动晶体管、 保持晶体管和开关晶体管， 反向截止所述 OLED器件， 使所述驱动晶体管的源极预充至低电平；
S2: 导通所述补偿晶体管， 关断所述保持晶体管， 为所述存储电容预充 入用于补偿所述驱动晶体管的阔值电压的电压；
S3:关断所述开关晶体管和补偿晶体管，并导通所述保持晶体管和 OLED 器件， 保持所述驱动晶体管的栅极电压， 利用存储在所述存储电容中的电压 驱动所述 OLED器件发光。
3、 如权利要求 2所述的电压驱动像素电路的驱动方法， 所述步骤 S1具 体包括：
输入高电源电平至所述数据线和第二电源线， 输入高开关电平至所述第 一控制信号线和栅线， 导通所述保持晶体管、 开关晶体管和驱动晶体管， 所 述第二控制信号线输入低开关电平， 关断所述补偿晶体管， 所述第一电源线 接低电源电平， 使所述 OLED器件截止， 并将所述驱动晶体管的源极放电至 所述低电源电平。
4、 如权利要求 2所述的电压驱动像素电路的驱动方法， 所述步骤 S2具 体包括：
改变所述数据线电压至当前帧的数据电压， 所述第一电源线输入直流参 考电平， 所述第一控制信号线输入低开关电平， 关断所述保持晶体管， 所述 第二控制信号线输入高开关电平， 导通所述补偿晶体管， 使所述存储电容预 充入用于补偿所述驱动晶体管的阔值电压的电压。
5、 如权利要求 2所述的电压驱动像素电路的驱动方法， 步骤 S3具体包 括：
所述栅线和第二控制信号线输入低开关电平， 关断所述开关晶体管和补 偿晶体管， 所述第一控制信号线输入高开关电平， 导通所述保持晶体管， 所 述第一电源线接高电源电平，所述第二电源线接低电源电平，导通所述 OLED
6、 一种显示面板， 包括权利要求 1所述的电压驱动像素电路。
7、 如权利要求 6所述的显示面板， 其中， 所述电压驱动像素电路形成在 所述显示面板的阵列基板上， 所述阵列基板上设置有多条数据线和栅线， 所 述多条数据线和栅线限定了多个所述的电压驱动像素电路； 所述阵列基板还 包括驱动芯片， 用于为所述栅线、 数据线、 第一控制信号线和第二控制信号 线提供时序信号， 为所述第一电源线和第二电源线提供电源信号。
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