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WO2007076730A1 - GaN-BASED OPTOELECTRONIC DEVICE AND METHOD OF MANUFACTURE THE SAME - Google Patents

GaN-BASED OPTOELECTRONIC DEVICE AND METHOD OF MANUFACTURE THE SAME Download PDF

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Publication number
WO2007076730A1
WO2007076730A1 PCT/CN2007/000065 CN2007000065W WO2007076730A1 WO 2007076730 A1 WO2007076730 A1 WO 2007076730A1 CN 2007000065 W CN2007000065 W CN 2007000065W WO 2007076730 A1 WO2007076730 A1 WO 2007076730A1
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Prior art keywords
layer
optoelectronic device
layers
doped
buffer layer
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PCT/CN2007/000065
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French (fr)
Chinese (zh)
Inventor
Chunhui Yan
Zhiguo Xiao
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Dalian Luming Science & Technology Group Co., Ltd.
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Publication of WO2007076730A1 publication Critical patent/WO2007076730A1/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/815Bodies having stress relaxation structures, e.g. buffer layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02455Group 13/15 materials
    • H01L21/02458Nitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02538Group 13/15 materials
    • H01L21/0254Nitrides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment
    • H10H20/011Manufacture or treatment of bodies, e.g. forming semiconductor layers
    • H10H20/013Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials
    • H10H20/0133Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials
    • H10H20/01335Manufacture or treatment of bodies, e.g. forming semiconductor layers having light-emitting regions comprising only Group III-V materials with a substrate not being Group III-V materials the light-emitting regions comprising nitride materials

Definitions

  • the present invention relates to the fabrication of GaN-based optoelectronic devices in a broad sense and related M0CVD growth techniques, particularly the fabrication of light-emitting diodes. Background technique
  • a conventional light emitting diode includes a sapphire substrate (100) and a set of epitaxial layers grown thereon using M0CVD techniques. These epitaxial layers are composed of the following five layers: a low temperature buffer layer (110), a heavily doped N-type GaN layer (120), an active region (130) composed of a quantum well structure, An AlGaN confinement layer (140), and a P-type GaN layer (150).
  • the N-type GaN layer is an important layer, and it mainly functions in the following three aspects.
  • the N-type GaN layer is the "ground” layer that was originally grown, the crystal quality of the N-type GaN layer directly affects the performance of subsequent layers. Therefore a high quality residual stress-free N-type GaN layer for high performance Light-emitting diodes are essential.
  • the critical thickness Since the stress is gradually accumulated during the growth process, when the thickness of the film reaches a certain value, also called the critical thickness, excessive stress will break the crystal bond, resulting in the occurrence of misfit dislocations and the film. Cracked. More seriously, if the doping concentration of the N-type GaN layer is high, such as doping with Si or other impurities, these substitutional impurity atoms will cause further changes in the lattice size, thereby causing the crack to deteriorate, in other words Generally speaking, heavily doped N-type GaN has a smaller critical thickness than an undoped GaN layer.
  • the heavily doped thicker N-type GaN layer is much more likely to crack than the thinner layer. This situation becomes especially serious if the impurity is Si (the Si atom radius is 30% smaller than the Ga atom it replaces). Under normal circumstances, if the doping concentration of Si is about 5xl 0 18 cm- 3 , the N-type GaN layer can be as long as 2 to 3 ⁇ m without cracking.
  • the critical thickness is also strongly dependent on the growth temperature. The higher the temperature, the smaller the critical thickness.
  • Conventional means for reducing cracking include appropriately reducing the doping concentration of silicon, lowering the growth temperature of the N-type GaN layer, and reducing the thickness of the N-type GaN layer.
  • the disadvantage of reducing the doping concentration is that the resistance of the N-type GaN layer is increased, thereby increasing the forward operating voltage Vf .
  • reducing the thickness of N-type GaN is also very different from the benefits of the thick N-type GaN layer we mentioned earlier. Decreasing the growth temperature of the N-type GaN layer leads to a decrease in electron mobility and an increase in the forward operating voltage.
  • the process direction should be selected for high temperature growth, thick N-type GaN and high doping concentration.
  • This invention specifically addresses and addresses the potential problems previously raised with the advantages of heavily doped thick N-type GaN in current GaN-based optoelectronic device fabrication processes.
  • the present invention includes devices for growing gallium nitride based using M0VPE technology, and are particularly suitable for use in the fabrication of light emitting diode (LED) devices.
  • the device structure includes a substrate, a low temperature buffer layer, an N-type GaN layer, a quantum well active layer, a P-type AlGaN confinement layer, and a P-type GaN layer.
  • the use of a low temperature buffer layer greatly improves the performance of the device, especially for light emitting diodes that use thicker, high temperature grown heavily doped N-type GaN layers. To further improve the yield and reliability of the protection.
  • the present invention relates to an optoelectronic device comprising a substrate and an epitaxial layer, wherein the epitaxial layer comprises: a buffer layer grown on the substrate, an N-type GaN layer grown on the buffer layer, An active layer including a single quantum well or a multiple quantum well over the N-type GaN layer, a P-type AlGaN confinement layer over the active layer, and a P-type GaN layer over the P - -type AlGaN confinement layer, characterized In that the buffer layer consists of one or more layers of doped or undoped In x G ai - x N layers and/or doped or undoped Al y G ai — y N layers, or The buffer layer is AUn b Ga.
  • the present invention is also directed to a method of fabricating the above-described optoelectronic device, characterized in that the epitaxial layer is grown on a substrate by a MOVPE technique, wherein the buffer layer has a growth temperature of 400 to 800°. C; N-type GaN has a growth temperature of 800 ° C to 1300 ° C.
  • Figure 1 is a schematic cross-sectional view of a conventional gallium nitride based light emitting diode device having a low temperature single layer buffer layer.
  • Fig. 2 is a schematic cross-sectional view showing a novel gallium nitride based light emitting diode device having a low temperature composite buffer layer.
  • FIGS. 3A and 3B are schematic cross-sectional views of a first type of low temperature composite buffer layer. It includes AlyGanN/InxGa X N Attached to the side of the substrate) Two-layer structure. Figure 3A is undoped, and Figure 3B is doped (X).
  • FIGS. 4A and 4B are schematic cross-sectional views showing a cyanide type low temperature composite buffer layer. it includes Attached to the side of the substrate) Two-layer structure. Figure 4A is undoped, and Figure 4B includes doping (X). 5A and 5B show a phase contrast micrograph of a thick N-GaN example based on a first type of low temperature composite buffer layer structure. detailed description
  • the present invention is not only applicable to the fabrication of light-emitting diodes, but also to the fabrication of devices in various other aspects.
  • the present invention can be used to enhance the performance and reliability of other Ga-based devices, including high power microwave devices and ultra high power switching devices.
  • the main object of the present invention is to obtain a sufficiently thick high-quality N-type GaN layer by using a novel pre-grown composite low-temperature buffer layer to achieve the purpose of reducing the defect density and preventing cracking.
  • These buffer layers grown at relatively low temperatures 400 ° C to 800 ° C) can effectively release the stresses accumulated by themselves, thereby providing a growth substrate with almost no residual stress and near lattice matching for subsequent needs.
  • the low temperature buffer layer mentioned in the present invention is directly grown on a substrate, such as blue Gem substrate.
  • This layer may be composed of one or more layers of AlyGa- y N and/or In x G ai - x N layers, and they may appear in different orders, or may have one of silicon, magnesium and carbon.
  • X and y are used to represent the atomic composition of the elements, and they can range from 0 to 1.
  • those skilled in the art can adjust the specific composition of each layer according to specific requirements. That is to say, the composition of each layer is not necessarily the same.
  • each layer of In x Ga N and Al y G ai - y N in the composite buffer layer There is no particular requirement for the thickness of each layer of In x Ga N and Al y G ai - y N in the composite buffer layer.
  • the thickness range should preferably be controlled from 0 to 1000 angstroms (A), and the thickness range of Al y G ai - y N should preferably be controlled from 0 to 2000 angstroms (A).
  • those skilled in the art can adjust the thickness of each layer according to specific requirements. That is to say, the thickness of each layer is not necessarily the same.
  • the thickness of the N layer is preferably 0 ⁇
  • the composite buffer layer is typically grown at a lower temperature, i.e., below the growth temperature of the N-type GaN layer.
  • the ideal growth temperature for N-type GaN is usually about 800 ⁇ to 1300 °C.
  • the suitable growth temperature of the buffer of the present invention should be 40 (TC to 800)
  • the layers may all be Al InGaN or both Al InGaN doped layers in a more general sense, and the concentrations of Al, Ga, In in the two layers may be different, and the dopant doped therein may be Si One or two of Mg, C and C.
  • each layer in the GaN-based photoelectron standard device is preferably as follows: the substrate is about 0.4 mm, the buffer layer is about 20 nm to 300 nm, the N-type GaN layer is about 2 to 5 ⁇ m, and the active layer is about 100 nm.
  • the 300 nm, P ⁇ -type AlGaN layer is about 25 nm to 250 nm, and the P ⁇ -type GaN layer is about 100 nm to 500 nm.
  • the substrate which may be any substrate that can be used in the present invention, such as, but not limited to, sapphire, Zii0, S i, GaAs, S iC, and the like.
  • GaN-based light emitting diodes having thicker N-type GaN layers can directly benefit from the present invention.
  • This composite buffer layer helps reduce defect density and prevent cracking. Thereby improving the yield of the product.
  • this invention for improving the thick N-type GaN layer will further help to optimize the performance of LEDs, which are embodied in the following aspects: First, high-quality thick N-type GaN due to the increase in lateral effective area of the chip The light extraction efficiency is improved, and the lower resistance not only improves the current distribution, but also helps to reduce the forward working voltage V f and thus the energy loss, thereby enhancing the reliability of the device.
  • Figure 1 is a schematic cross-sectional view of a conventional light emitting diode.
  • the structure of the light emitting diode includes a sapphire substrate (100) and a series of epitaxial layers grown by M0VPE technology.
  • the epitaxial layer comprises a conventional low temperature buffer layer such as 300 angstroms thick or A1N (110), a heavily doped N-type GaN layer (120), an active layer (130) composed of multiple quantum wells, A P-type AlGaN confinement layer (140) and a P-type GaN layer (150).
  • FIG. 2 is a schematic cross-sectional view of a novel light emitting diode structure including the present invention.
  • This new diode device includes a sapphire substrate (200) and a series of epitaxial layers grown using M0VPE.
  • the invention includes an InxGa N/AlyGa N composite buffer layer (210), a heavily doped N-type GaN layer (220), an active layer (230) composed of multiple quantum wells, and a P-type An AlGaN confinement layer (240) and a P-type GaN layer (250).
  • the order is to first grow an In x G ai - x N layer (312a) on the sapphire substrate and then regenerate the long AlyGa yN layer (314a).
  • the structure and order shown in FIG. 3B are the same as those of 3A, the only difference being that the doping (X) is contained in 3B, and the impurity (X) may be silicon (S i ), magnesium (Mg), carbon (C), or the like.
  • Shown in Figure 4A is the design of a second type of composite buffer layer (410a). The arrangement of the growth order is exactly the opposite of the case of FIG. In this structure, Mr.
  • the structure and sequence shown in FIG. 4B are different from those of 4A, except that 4B contains doping (X), and impurity (X) may be silicon (S i ), magnesium (Mg), carbon (C), etc. .
  • FIG. 5A and 5B show is based on the thickness of the first instance of the class N-GaN low-temperature buffer layer composite structure with village micrograph user total thickness of about 4.5 microns, doped silicon concentration is about 5xl 0 18 Cnf 3 .
  • Figure 5A shows the surface of the sample without optimization, with a set of cracks in one direction, and
  • Figure 5B shows the surface optimized for composition and thickness without any cracks.
  • each layer of the optoelectronic device of the present invention is well known in the art and is not particularly limited.
  • the present invention provides a novel device structure and associated M0VPE growth techniques for overcoming the generation of dislocations and cracks.
  • the invention also improves the performance of the device, broadens the growth window of the N-type GaN layer, enhances the control of the forward voltage Vf , and changes the product quality and reliability as a whole.
  • the present invention provides a novel composite low temperature buffer layer in place of a conventional single buffer layer for thick N-type GaN layer growth and fabrication of related GaN-based semiconductor devices. .
  • This composite buffer layer can effectively axe the stress caused by lattice mismatch and thermal expansion mismatch, thereby reducing the formation of defects and preventing cracking.
  • This method of growing a thick N-type GaN layer can be used for performance improvement and reliability improvement of GaN-based light-emitting diodes. It is also widely used in the fabrication of other GaN-based devices, including high-power microwave devices and switching devices.
  • Embodiment 1 The first type of composite type low temperature buffer layer
  • a layer of Mr. M0VPE is used at 500 degrees Celsius. 15 ⁇ The thickness of the InxGai- X N layer, wherein x is 0.15. Then, a layer of about 250 A thick Al y G ai - y N layer is further grown at the same temperature, wherein y is 0. 05.
  • the two layers together form a first type of composite type low temperature buffer layer. After a high temperature tempering of 1100 degrees for 10 minutes, a ⁇ -type (Al) GaN layer of about 3 ⁇ m thick was grown at the same high temperature, wherein the doping concentration of silicon was 5 ⁇ 10 18 cnf 3 . The rest of the LED structure (quantum well active region and P-type layer) is grown under normal conditions.
  • the first type of composite low temperature buffer layer is suitable for the fabrication of blue and shorter wavelength light emitting diodes.
  • Example 2 The second type of composite type low temperature buffer layer
  • a layer of about 100A thick Al y G ai - y N is grown by M0VPE at 500 degrees Celsius, where X is 0. 15. Then continue to grow at the same temperature. 200 ⁇ The thickness of the InxGa N layer, where y is 0.02.
  • the two layers together form a second type of composite low temperature buffer layer. After 10 minutes of high temperature tempering at 1100 degrees, a ⁇ -type (In) GaN layer of about 3 ⁇ m thick was grown at the same high temperature, wherein the doping concentration of silicon was 5 ⁇ 10 18 cm ⁇ 3 . The rest of the LED structure (quantum well active region and P-type layer) is grown under normal conditions.
  • the second type of composite low temperature buffer layer is suitable for the fabrication of green and longer wavelength light emitting diodes.

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Abstract

A GaN-based optoelectronic device and a method of manufacturing the same are disclosed, GaN-based optoelectronic device comprises substrate (100), low temperature buffer layer (110), N-GaN layer (120), quantum well active layer (130), p-AlGaN limiting layer (140) and P-GaN layer (150). The invention uses the MOVPE growth technology, is especially suitable to manufacture light emitting diode. Using the low temperature buffer layer remarkably improve the performance of device, the yield and the reliability, especially for light emitting diode containing thick and heavily doped N-GaN layer.

Description

Ga 基光电子器件及其制造方法 技术领域  Ga-based optoelectronic device and method of manufacturing the same

本发明涉及广泛意义上的 GaN基光电子器件制造及相关的 M0CVD生长技术, 特别是发光二极管的制造技术。 背景技术  The present invention relates to the fabrication of GaN-based optoelectronic devices in a broad sense and related M0CVD growth techniques, particularly the fabrication of light-emitting diodes. Background technique

众所周知, 硅掺杂的 N-GaN是所有相关的光电子器件的重要 基础, 通常器件的光学和电学性能是与这一层的晶体质量密切相 关的。  It is well known that silicon-doped N-GaN is an important basis for all related optoelectronic devices. Generally, the optical and electrical properties of a device are closely related to the crystal quality of this layer.

如图 1所示, 一个常规的发光二极管包括蓝宝石村底 (100 ) 和其上用 M0CVD技术生长的一组外延层。 这些外延层是由以下五 层所組成: 一个低温緩冲层 (110 ) , —个重掺杂的 N -型 GaN层 ( 120 ) , 一个由量子阱结构组成的有源区 ( 130 ) , 一个 AlGaN 限制层 ( 140 ) , 和一个 P-型 GaN层 ( 150 ) 。  As shown in Figure 1, a conventional light emitting diode includes a sapphire substrate (100) and a set of epitaxial layers grown thereon using M0CVD techniques. These epitaxial layers are composed of the following five layers: a low temperature buffer layer (110), a heavily doped N-type GaN layer (120), an active region (130) composed of a quantum well structure, An AlGaN confinement layer (140), and a P-type GaN layer (150).

在所有的外延层中, N-型 GaN层是很重要的一层, 它主要起 以下三方面的作用。第一,通常需要 N-型 GaN层有较高的电导率, 这样可以有效地分散电流且具有较低的正向操作电压因而降低能 耗。 第二, 在以蓝宝石为衬底的发光二级管中, N- GaN 层也是一 个重要的光萃取层, 光从 N-GaN层侧面的发射是全部光输出的主 要部分。 因为光折射率的差异, 有源区发出的大部分光没办法逃 逸出来, 所以需要做多方面的努力让芯片发出更多的光。 其中之 一的努力就是要把芯片加厚, 尤其是 N-型 GaN层的厚度, 因为理 想状态下光的萃取率与 N-型 GaN层的厚度成正比。  Among all the epitaxial layers, the N-type GaN layer is an important layer, and it mainly functions in the following three aspects. First, it is generally desirable for the N-type GaN layer to have a higher conductivity, which effectively disperses the current and has a lower forward operating voltage and thus lowers power consumption. Second, in a sapphire-based light-emitting diode, the N-GaN layer is also an important light extraction layer, and the emission of light from the side of the N-GaN layer is a major part of the total light output. Because of the difference in refractive index of light, most of the light emitted by the active area cannot escape, so many efforts are required to make the chip emit more light. One of the efforts is to thicken the chip, especially the thickness of the N-type GaN layer, because the extraction rate of light in an ideal state is proportional to the thickness of the N-type GaN layer.

最后一点, 但确是最重要的是, 因为 N-型 GaN层是最初生长 的 "地基" 层, N-型 GaN层的晶体质量直接影响到后续各层的性 能。 因此一个高质量的无残余应力的 N -型 GaN层对于实现高性能 的发光二极管是必不可少的。 Finally, but most importantly, because the N-type GaN layer is the "ground" layer that was originally grown, the crystal quality of the N-type GaN layer directly affects the performance of subsequent layers. Therefore a high quality residual stress-free N-type GaN layer for high performance Light-emitting diodes are essential.

然而,如果用常规的单层 GaN (参见美国专利 5290393号, 发 明人: Nakamura等, 1994年 3 月 1 日 )或 A1N (参见美国专利 4855249号, 发明人: Akasaki等, 1989年 8 月 8 日)做为低 温緩冲层长在蓝宝石村底上, 由于晶格失配, 后续的 M0VPE生长 会很难得到高质量的, 足够厚的重掺杂 N-型 GaN层。  However, if conventional single layer GaN is used (see U.S. Patent No. 5,290,393, inventor: Nakamura et al., March 1, 1994) or A1N (see U.S. Patent No. 4,855,249, inventor: Akasaki et al., August 8, 1989) As a low temperature buffer layer on the sapphire substrate, due to lattice mismatch, subsequent M0VPE growth will be difficult to obtain a high quality, thick enough heavily doped N-type GaN layer.

由于在生长过程中, 应力是逐步累积的, 当膜的厚度达到了 某个值, 也称作临界厚度, 过大的应力就会破坏晶体键连, 从而 导致失配位错的出现和薄膜的龟裂。 更严重的是, 如果 N-型 GaN 层的掺杂浓度很高, 比如掺 Si或其它杂质,这些替位式的杂质原 子会造成晶格大小的进一步变化, 从而使龟裂恶化, 换句话讲, 通常重掺杂的 N-型 GaN要比不掺杂的 GaN层具有更小的临界厚 度。  Since the stress is gradually accumulated during the growth process, when the thickness of the film reaches a certain value, also called the critical thickness, excessive stress will break the crystal bond, resulting in the occurrence of misfit dislocations and the film. Cracked. More seriously, if the doping concentration of the N-type GaN layer is high, such as doping with Si or other impurities, these substitutional impurity atoms will cause further changes in the lattice size, thereby causing the crack to deteriorate, in other words Generally speaking, heavily doped N-type GaN has a smaller critical thickness than an undoped GaN layer.

通常由于晶格失配和热膨胀系数的差异, 在高温生长的过程 中的应力释放会导致龟裂。 重掺杂的较厚的 N-型 GaN层发生龟裂 的几率要比较薄的层大得多。 如果杂质是 Si的话 (Si原子半径 比它所替代的 Ga原子要小 30% ) , 这种情况会变得尤其严重, 。 正常情况下如 Si的掺杂浓度在 5xl 018cm—3左右, N-型 GaN层可长 至 2到 3μοι而不发生龟裂。 但需要指出的是临界厚度也强烈依赖 于生长温度。 温度越高, 临界厚度越小。 Usually, due to the difference in lattice mismatch and thermal expansion coefficient, stress release during high temperature growth causes cracking. The heavily doped thicker N-type GaN layer is much more likely to crack than the thinner layer. This situation becomes especially serious if the impurity is Si (the Si atom radius is 30% smaller than the Ga atom it replaces). Under normal circumstances, if the doping concentration of Si is about 5xl 0 18 cm- 3 , the N-type GaN layer can be as long as 2 to 3 μm without cracking. However, it should be noted that the critical thickness is also strongly dependent on the growth temperature. The higher the temperature, the smaller the critical thickness.

众所周知, 位错和龟裂是发光二极管器件的致命缺陷 (参见 刘恒和 阎春辉等, ,, Al InGaN基发光二极管芯片生产中的问题", 2003年 SPIE 会议文集第 4996卷第 125页)。它们经常直接导致 器件的失效, 典型的表现为局部发光甚至完全不发光。 这些失效 大大地降低了成品率, 同时也相应地提高了生产成本。 这些缺陷 意义也会更多地会影响器件的可靠性。 它们会加速老化进程, 缩 短器件寿命, 从而导致运行过程中的高失效率。 有龟裂的发光管 通常不能抵抗高压静电放电, 这就意味着它们可能会在有静电的 环境突然失效。 It is well known that dislocations and cracks are fatal defects in LED devices (see Liu Henghe, et al., Problems in the production of Al InGaN-based LED chips, 2003 SPE Conference Proceedings, Vol. 4, 996, p. 125). They often lead directly to device failure, typically in the form of partial or even no luminescence. These failures greatly reduce the yield and correspondingly increase the production cost. The significance of these defects will also affect the reliability of the device. They accelerate the aging process and shorten the life of the device, resulting in high failure rates during operation. They are generally not resistant to high voltage electrostatic discharges, which means they may suddenly fail in an electrostatic environment.

减少龟裂的常规手段包括适当降低硅的掺杂浓度, 降低 N-型 GaN层生长温度和减少 N-型 GaN层的厚度。 基于前面的讨论, 我 们已经知道, 降低掺杂浓度的害处是 N-型 GaN层电阻提高, 因而 会升高正向工作电压 Vf。 同时减少 N-型 GaN厚度, 也与我们前面 提到的厚 N-型 GaN层的好处大相径庭。而降低 N-型 GaN层生长温 度则更是会导致电子迁移率下降进而造成正向工作电压升高。 Conventional means for reducing cracking include appropriately reducing the doping concentration of silicon, lowering the growth temperature of the N-type GaN layer, and reducing the thickness of the N-type GaN layer. Based on the foregoing discussion, we have known that the disadvantage of reducing the doping concentration is that the resistance of the N-type GaN layer is increased, thereby increasing the forward operating voltage Vf . At the same time, reducing the thickness of N-type GaN is also very different from the benefits of the thick N-type GaN layer we mentioned earlier. Decreasing the growth temperature of the N-type GaN layer leads to a decrease in electron mobility and an increase in the forward operating voltage.

此外, 从整体器件性能的角度看, 为了进一步降低正向工作 电压及功耗, 从而减少热效应并提高器件可靠性, 应当选择的工 艺方向是高温生长, 厚 N-型 GaN及高的掺杂浓度。  In addition, from the perspective of overall device performance, in order to further reduce the forward operating voltage and power consumption, thereby reducing thermal effects and improving device reliability, the process direction should be selected for high temperature growth, thick N-type GaN and high doping concentration. .

综上所述, 对于用 M0VPE生长的发光二极管器件, 既然厚的 重掺的 N-型 GaN层是必不可少的, 那末减轻随之而引发的龟裂问 题则变得刻不容緩, 这样不仅会改善器件的性能, 拓宽工艺条件 窗口, 也能更好地控制正向电压并从整体上改进产品质量和成品 率。 发明内容  In summary, for a light-emitting diode device grown with M0VPE, since a thick heavily doped N-type GaN layer is indispensable, it is imperative to alleviate the resulting cracking problem, which will not only improve. The performance of the device, the widening of the process conditions window, also allows for better control of the forward voltage and overall improvement in product quality and yield. Summary of the invention

本项发明专门探讨和解决了前面提到的在当前 GaN基光电子 器件制造工艺中利用重掺杂的厚 N-型 GaN的优点而引发的潜在问 题。  This invention specifically addresses and addresses the potential problems previously raised with the advantages of heavily doped thick N-type GaN in current GaN-based optoelectronic device fabrication processes.

本发明包括了使用 M0VPE技术生长氮化镓基的器件, 尤其是 适合用于发光二极管(LED )器件的制作。 器件结构包括衬底, 低 温緩冲层, N-型 GaN层, 量子阱有源层, P-型 AlGaN限制层以及 P-型 GaN层。  The present invention includes devices for growing gallium nitride based using M0VPE technology, and are particularly suitable for use in the fabrication of light emitting diode (LED) devices. The device structure includes a substrate, a low temperature buffer layer, an N-type GaN layer, a quantum well active layer, a P-type AlGaN confinement layer, and a P-type GaN layer.

如上所述, 低温緩冲层的使用极大地改进了器件的性能, 尤 其对于使用较厚的高温生长的重掺杂 N-型 GaN层的发光二极管提 供进一步提高成品率和可靠性的保障。 As noted above, the use of a low temperature buffer layer greatly improves the performance of the device, especially for light emitting diodes that use thicker, high temperature grown heavily doped N-type GaN layers. To further improve the yield and reliability of the protection.

根据本发明的一个实施方案, 本发明涉及一种光电子器件, 包括衬底和外延层, 其中外延层包括: 生长在衬底上的缓冲层, 生长在緩沖层上的 N-型 GaN层,在 N-型 GaN层上方的包括单量子 阱或多量子阱的有源层, 在有源层上方的 P-型 AlGaN限制层, 在 P -型 AlGaN限制层上方的 P-型 GaN层, 其特征在于, 所述缓冲层 由一层或多层的掺杂或未掺杂的 InxGai-xN 层和 /或掺杂或未掺杂 的 AlyGaiyN层组成, 或者所述緩冲层为 AUnbGa。N层, 其中表示 元素原子组成的 X和 y值范围分别是 0 < χ < 1且 0 < y < 1; 表示 元素原子组成的 a、 b和 c的范围分别是 0<a < l、 0<b 1 , 0<c < 1 JL a+b+c=l0 According to an embodiment of the present invention, the present invention relates to an optoelectronic device comprising a substrate and an epitaxial layer, wherein the epitaxial layer comprises: a buffer layer grown on the substrate, an N-type GaN layer grown on the buffer layer, An active layer including a single quantum well or a multiple quantum well over the N-type GaN layer, a P-type AlGaN confinement layer over the active layer, and a P-type GaN layer over the P - -type AlGaN confinement layer, characterized In that the buffer layer consists of one or more layers of doped or undoped In x G ai - x N layers and/or doped or undoped Al y G aiy N layers, or The buffer layer is AUn b Ga. The N layer, wherein the X and y values representing the atomic composition of the element are 0 < χ < 1 and 0 < y < 1 respectively; the ranges of a, b, and c representing the atomic composition of the element are 0 < a < l, 0 < b 1 , 0<c < 1 JL a+b+c=l 0

根据本发明另外的实施方案, 本发明还涉及上述光电子器件 的制造方法, 其特征在于是用 M0VPE技术在衬底上生长所述外延 层, 其中所述緩冲层的生长温度为 400 ~ 800°C ; N-型 GaN的生长 温度为 800°C到 1300°C。 附图说明  According to a further embodiment of the present invention, the present invention is also directed to a method of fabricating the above-described optoelectronic device, characterized in that the epitaxial layer is grown on a substrate by a MOVPE technique, wherein the buffer layer has a growth temperature of 400 to 800°. C; N-type GaN has a growth temperature of 800 ° C to 1300 ° C. DRAWINGS

图 1是常规的具有低温单层緩冲层的氮化镓基发光二极管器 件的横切面示意图。  BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic cross-sectional view of a conventional gallium nitride based light emitting diode device having a low temperature single layer buffer layer.

图 2是新型的具有低温复合型緩冲层的氮化镓基发光二极管 器件的横切面示意图。  Fig. 2 is a schematic cross-sectional view showing a novel gallium nitride based light emitting diode device having a low temperature composite buffer layer.

图 3A和 3B所展示的是第一类低温复合型緩冲层的横切面示 意图。 它包括 AlyGanN/InxGa XN

Figure imgf000007_0001
贴向衬底一侧) 两层 结构。 图 3A是没有掺杂的, 图 3B则包^了掺杂 (X ) 。 3A and 3B are schematic cross-sectional views of a first type of low temperature composite buffer layer. It includes AlyGanN/InxGa X N
Figure imgf000007_0001
Attached to the side of the substrate) Two-layer structure. Figure 3A is undoped, and Figure 3B is doped (X).

图 4A和 4B所展示的是笫二类低温复合型緩冲层的横切面示 意图。 它包括

Figure imgf000007_0002
贴向衬底一侧) 两层 结构。 图 4A是没有掺杂的, 图 4B则包括了掺杂 (X ) 。 图 5A和 5B所展示的是基于第一类低温复合型緩沖层结构的 厚 N-GaN实例相衬显微镜照片。 具体实施方式 4A and 4B are schematic cross-sectional views showing a cyanide type low temperature composite buffer layer. it includes
Figure imgf000007_0002
Attached to the side of the substrate) Two-layer structure. Figure 4A is undoped, and Figure 4B includes doping (X). 5A and 5B show a phase contrast micrograph of a thick N-GaN example based on a first type of low temperature composite buffer layer structure. detailed description

后绪的论述和图示会进一步明显地展示本发明所带来的优势 和益处 0 After discussion thread and further illustrate clearly demonstrate the advantages brought by the invention and benefits 0

以下有关本发明的详细论述和图示是为了更清楚地介绍所发 明的内容, 但并不意味着强调这些是唯一可使用和实施的技术方 案。 后绪的细节描述详尽地给出了用 M0VPE技术生长氮化镓器件 比如发光二极管或类似器件的具体步骤。 然而, 需要指出的是, 用其它不同形式来实现相同或相当的功能的结构也同属于本发明 的范畴之内。  The detailed description and illustrations of the present invention are set forth to provide a more detailed description of the present invention, but are not intended to emphasize that these are the only technical solutions that can be used and implemented. The detailed description of the back-end details the specific steps for growing a gallium nitride device such as a light-emitting diode or the like using the M0VPE technique. It is to be noted, however, that the construction of the same or equivalent functions in other different forms is also within the scope of the invention.

此外, 这里所直接讨论的是用 M0VPE技术生长氮化镓基的发 光二极管, 这仅仅是举例说明的一种方法, 而并不意味着限制本 发明仅适用于此技术。 对于本领域技术人员来讲, 他们会不难理 解这一发明也同样适用于其它的沉积生长工艺 (比如 MBE 和 HVPE ) 。 同样的, 本发明不仅适用于发光二极管的制作, 也同样 可用于各种其它方面的器件制作。 比如本发明可以用来增强其它 Ga 基器件的性能和可靠性, 包括大功率微波器件和超高功率开 关器件。  Moreover, what is discussed directly herein is the growth of a gallium nitride based light emitting diode using the M0VPE technique, which is merely an illustrative method and is not meant to limit the invention to only this technique. It will be readily apparent to those skilled in the art that the invention is equally applicable to other deposition growth processes (e.g., MBE and HVPE). Similarly, the present invention is not only applicable to the fabrication of light-emitting diodes, but also to the fabrication of devices in various other aspects. For example, the present invention can be used to enhance the performance and reliability of other Ga-based devices, including high power microwave devices and ultra high power switching devices.

本发明的主要宗旨是在于利用新型的预先生长的复合型低温 緩冲层来获得足够厚的高晶体质量的 N-型 GaN层从而达到降低缺 陷密度和防止龟裂的目的。这些生长在相对低的温度下( 400 °C到 800 °C )的緩冲层可以有效地释放它们本身所累积的应力,进而提 供一个几乎无残余应力和近晶格匹配的生长基板给后续所要长在 其上的外延层。  The main object of the present invention is to obtain a sufficiently thick high-quality N-type GaN layer by using a novel pre-grown composite low-temperature buffer layer to achieve the purpose of reducing the defect density and preventing cracking. These buffer layers grown at relatively low temperatures (400 ° C to 800 ° C) can effectively release the stresses accumulated by themselves, thereby providing a growth substrate with almost no residual stress and near lattice matching for subsequent needs. An epitaxial layer that grows on it.

本发明所提及的低温緩冲层是直接生长在衬底上的, 例如蓝 宝石衬底。 这一 _冲层可以由一层或多层的 AlyGa— yN 和 /或 InxGai-xN 层所组成, 而且它们可以按不同的次序出现, 也可以有 硅、 镁和碳的一种或多种的掺入或不掺。 这里用 X和 y表示元素 的原子组成, 它们的范围可以从 0到 1。 同时, 本领域技术人员 能够根据具体要求调整各层的具体组成。 也就是说, 各层的组成 不一定相同。 The low temperature buffer layer mentioned in the present invention is directly grown on a substrate, such as blue Gem substrate. This layer may be composed of one or more layers of AlyGa- y N and/or In x G ai - x N layers, and they may appear in different orders, or may have one of silicon, magnesium and carbon. One or more of the incorporation or non-doping. Here, X and y are used to represent the atomic composition of the elements, and they can range from 0 to 1. At the same time, those skilled in the art can adjust the specific composition of each layer according to specific requirements. That is to say, the composition of each layer is not necessarily the same.

复合緩冲层内各层 InxGa N和 AlyGai-yN的厚度没有特殊的要 求。 但是,

Figure imgf000009_0001
的厚度范围优选应控制在 0 ~ 1000埃 (A ) , 而 AlyGai-yN的厚度范围优选应控制在 0 ~ 2000埃(A ) 。 同时, 本领域技术人员能够根据具体要求调整各层的厚度。 也就是说, 各层的厚度不一定相同。另外, AlaInbGa。N层的厚度范围优选是 0 ~
Figure imgf000009_0002
There is no particular requirement for the thickness of each layer of In x Ga N and Al y G ai - y N in the composite buffer layer. but,
Figure imgf000009_0001
The thickness range should preferably be controlled from 0 to 1000 angstroms (A), and the thickness range of Al y G ai - y N should preferably be controlled from 0 to 2000 angstroms (A). At the same time, those skilled in the art can adjust the thickness of each layer according to specific requirements. That is to say, the thickness of each layer is not necessarily the same. In addition, Al a In b Ga. The thickness of the N layer is preferably 0 ~
Figure imgf000009_0002

复合緩冲层通常要在较低的温度条件下完成生长, 即低于 N- 型 GaN层的生长温度。 通常 N-型 GaN的理想生长温度大约在 800 Ό到 1300°C。本发明的緩沖^的适宜生长温度则应在 40(TC到 800 The composite buffer layer is typically grown at a lower temperature, i.e., below the growth temperature of the N-type GaN layer. The ideal growth temperature for N-type GaN is usually about 800 Ό to 1300 °C. The suitable growth temperature of the buffer of the present invention should be 40 (TC to 800)

。C。 . C.

另外,

Figure imgf000009_0003
层在更普遍意义下可以都是 Al InGaN或都是 Al InGaN掺杂层,而且 Al, Ga, In 在这两层中的 浓度可以是不同的,而掺杂在其中的掺杂物可以是 Si、 Mg和 C中 的一种或两种。 In addition,
Figure imgf000009_0003
The layers may all be Al InGaN or both Al InGaN doped layers in a more general sense, and the concentrations of Al, Ga, In in the two layers may be different, and the dopant doped therein may be Si One or two of Mg, C and C.

在 GaN基光电子标准器件中各层优选厚度范围如下: 衬底约 为 0. 4mm, 緩冲层约为 20nm至 300nm, N-型 GaN层约为 2 至 5μιη, 有源层约为 l OOnm至 300nm, P -型 AlGaN层约为 25nm 至 250nm, P -型 GaN层约为 l OOnm至 500nm。 但是, 本领域技术人员清楚上 述厚度范围仅仅是优选的范围 , 本领域技术人员能够根据现有技 术自行确定上述各层的具体厚度, 而且由此产生的器件也在本发 明的范围内。 对于村底并没有具体的限制, 其可以是任何可以用在本发明 中的衬底, 例如但并不限于, 蓝宝石、 Zii0、 S i、 GaAs、 S iC等。 The thickness of each layer in the GaN-based photoelectron standard device is preferably as follows: the substrate is about 0.4 mm, the buffer layer is about 20 nm to 300 nm, the N-type GaN layer is about 2 to 5 μm, and the active layer is about 100 nm. The 300 nm, P − -type AlGaN layer is about 25 nm to 250 nm, and the P − -type GaN layer is about 100 nm to 500 nm. However, it will be apparent to those skilled in the art that the above thickness ranges are only preferred ranges, and those skilled in the art will be able to determine the specific thickness of each of the above layers in accordance with the prior art, and the resulting devices are also within the scope of the present invention. There is no particular limitation on the substrate, which may be any substrate that can be used in the present invention, such as, but not limited to, sapphire, Zii0, S i, GaAs, S iC, and the like.

总的来讲, 具有较厚 N-型 GaN层的 GaN基发光二极管可从本 发明中直接受益。 这一复合緩冲层可帮助降低缺陷密度, 防止龟 裂产生。从而提高产品的成品率。另外,本项针对改善厚 N-型 GaN 层的发明, 会进一步帮助优化发光二极管的性能, 它们具体体现 在以下几个方面: 首先高质量的厚 N-型 GaN由于芯片侧向有效面 积的增加而使得光萃取效率提高, 而较低的电阻不仅会改善电流 分布, 也会帮助降低正向工作电压 Vf进而减少能量损耗, 从而加 强器件的可靠性。 In general, GaN-based light emitting diodes having thicker N-type GaN layers can directly benefit from the present invention. This composite buffer layer helps reduce defect density and prevent cracking. Thereby improving the yield of the product. In addition, this invention for improving the thick N-type GaN layer will further help to optimize the performance of LEDs, which are embodied in the following aspects: First, high-quality thick N-type GaN due to the increase in lateral effective area of the chip The light extraction efficiency is improved, and the lower resistance not only improves the current distribution, but also helps to reduce the forward working voltage V f and thus the energy loss, thereby enhancing the reliability of the device.

图 1所示的是一个常规发光二极管横切面示意图,如前所述, 这一发光二极管的结构包括蓝宝石衬底(100 )及一系列由 M0VPE 技术生长的外延层。 外延层包括一个常规的低温緩冲层比如 300 埃厚的 或 A1N ( 110 ) , 一个重掺杂的 N-型 GaN层 (120 ) , 一个由多量子阱组成的有源层 (130 ) , —个 P-型 AlGaN限制层 ( 140 ) 和一个 P-型 GaN层 (150 ) 。  Figure 1 is a schematic cross-sectional view of a conventional light emitting diode. As previously described, the structure of the light emitting diode includes a sapphire substrate (100) and a series of epitaxial layers grown by M0VPE technology. The epitaxial layer comprises a conventional low temperature buffer layer such as 300 angstroms thick or A1N (110), a heavily doped N-type GaN layer (120), an active layer (130) composed of multiple quantum wells, A P-type AlGaN confinement layer (140) and a P-type GaN layer (150).

图 2所示的是一个包括本项发明的新型发光二极管结构横切 面示意图。 这一新型二极管器件包括蓝宝石衬底( 200 ) , 以及一 系列用 M0VPE生长的外延层。 其中包括 InxGa N/AlyGa N复合型 緩冲层(210 ) , —个重掺杂的 N-型 GaN层( 220 ) , —个由多量 子阱组成的有源层( 230 ) , 一个 P-型 AlGaN限制层( 240 )和一 个 P-型 GaN层 ( 250 ) 。  Figure 2 is a schematic cross-sectional view of a novel light emitting diode structure including the present invention. This new diode device includes a sapphire substrate (200) and a series of epitaxial layers grown using M0VPE. The invention includes an InxGa N/AlyGa N composite buffer layer (210), a heavily doped N-type GaN layer (220), an active layer (230) composed of multiple quantum wells, and a P-type An AlGaN confinement layer (240) and a P-type GaN layer (250).

图 3A所示的第一类典型的复合型緩冲层( 310a )的设计。 其 次序是先在蓝宝石衬底上生长 InxGai-xN 层(312a), 然后再生长 AlyGa yN层(314a)。 图 3B中所示的结构与次序与 3A—致, 唯一 的区别在于 3B 中包含了掺杂 (X) , 杂质(X)可以是硅(S i)、 镁 (Mg)、 碳 (C) 等。 图 4A所示的是第二类复合型緩冲层(410a)的设计。其生长次 序的安排与图 3的情况正好相反。 在这一结构中先生长 AlyGa N 层(412a), 然后再生长

Figure imgf000011_0001
层(41½)。 图 4B 中所示的结构 与次序与 4A—致, 所不同的只是 4B中包含了掺杂(X), 杂质(X) 可以是硅(S i)、 镁 (Mg)、 碳(C) 等。 The design of the first type of composite buffer layer (310a) of the first type shown in Fig. 3A. The order is to first grow an In x G ai - x N layer (312a) on the sapphire substrate and then regenerate the long AlyGa yN layer (314a). The structure and order shown in FIG. 3B are the same as those of 3A, the only difference being that the doping (X) is contained in 3B, and the impurity (X) may be silicon (S i ), magnesium (Mg), carbon (C), or the like. . Shown in Figure 4A is the design of a second type of composite buffer layer (410a). The arrangement of the growth order is exactly the opposite of the case of FIG. In this structure, Mr. Al y Ga N layer (412a), then regrowth
Figure imgf000011_0001
Layer (411⁄2). The structure and sequence shown in FIG. 4B are different from those of 4A, except that 4B contains doping (X), and impurity (X) may be silicon (S i ), magnesium (Mg), carbon (C), etc. .

图 5A和 5B所展示的是基于第一类低温复合型緩冲层结构的 厚 N-GaN实例相村显微镜照片,总厚度约为方便用户 4. 5微米, 硅 掺杂浓度约为 5xl 018 cnf3 。 图 5A是没有优化的样品表面,伴有一 组方向一至的龟裂,图 5B则是优化了组份和厚度的表面, 没有任 何龟裂出现。 5A and 5B show is based on the thickness of the first instance of the class N-GaN low-temperature buffer layer composite structure with village micrograph user total thickness of about 4.5 microns, doped silicon concentration is about 5xl 0 18 Cnf 3 . Figure 5A shows the surface of the sample without optimization, with a set of cracks in one direction, and Figure 5B shows the surface optimized for composition and thickness without any cracks.

本发明的光电子器件的各层的生长务法都是本领域中所公知 的, 并没有特别的限定。  The growth method of each layer of the optoelectronic device of the present invention is well known in the art and is not particularly limited.

综上所述, 本项发明提供了一个新型的器件结构及相关的 M0VPE 生长技术用来克服位错和龟裂的产生。 本项发明也同时改 善了器件的性能, 拓宽了 N-型 GaN层的生长窗口, 增强了对正向 电压 Vf的控制并从整体上改 了产品质量和可靠性。 In summary, the present invention provides a novel device structure and associated M0VPE growth techniques for overcoming the generation of dislocations and cracks. The invention also improves the performance of the device, broadens the growth window of the N-type GaN layer, enhances the control of the forward voltage Vf , and changes the product quality and reliability as a whole.

与现有技术相比, 本项发明提供了一种新型的复合型低温緩 冲层代替常规的单一缓冲层,.用于厚的 N-型 GaN层生长以及相关 的 GaN基半导体器件的制作。.  In contrast to the prior art, the present invention provides a novel composite low temperature buffer layer in place of a conventional single buffer layer for thick N-type GaN layer growth and fabrication of related GaN-based semiconductor devices. .

这一复合型緩冲层可以有效地斧放由晶格失配及热膨胀失配 所产生的应力, 从而达到减少缺陷的形成并防止龟裂的发生。 这 一生长厚 N-型 GaN层的方法可用于 GaN基发光二极管的性能改进 以及可靠性的提高。 它也同样广泛地适用于其它 GaN基器件包括 大功率微波器件和开关器件等器件的制作。 实施例 1 : 第一类复合型低温緩冲层  This composite buffer layer can effectively axe the stress caused by lattice mismatch and thermal expansion mismatch, thereby reducing the formation of defects and preventing cracking. This method of growing a thick N-type GaN layer can be used for performance improvement and reliability improvement of GaN-based light-emitting diodes. It is also widely used in the fabrication of other GaN-based devices, including high-power microwave devices and switching devices. Embodiment 1 : The first type of composite type low temperature buffer layer

用蓝宝石为衬底,在摄氏 500度下用 M0VPE方法先生长出一层 约 50A厚的 InxGai— XN层,其中 x为 0. 15。 然后在同一温度下再继 续生长一层约 250A厚的 AlyGaiyN .层,其中 y为 0. 05.这两层合起 来就形成了第一类复合型低温緩冲层。 再经过 10分钟 1100度高 温煺火后在同一高温下开始生长约 3μιη厚的 Ν-型 (Al) GaN层,其 中硅的掺杂浓度为 5xl 018cnf3。 发光二极管结构的其余部分 (量子 阱有源区和 P-型层)均在常规条件下完成生长。 第一类复合型低 温緩冲层适合于蓝色和更短波长发光二极管的制作。 实施例 2 : 第二类复合型低温緩冲层 Using sapphire as the substrate, a layer of Mr. M0VPE is used at 500 degrees Celsius. 15。 The thickness of the InxGai- X N layer, wherein x is 0.15. Then, a layer of about 250 A thick Al y G ai - y N layer is further grown at the same temperature, wherein y is 0. 05. The two layers together form a first type of composite type low temperature buffer layer. After a high temperature tempering of 1100 degrees for 10 minutes, a Ν-type (Al) GaN layer of about 3 μm thick was grown at the same high temperature, wherein the doping concentration of silicon was 5×10 18 cnf 3 . The rest of the LED structure (quantum well active region and P-type layer) is grown under normal conditions. The first type of composite low temperature buffer layer is suitable for the fabrication of blue and shorter wavelength light emitting diodes. Example 2: The second type of composite type low temperature buffer layer

用蓝宝石为衬底,在摄氏 500度下用 M0VPE方法先生长出一层约 100A厚的 AlyGai-yN层,其中 X为 0. 15.然后在同一温度下再继续 生长一层约 200A厚的 InxGa N层,其中 y为 0. 02。这两层合起来 就形成了第二类复合型低温缞冲层。 再经过 10分钟 1100度高温 煺火后在同一高温下开始生长约 3μιη厚的 Ν-型(In) GaN层,其中 硅的掺杂浓度为 5xl 018cm— 3。 发光二极管结构的其余部分(量子阱 有源区和 P-型层)均在常规条件下完成生长。 第二类复合型低温 缓冲层适合于绿色和更长波长发光二极管的制作。 Using sapphire as the substrate, a layer of about 100A thick Al y G ai - y N is grown by M0VPE at 500 degrees Celsius, where X is 0. 15. Then continue to grow at the same temperature. 200。 The thickness of the InxGa N layer, where y is 0.02. The two layers together form a second type of composite low temperature buffer layer. After 10 minutes of high temperature tempering at 1100 degrees, a Ν-type (In) GaN layer of about 3 μm thick was grown at the same high temperature, wherein the doping concentration of silicon was 5×10 18 cm −3 . The rest of the LED structure (quantum well active region and P-type layer) is grown under normal conditions. The second type of composite low temperature buffer layer is suitable for the fabrication of green and longer wavelength light emitting diodes.

Claims

1、 一种光电子器件, 包括衬底和外延层, 其中外延层包括: What is claimed is: 1. An optoelectronic device comprising a substrate and an epitaxial layer, wherein the epitaxial layer comprises: 生长在衬底上的緩冲层,  a buffer layer grown on the substrate, 生长在緩冲层上的 N-型 GaN层,  An N-type GaN layer grown on the buffer layer, 在 N-型 GaN层上方的包括单量子阱或多量子阱的有源层, 在有源层上方的 P-型 AlGaN限制层,  An active layer including a single quantum well or a multiple quantum well over the N-type GaN layer, a P-type AlGaN confinement layer above the active layer, 在 P-型 AlGaN限制层上方的 P-型 GaN层,  a P-type GaN layer over the P-type AlGaN confinement layer, 其特征在于, 所述缓冲层由一层或多层的掺杂或未掺杂的 InxGa J层和 /或掺杂或未掺杂的
Figure imgf000013_0002
层组成,或者所述緩冲层为 AlaInbGacN层,其中表示元素原子组成的 x和 y值范围分别是 0 < x < 1 JL 0 < y < 1;表示元素原子组成的 a、 b和 c的范围分别是 0<a 1、 0<b < 1 > 0<c < 1且 a+b+c=l。
Characterized in that the buffer layer consists of one or more layers of doped or undoped InxGa J layers and/or doped or undoped
Figure imgf000013_0002
The layer composition, or the buffer layer is an Al a In b Ga c N layer, wherein the x and y values representing the atomic composition of the element are 0 < x < 1 JL 0 < y < 1 respectively; The ranges of b, c are 0 < a 1, 0 < b < 1 > 0 < c < 1 and a + b + c = 1.
2、 根据权利要求 1 所述的光电子器件, 其中所述緩沖层由一层
Figure imgf000013_0003
层和一层 AlyGawN层组成。
2. The optoelectronic device of claim 1 wherein said buffer layer is comprised of a layer
Figure imgf000013_0003
The layer consists of a layer of Al y Ga w N.
3、 根据权利要求 1 所述的光电子器件, 其中所述緩冲层由多层
Figure imgf000013_0004
层组成。
3. The optoelectronic device according to claim 1, wherein said buffer layer is composed of a plurality of layers
Figure imgf000013_0004
Layer composition.
4、 根据权利要求 3所述的光电子器件, 其中多层 InxGaiXN层和 多层 AlyGawN层交替排列。 4. The optoelectronic device according to claim 3, wherein the plurality of layers of In x G ai - X N and the layers of layers of Al y Ga w N are alternately arranged. 5、 根据杈利要求 1所述的光电子器件,其中所述緩冲层为 InxGai_J 层。 5. The optoelectronic device according to claim 1, wherein the buffer layer is an In x G ai _J layer. 6、 根据权利要求 1所述的光电子器件,其中所迷緩冲层为 AlyGai- 层。 6. The optoelectronic device of claim 1 wherein the buffer layer is an Al y G ai - layer. 7、 根据权利要求 1 所述的光电子器件, 其中所述緩冲层为 AlaInbGacN层。 7. The optoelectronic device according to claim 1, wherein the buffer layer is an Al a In b Ga c N layer. 8、 根据权利要求 1 所述的光电子器件, 其中所述衬底选自蓝宝 石, Zn0、 Si、 GaAs或 SiC。  8. The optoelectronic device according to claim 1, wherein the substrate is selected from the group consisting of sapphire, Zn0, Si, GaAs or SiC. 9、 根据权利要求 8 所述的光电子器件, 其特征在于所述衬底为 蓝宝石。 善 9. An optoelectronic device according to claim 8, characterized in that the substrate is sapphire. good 10、 根据权利要求 1所述的光电子器件,其特征在于所述 InxGai-xN 层贴向衬底一侧或 AlyGai-yN层贴向衬底一侧。 10. The optoelectronic device according to claim 1, wherein the In x G ai - x N layer is attached to the substrate side or the Al y G ai - y N layer is attached to the substrate side. 11、 根据权利要求 1 - 4任意一项所述的光电子器件, 其特征在于 所述
Figure imgf000014_0001
层均有掺杂,其掺杂的状态由 Si: InxGai-xN 和 Si: AlyGa!—yN来表示。
The optoelectronic device according to any one of claims 1 to 4, characterized in that
Figure imgf000014_0001
The layers are doped and the doped state is represented by Si: In x G ai - x N and Si: AlyGa! - yN.
12、 根据权利要求 1 - 4任意一项所述的光电子器件, 其特征在于 所述
Figure imgf000014_0002
层和 AlyGaiyN层均有掺杂,其掺杂的状态由 Mg: InxGai-xN 和 Mg: AlyGa yN来表示。
12. An optoelectronic device according to any of claims 1 - 4, characterized in that
Figure imgf000014_0002
Both the layer and the Al y G ai - y N layer are doped, and the doped state is represented by Mg: In x G ai - x N and Mg: Al y Ga yN.
13、 根据权利要求 1 - 4任意一项所述的光电子器件, 其特征在于 所述 InxGaiXN层和
Figure imgf000014_0003
层均有掺杂, 其掺杂的状态由 (Si+Mg):
Figure imgf000014_0004
和(Si+Mg): AlyGa— yN来表示。
13. An optoelectronic device according to any of claims 1 - 4, characterized in that said In x G ai - X N layer and
Figure imgf000014_0003
The layers are doped and their doped state is (Si+Mg):
Figure imgf000014_0004
And (Si + Mg): AlyGa - y N to represent.
14、 根据权利要求 1― 6任意.一项所述的光电子器件, 其特征在于 所述 In.Gaj- 层或 AlyGa N层有掺杂, 其掺杂的状态由 Si: In.Ga^ 或 Si: AlyGa yN来表示。 The optoelectronic device according to any one of claims 1 to 6, wherein the In.Gaj-layer or the Al y Ga N layer is doped, and the doped state thereof is Si: In.Ga^ Or Si: Al y Ga y N to indicate. 15、 根据权利要求 1所述的光电子器件, 其特征在于所述
Figure imgf000014_0005
层的厚度范围是 0~ 1000 A
15. The optoelectronic device of claim 1 wherein said
Figure imgf000014_0005
The thickness of the layer ranges from 0 to 1000 A.
16、 根据权利要求 1所述的光电子器件, 其特征在于所述 AlyGai-yN 层的厚度范围是 0~ 2000 A 16. The optoelectronic device according to claim 1, wherein said Al y G ai - y N layer has a thickness ranging from 0 to 2000 A. 17、 根据权利要求 1所述的光电子器件,其特征在于所述 AlaInbGa N 层的厚度范围是 0 - 2000 A The optoelectronic device according to claim 1, wherein said Al a In b Ga N layer has a thickness ranging from 0 to 2000 A. 18、 根据权利要求 1 ~ 17 中任一项所述的光电子器件, 其特征在 于所述光电子器件为发光二极管。  The optoelectronic device according to any one of claims 1 to 17, wherein the optoelectronic device is a light emitting diode. 19、 权利要求 1 中所述的光电子器件的制造方法, 其特征在于是 用 M0VPE技术在衬底上生长所述外延层, 其中所述緩冲层的生长温度 为 400 ~ 800°C; N-型 GaN的生长温度为 800°C到 1300°C  19. The method of fabricating an optoelectronic device as claimed in claim 1, wherein the epitaxial layer is grown on the substrate by a MOVPE technique, wherein the buffer layer has a growth temperature of 400 to 800 ° C; Type GaN has a growth temperature of 800 ° C to 1300 ° C
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