CN1467862A - Semiconductor device with ohmic contact and method for manufacturing the same - Google Patents

Abstract

The invention relates to a semiconductor device with an ohmic contact and a method for manufacturing the same, the semiconductor device comprises a substrate, a p-type gallium nitride layer arranged on the substrate, and a p-type indium gallium nitride _xGa_1－xN) layer on the p-type GaN layer to form a good interface with low ohmic contact resistance between semiconductor and metal electrode, a light-emitting component with ohmic contact and its manufacturing method_xGa_1－xN) layer is disposed on the p-type cladding layer and a metal layer is disposed on the p-type indium gallium nitride layer to form a good interface with low ohmic contact resistance between the semiconductor and the metal electrode.

Description

Semiconductor device with ohmic contact and manufacturing method thereof

technical field

The present invention relates to a semiconductor device with an ohmic contact, in particular providing a p-type gallium indium nitride (In _x Ga _1-x N) layer on a p-type gallium nitride (GaN) layer to form a low-ohmic An excellent interface for contact resistance, and its manufacturing method, which can be applied to light-emitting diodes, laser diodes, microwave components, etc.

Background technique

As we are familiar in this field, in order to manufacture semiconductor devices, such as optical components (ie, light emitting diodes, laser diodes or microwave components), it is most important to provide an ideal ohmic contact at the junction of a semiconductor layer and a metal layer. needs. For Group III and V compound semiconductors, the conditions for forming an ideal ohmic contact include smooth surface morphology, good thermal stability, simple manufacturing process, low contact resistance, high production yield and good adhesion. Since gallium nitride-based compound semiconductors such as gallium nitride, gallium aluminum nitride (GaAlN), gallium indium nitride, and gallium indium aluminum nitride (InAlGaN) have a direct energy band gap ranging from 1.95eV to 6eV, so , this class of compound semiconductors is considered the best material for light-emitting components such as light-emitting diodes and laser diodes.

A prior art for forming ohmic contacts for optical components can be referred to US Patent No. 5,563,422 entitled "GaN-based Group III and V Compound Semiconductor Devices and Method for Making the Same". In the above-mentioned US patent, an electrode, covered with a metal thin film, is used instead of a transparent electrode, because some problems arise in an n-type ohmic resistor due to the poor conductor properties of the transparent electrode or a sapphire substrate. However, the technique disclosed in the above-mentioned US patent is problematic in electrodes covered with a metal film, which does not allow light to pass through efficiently. In Material Research Society Symposium Proceeding 449, 1061, 1997, T.Kim et al reported a specific contact resistance Rc, 8.3×10 ^-2 Ωcm, formed in nickel/chromium/gold mode for ideal ohmic contact ^-2 , which is subjected to a heat treatment process at 500° C. for 30 minutes. In the same conference proceedings 449, 1093, 1197, JTTrexler et al. reported a specific contact resistance Rc, 4.3×10 ^-1 Ωcm ^-2 , for ideal ohmic contacts formed in a chromium/gold pattern at 900°C The heat treatment process was carried out for 15 minutes.

In the prior art, there have been many references disclosing methods of forming a nickel or platinum ohmic contact in a metal thin film for an optical component. However, it is impossible to form a p-type GaN ohmic contact in a metal thin film according to the techniques in the prior documents.

Contents of the invention

As mentioned above, such a defective ohmic contact formed in the metal thin film can cause significant problems in the CW mode of gallium nitride light-emitting diodes (GaN LEDs) and laser diodes (LDs). In order to overcome the above-mentioned problems, the inventors of the present invention have actively studied an ohmic contact in which a p-type gallium indium nitride is inserted into a p-type group III-V layer mainly composed of gallium nitride and a metal electrode. layer. The above-mentioned structure and method of the present invention are different from those for forming a typical p-type ohmic contact in Ni/Au or Ni/Cr/Au mode, so an ohmic contact with low resistance can be formed.

Therefore, in order to solve the disadvantages caused by the above-mentioned methods and components in the prior art, the present invention mainly provides a semiconductor device with low ohmic contact resistance and a manufacturing method thereof, wherein a p-type gallium nitride layer is formed on a p-type gallium nitride layer A p-type InGaN layer is used to reduce the ohmic contact resistance between the metal layer and the p-type GaN layer. By adding a p-type indium gallium nitride layer on the p-type gallium nitride layer of the semiconductor device, the energy level band gap between the metal and the semiconductor can be effectively reduced and can be crossed more easily.

The present invention mainly also provides a light-emitting component with low ohmic contact resistance and a manufacturing method thereof, wherein a p-type gallium indium layer is formed on a p-type gallium nitride layer to reduce the intervening metal layer and p-type nitrogen Ohmic contact resistance between GaN layers. By adding a p-type indium gallium nitride layer on the p-type gallium nitride layer of the light-emitting component, the energy level band gap between the metal and the semiconductor will be effectively reduced and can be crossed more easily.

Therefore, an object of the present invention is to provide a semiconductor device having a p-type InGaN layer disposed on a p-type GaN layer, and a manufacturing method of the semiconductor device.

Another object of the present invention is to provide a semiconductor device with low-resistance ohmic contacts and a manufacturing method thereof.

Another object of the present invention is to provide a light-emitting component, which has a p-type InGaN layer disposed on a p-type GaN layer, and a manufacturing method of the light-emitting component.

Another object of the present invention is to provide a light-emitting element with a low-impedance ohmic contact, and a manufacturing method thereof.

According to the above purpose, the present invention provides a semiconductor device, which at least includes a substrate, a p-type gallium nitride layer formed on the substrate, a p-type gallium indium layer formed on the p-type gallium nitride layer Above, a metal layer is formed on the p-type gallium indium nitride layer and its manufacturing method.

Furthermore, the present invention provides a light-emitting component, which at least includes a substrate, a buffer layer formed on the substrate, an n-type cladding layer formed on the buffer layer, and an active layer formed on the n-type cladding layer. layer, a p-type cladding layer is formed on the active layer, a p-type gallium indium nitride layer is formed on the p-type cladding layer, a metal layer is formed on the p-type gallium indium nitride layer and its Manufacturing method.

Description of drawings

1A to 1B are cross-sectional views of a p-type semiconductor device structure using conventional prior art;

Fig. 2 is a sectional view of the semiconductor device structure of Embodiment 1 in the present invention;

Fig. 3 is a cross-sectional view of the structure of the light-emitting component in Example 2 of the present invention;

4A to 4B are cross-sectional views of the manufacturing process of the light-emitting component in Embodiment 2 of the present invention;

5 is a cross-sectional view of the manufacturing process of the light-emitting component in Example 2 of the present invention;

6 is an electrical schematic diagram of bias voltage v.s. current of the present invention and conventional p-type semiconductor devices.

Description of main symbols in the figure

5 Substrate

10 buffer layer

15 undoped gallium nitride layer

20 p-type gallium nitride layer

25 nickel

30 Platinum

35 gold

40 Al2O3 (sapphire) layer

45 undoped gallium nitride layer

48 p-type gallium nitride layer

50 Substrate

60 p-type gallium nitride layer

65 p-type gallium nitride layer

68 gallium nitride semiconductor

70 metal layers

75 Substrate

80 aluminum nitride

85 n-type gallium nitride cladding layer

90 n-type aluminum gallium nitride cladding layer

95 InGaN active layer

100 p-type AlGaN cladding layer

105 p-type gallium nitride cladding layer

110 p-type gallium nitride layer

113 gallium nitride semiconductor

115 metal layers

120 n-type electrode

Detailed ways

The specific implementation manner of the present invention will be described in detail below in conjunction with the accompanying drawings and examples.

Example 1

As shown in Figure 2, first, the substrate 50 (the preferred material in the present invention is Al2O3, sapphire) is loaded into a reactor, and hydrogen (H ₂ ) is passed through at about 1050 ° C, about 10 minutes to heat clear the substrate 50. Then, by liquid phase epitaxy growth method, organic metal vapor phase epitaxy growth method, molecular beam epitaxy growth method or other existing technologies (for example, using ammonia and trimethyl gallium (TMG, trimethyl gallium) as precursor reaction material), and select CP ₂ Mg (biscyclopentadinel magnesium) or dimethyl zinc (DMZn, dimethylzinc) as the reaction precursor for the p-type dopant at the same time, to form a p-type nitride on the substrate 50 The thickness of the gallium layer 60 is about 10 nm to 2000 nm, preferably 200 nm.

Then, a p-type gallium indium layer 65 is formed on the p-type gallium nitride layer 60 by feeding trimethyl indium (TMI, trimethyl indium), TMG and ammonia into the reactor, and its thickness is about 5 nm to 1000 nm, preferably 100 nm, and the most important point is that in the p-type InGaN layer 65 , the content of indium is preferably greater than 0.05 weight percent. Thus, a gallium nitride semiconductor 68 is formed.

Next, the gallium nitride semiconductor 68 formed in the above steps is passed through various cleaning solutions: trichlorethylene, acetone, methanol and distilled water, and each solution is repeatedly cleaned for 5 minutes in an ultrasonic bath at 50° C. After the cleaning step, the GaN semiconductor 68 is dried at 100° C. through a hard bake process for 10 minutes, thereby completely removing moisture. Photoresist is coated on the GaN semiconductor 68 by a spin-coating process at 5500 rpm. Thereafter, the GaN semiconductor 68 is soft-baked at 85° C. for 15 minutes before developing the mask pattern. In order to form a mask pattern on the GaN semiconductor 68, a photomask is precisely placed on the GaN semiconductor 68 before exposure to ultraviolet light for 60 seconds. After exposure to ultraviolet light, the GaN semiconductor 68 is subjected to a back bake at 115°C. Then, mix the developer with distilled water to form a solution, and develop for about 40 seconds.

Next, a vapor deposition step is performed to form a metal layer 70 on the p-type InGaN layer 65 of the GaN semiconductor 68 . In the above vapor deposition step, at least one of nickel, platinum and gold or an alloy thereof is deposited on the p-type indium gallium nitride layer 65 of the gallium nitride semiconductor 68 with a thickness of about 200 nm ~1000 nm.

Example 2

(Epitaxy process)

As shown in Figure 3, at first, load a substrate 75 (the preferred material in the present invention is aluminum oxide, sapphire) to a reactor and feed nitrogen gas at 1050°C for about 10 minutes, heat in this way The surface of the substrate 75 is cleaned.

Then, the temperature of the substrate 75 is lowered to 600° C., and ammonia gas is used as a nitride precursor, and trimethyl aluminum (TMA, trimethyl aluminum) is used as an aluminum precursor. By liquid phase epitaxy growth method, organometallic vapor phase epitaxy growth method, molecular beam epitaxy growth method or other existing technologies, the above-mentioned substances are introduced into the reactor to form an aluminum nitride buffer layer 80 on the substrate 75, and its thickness is about 50 nm.

Next, at about 700˜1200° C., ammonia gas and trimethylgallium (TMG) are used as precursors to form an n-type GaN cladding layer 85 with a thickness of about 200 nm. Meanwhile, methyl silane (Me-SiH ₃ , methyl silane) is used as a precursor of an n-type dopant.

Then, trimethylaluminum (TMA) is added to the gas, thereby forming an n-type AlGaN layer doped with silicon. Thus, an n-type AlGaN cladding layer 90 with a thickness of about 200 nm is formed.

Next, trimethylindium (TMI), trimethylgallium (TMG) and ammonia gas are introduced into the reactor to form an active layer 95 of indium gallium nitride with a thickness of about 20 nm.

Next, use the same gas used to form the n-type aluminum gallium nitride cladding layer 90, except for methyl silicon (Me-SiH), CP ₂ Mg, and dimethyl zinc (DMZn), to form a p-type aluminum nitride GaAl cladding layer 100.

Next, a p-type GaN layer 105 is formed using the same gas as that used to form the n-type GaN layer, except for methyl silicon (Me-SiH), CP ₂ Mg and dimethyl zinc (DMZn). The thickness is about 10 nm to 2000 nm, preferably 400 nm.

Finally, a p-type gallium indium nitride layer 110 is formed on the p-type gallium nitride layer 105 by introducing trimethylindium (TMI), trimethylgallium (TMG) and ammonia gas into the reactor, the thickness of which is It is about 5 nm to 1000 nm, preferably 100 nm, and the most important point is that the content of indium in the p-type GaInN layer 110 is preferably greater than 0.05 weight percent. Thus, a gallium nitride semiconductor 113 is formed by laminating each of the above-mentioned layers.

(Light-emitting component manufacturing process)

The steps of forming the light-emitting element, one of the features of the present invention, will be described in detail below.

As shown in FIG. 4A , in the above epitaxial growth process, an etching step is performed in order to contact the n-type electrode. In the etching process, an etching mask is formed by means of optical lithography, so that the unnecessary part of the p-type GaN layer is removed by an inductively coupled plasma etching method (Inductively Coupled Plasma, ICP), whereby the part part contacts the n-type gallium nitride cladding layer 85.

This process is not required if the n-type electrode is to be contacted elsewhere. After this portion contacts the n-type GaN cladding layer 85, a first annealing process is performed to lower the resistance as described below.

The entire gallium nitride semiconductor 113 is placed in a nitrogen atmosphere at about 800°C for about 20 minutes, and the p-type layer therein is activated to reduce resistance, which is caused by the inconsistency of magnesium, zinc and hydrogen doped in the p-type layer of.

As shown in FIG. 4B , next, a metal layer 115 is formed on the p-type InGaN layer 110 to cover a current introduction region. The elongated metal layer 115 has a width of 200 nm˜2000 nm. The metal layer uses one of nickel, platinum, and gold, and is formed by conventional methods such as vapor deposition, sputtering, and electroplating. Each of these has a large work function. In particular, it is preferable to use a metal that has no penetration of hydrogen atoms and has good electrical contact with the p-type InGaN layer 110 .

On the exposed area of the n-type GaN cladding layer 85, an n-type electrode 120 is formed by evaporating carbon and germanium (Ge) with a thickness of about 50 nm and then evaporating gold with a thickness of about 200 nm. Thus, a light-emitting component manufacturing process is completed.

As shown in Figure 5, Figure 6 and Table 1, we can find that in the present invention, the contact resistance is reduced from 40KΩ to 14KΩ and the sheet resistance is reduced from 79KΩ/□ to 61KΩ/□, therefore, the novelty in the structure of the present invention is provided The p-type InGaN layer does work effectively as we want.

Although the above-mentioned embodiment 2 has a double heterostructure, the present invention can also be applied to other junction structures, such as a pn homo-junction diode, heterostructure and other structures, and can be used to fabricate single-carrier transistors, such as field effect transistors, or components such as laser diodes and microwave components.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention; all other equivalent changes or modifications that do not deviate from the spirit disclosed in the present invention should be included in the claims In the range. p-type gallium indium nitride layer p-type gallium nitride layer Contact resistance: 14KΩ Contact resistance: 40KΩ Sheet resistance: 61KΩ/□ Sheet resistance: 79KΩ/□ Energy gap: 3eV (x ~ 15%) Energy gap: 3.4eV

Table I

*Table 1 shows the measurement results in Figure 5

Claims (7)

1. the semiconductor device with an ohmic contact is characterized in that, comprises at least:

One ground;

One p type gallium nitride layer (GaN) is on this ground;

One p type indium gallium nitride (In _xGa _1-xN) layer, on this p type gallium nitride layer, 0＜x＜1 wherein; And

One metal level is on this p type indium gallium nitride layer.

2. semiconductor device as claimed in claim 1 is characterized in that, this ground comprises an alundum (Al (sapphire) layer at least.

3. semiconductor device as claimed in claim 1 is characterized in that, this p type gallium nitride layer is Al _xGa _yIn _zN, and 0≤x, y, z≤1, x+y+z=1.

4. semiconductor device as claimed in claim 3 is characterized in that, the thickness of this p type gallium nitride layer be 10 how rice to 2000 rice how.

5. semiconductor device as claimed in claim 1 is characterized in that, the thickness of this p type indium gallium nitride layer be 5 how rice to 1000 rice how.

6. semiconductor device as claimed in claim 1 is characterized in that, this metal level is selected from a kind of of following each material at least: nickel, platinum, palladium and gold.

7. semiconductor device as claimed in claim 1 is characterized in that, more includes a transparent electrode layer, and it is formed on this p type indium gallium nitride layer.

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