WO2000036556A1

WO2000036556A1 - Charge sharing delay circuit for passive radio frequency (rf) tags

Info

Publication number: WO2000036556A1
Application number: PCT/US1999/027517
Authority: WO
Inventors: Daniel J. Friedman
Original assignee: Intermec Ip Corp.
Priority date: 1998-11-19
Filing date: 1999-11-19
Publication date: 2000-06-22

Abstract

A charge sharing delay circuit which produces a delay substantially independent of the voltage of the circuit is disclosed. With appropriate feedback circuits, the circuit of the invention may be used as an oscillator in a passive RF Tag.

Description

CHARGE SHARING DELAY CIRCUIT FOR PASSIVE RADIO FREQUENCY (RF) TAGS

FIELD OF THE INVENTION The field of the invention is the field of Radio Frequency (RF) transponders (RF Tags) which receive RF electromagnetic radiation from a base station and send information to the base station by modulating the load of an RF antenna.

BACKGROUND OF THE INVENTION RF Tags can be used in a multiplicity of ways for locating and identifying accompanying objects, items, animals, and people, whether these objects, items, animals, and people are stationary or mobile, and transmitting information about the state of the of the objects, items, animals, and people. It has been known since the early 60's in US Patent 3,098,971 by R.M. Richardson, that electronic components on a transponder could be powered by radio frequency (RF) power sent by a "base station" at a carrier frequency and received by an antenna on the tag. The signal picked up by the tag antenna induces an alternating current in the antenna which can be rectified by an RF diode and the rectified current can be used for a power supply for the electronic components. The tag antenna loading is changed by something that was to be measured, for example a microphone resistance in the cited patent. The oscillating current induced in the tag antenna from the incoming RF energy would thus be changed, and the change in the oscillating current led to a change in the RF power radiated from the tag antenna. This change in the radiated power from the tag antenna could be picked up by the base station antenna and thus the microphone would in effect broadcast power without itself having a self contained power supply. In the cited patent, the antenna current also oscillates at a harmonic of the carrier frequency because the diode current contains a doubled frequency component, and this frequency can be picked up and sorted out from the carrier frequency much more easily than if it were merely reflected. Since this type of tag carries no power supply of its own, it is called a "passive" tag to distinguish it from an active tag containing a battery. The battery supplies energy to run the active tag electronics, but not to broadcast the information from the tag antenna. An active tag also changes the loading on the tag antenna for the purpose of transmitting information to the base station.

The "rebroadcast" or "reflection" of the incoming RF energy at the carrier frequency is conventionally called "back scattering", even though the tag broadcasts the energy in a pattern determined solely by the tag antenna and most of the energy may not be directed "back" to the transmitting antenna.

In the 70's, suggestions to use tags with logic and read/write memories were made. In this way, the tag could not only be used to measure some characteristic, for example the temperature of an animal in US patent 4,075,632 to Baldwin et. al., but could also identify the animal. The antenna load was changed by use of a transistor. A transistor switch also changed the loading of the transponder in US patent 4,786,907 by A. Koelle.

Prior art tags have used electronic logic and memory circuits and receiver circuits and modulator circuits for receiving information from the base station and for sending information from the tag to the base station.

The continuing march of semiconductor technology to smaller, faster, and less power hungry has allowed enormous increases of function and enormous drop of cost of such tags. Presently available research and development technology will also allow new function and different products in communications technology.

Prior art tags which use a different frequency than that of the base station carrier frequency are disadvantageous in that the tag and base station antennas usually have maximum efficiency if it they are designed for a single frequency.

Prior art battery tags which use the same frequency as that of the base station must modulate the antenna reflectance with a well defined modulation frequency so that the base station can distinguish the modulated reflected signal from the various sources of noise. Prior art battery tags carry an oscillator as part of the circuitry needed to receive and send data between the tag and the base station. This oscillator needs a local frequency standard to fix the tag modulation frequency so that the base station can easily and cheaply receive and demodulate the modulated signal sent by the tag. Such local frequency standards are very expensive and hard to integrate on a monolithic semiconductor chip. The tags require an oscillator which draws a lot of current from the tag power supply, either from a battery tag or a passive tag, which lowers either the life of the battery or the range of the tag, respectively. In addition, the base station may have to adjust to the modulation frequency sent out by the tag, which requires that the base station listens to the tag in the first step of the communication procedure, instead of talking to the tag first. This complicates communication procedures when there are multiple tags in the field. Each tag may be sending signals to the base station with a different modulation frequency, and the signals will interfere.

A passive RF tag which has a tag oscillator where the frequency of the tag oscillator is set by a signal sent out from a base station is disclosed in the allowed co- pending patent application 08/780,765 (Now patent 5,912,632) by Dieska et al. This tag oscillator has the disadvantage, however, that the tag oscillator frequency may change as the tag voltage changes due to change in orientation or distance of the tag with respect to the base station which is sending out power to the tag.

RELATED PATENTS AND APPLICATIONS Related U.S. Patents assigned to the assignee of the present invention include: 5,528,222; 5,550.547; 5,552,778; 5,554,974; 5,538,803; 5,563,583; 5,565,847; 5,606,323; 5,521,601; 5,635,693; 5,673,037; 5,682,143; 5,680,106; 5,729,201; and 5,729,607. U.S. Patent applications assigned to the assignee of the present invention include: serial No. 08/303,965 filed Sept. 9, 1994 entitled RF Group Select Protocol, by Cesar et al. ; serial No. 08/621,784 , filed on March 25, 1996 entitled "Thin Radio Frequency Transponder with Lead Frame" by Brady et al. (pending); serial No. 08/626,820, Filed: 4/3/96, entitled "Method of Transporting RF Power to Energize Radio Frequency Transponders", by Heinrich et al.; application submitted 8/9/96 entitled RFID System with Broadcast Capability by Cesar et al. ; application submitted 07/29/96 entitled RFID transponder with Electronic Circuitry Enabling and Disabling Capability, by Heinrich et al.;serial No. 08/496,838; serial No. 08/592,250; serial No. 08/909,719 ; serial No. 08/621,784; serial No. 660,249 ; serial No. 08/660,261 ; serial No. 08/790,640 ; serial No. 08/790,639 ; serial No. 08/780,765; and serial No. 08/ 681,742. The above identified U.S. Patents and U.S. Patent applications are hereby incorporated by reference. OBJECTS OF THE INVENTION It is an object of the invention to produce an RF transponder comprising circuits which can be made at low cost. It is a further object of the invention to produce an RF transponder which can be used at high frequencies. It is a further object of the invention to produce an RF transponder with maximum range. It is a further object of the invention to produce an RF transponder with circuits which require very little current. It is a further object of the invention to produce an electronic chip for an RF transponder which can be produced simply with standard semiconductor manufacturing techniques. It is a further object of the invention to produce a communication system for communicating with the RF transponder of the present invention. It is a further object of the invention to produce a system for controlling the communication system using the present invention. It is a further object of the invention to produce a system for using and changing information received from the transponder of the present invention. It is a further object of the invention to produce a delay circuit for a passive RF tag where the delay is substantially independent on the tag voltage. It is a further object of the invention to provide an electronic delay circuit where the delay is substantially independent of the circuit voltage. It is a further object of the invention to provide an oscillator circuit where the oscillator frequency is substantially independent of the circuit voltage. It is a further object of the invention to provide a passive RF tag having a tag oscillator where the oscillation frequency may be set by signal from a base station, and where the oscillation frequency is substantially independent of the tag voltage.

SUMMARY OF THE INVENTION

The present invention is to have a delay circuit and a passive RF tag oscillator using the delay circuit where the circuit delay and the oscillation frequency are substantially independent of the tag voltage over a wide range of tag voltage. An innovative low current delay circuit and tag oscillator design accomplishes this invention.. The innovative delay circuit comprises a first capacitor which is initially charged to the tag voltage. The first capacitor then shares the charge with a second capacitor. When the voltage ratios on the two capacitors reach a defined ratio, a signal is generated. The time taken for the charge to be shared in the defined ratio between the two capacitors may be substantially independent of the initial charging voltage. A feedback circuit which discharges the two capacitors and then recharges the first capacitor allows the delay circuit to oscillate with an oscillation frequency which is substantially independent of the tag voltage. The innovative delay circuit of the invention may be used to advantage in any devices having a variable supply voltage.

BRIEF DESCRIPTION OF THE DRAWINGS

Fig. 1. A system of a base station and an RF tag.

Fig. 2. A block diagram of part of the RF tag.

Fig. 3. A block diagram of the tag clock section.

Fig. 4. is a block diagram for the tag oscillator section.

Fig. 5. shows the tag oscillation frequency vs voltage VDD.

Fig. 6. shows a circuit diagram for a tag oscillator.

Fig. 7. shows a circuit diagram of the apparatus of the invention.

Fig. 8. shows the voltages versus time t on , C₂ and the voltage on minus Δ.

Fig. 9. shows the most preferred embodiment of the invention.

Fig 10. shows the additional details of the circuit of fig. 9.

Figs. 11a and l ib show a complete oscillator circuit using the circuit of the invention.

DETAILED DESCRIPTION OF THE INVENTION

Fig. 1 shows a system of a base station 10 having an associated computer 5 sending RF energy 20 from base station antenna 12 to a tag antenna 32 associated with an RF tag 30. The RF frequency f₀ is preferably above 100 MHZ, more preferably above 900 MHZ, and most preferably above 2,300 MHZ. The RF signal is preferably amplitude modulated at a frequency f_t greater than 1 Khz, more preferably between 5 and 150 kHz, and most preferably between 20 and 60 kHz. However, the RF signal may also be modulated by frequency modulation or by phase modulation methods, as is well known in the art of RF signal propagation. The RF tag 30 may be a passive tag which receives all the energy needed to carry out the tag functions from the RF field broadcast by the base station, or it may be an active tag which carries a battery to store the required energy. An active tag may, and a passive tag will, change the loading on the tag antenna 32 to change the antenna reflectivity and thus communicate with the base station 10.

Fig. 2 shows a block diagram of the tag antenna 32 and part of the RF tag 30. (Neither a possible RF tag transmitter section nor other sections such as measurement sections nor alarm section nor enable/disable sections are shown.) The RF antenna 32 feeds RF power to the tag rectification power supply 34. A battery tag would replace block 34 with a battery (not shown). In the preferred embodiment shown in Fig. 2, a tag rectification signal receiving section 36 comprising an RF diode, a signal capacitor, and a signal capacitor current drain is separate from the tag rectification power supply, but the oscillator section of the invention is also contemplated in the case that section 36 is part of the tag rectification power supply 34. The tag power supply 34 supplies current at voltage VDD on line 52, and optionally supplies voltages VPMR, and VNMR on lines 54 and 56 respectively. These lines are used to power and control the various devices on the tag. The RF antenna 32 has two connections to the tag 30, denoted here by lines 50 and 58. Line 58 is the conventional ground.

The tag rectification signal receiving section 36 receives an RF signal which is preferably amplitude modulated at a frequency fj from the antenna 32 over line 50, and rectifies and demodulates the RF signal and delivers a digital signal to the rest of the tag electronics over line 62. If the RF is modulated with a steady modulation frequency f_l5 the output of the signal receiving section 36 is preferably a series of square pulses of unit voltage at a frequency fi.. However, any pattern or subpattern in the signal sent out from the base station could be used to generate an output of the signal receiving section 36 in order to adjust the frequency and optionally the phase of the tag oscillator.

The tag clock section 40 receives the digital demodulated digital signal from line 62 and sets the tag oscillator frequency using the modulation frequency f _\ of the modulated RF signal as will be explained later.

The tag clock section 40 delivers a digital clock signal on line 102 to the tag logic section 42, to the tag memory section 44, and to other tag electronic sections as needed.

Fig. 3 is a block diagram of the tag clock section 40. The tag oscillator 100 must use less than 500 microamperes of current from the tag power supply 34 in order to avoid drawing down the tag voltage VDD and lowering the range of the tag. It is more preferred that the tag oscillator uses less than 50 microamperes of current. It is even more preferred to have the tag oscillator draw less than 5 microamperes of current when the tag oscillator is oscillating with maximum oscillation frequency, and less than 150 nanoamperes of current when the tag oscillator is oscillating with minimum frequency.

The tag oscillator frequency is set by the voltages supplied by a connection denoted 302 from a calibrate module 300. The tag oscillator 100 supplies a local clock signal to the local clock counter 200 over line 101. The local clock counter 200 counts the clock ticks of the local clock signal since the local clock counter 200 has been reset and passes the count to the calibrate module 300 via a connection 304. The calibrate module 300 resets the local clock counter 200 via the connection 304 (and optionally resets the phase of the oscillator 100 over connection 116) on a rising edge of the digital input signal on line 62, and sets the voltages controlling the frequency of oscillator 100 to give a set number of counts between two rising edges of the digital input signal 62 when the base station 10 is sending a steadily modulated RF signal. The calibrate module 300 sends the voltages controlling the frequency of the oscillator 100 over line 302. The oscillator 100 frequency is thus determined by the modulation frequency of the RF energy 20 transmitted by the base station 10. While the calibrate module may carry out its functions using a rising edge of the digital input signal, it is clear to one skilled in the art that the falling edge of the digital signal, or indeed any characteristic of the signal on line 62, may serve as well. The calibrate module sends the digital clock signal to the rest of the tag electronics over line 102.

Fig. 4 is a block diagram for the oscillator section 100 described in great detail in patent application 08/780,765. A current source section 104 charges a capacitor section 106. The voltage across capacitor section 106 on line 119 is compared with a reference voltage generated on the chip. The comparison is done in comparator section 108, and when the voltage reaches a preset comparison voltage, the comparator section 108 sends a signal on line 118 down an optional pulse sharpening and delay section 112. The current source section 104, the capacitor section 106, the comparator section 108, and the reference voltage form a time delay circuit. When the pulse reaches the end of the pulse sharpening and delay section 112, a local clock signal is sent out on line 101, and a pulse is fed back on line 114 to transistor 110 which discharges capacitor section 106 so that the voltage across capacitor section 106 falls to a low value. Then the voltage starts to build up until it again reaches the preset comparison voltage. The time delay circuit and the feedback circuit then act as an oscillator. The time between two discharges of the capacitor section 106 is the time between two ticks of the local clock. A series of narrow spikes is sent out from the oscillator section on line 101 representing ticks of the local clock..

A phase reset signal is brought in to the sharpen and delay module on line 116 when, for example, the tag detects a rising or falling edge of the digital signal on line 62. The sharpen and delay module 112 then sends a pulse on line 114 to the transistor 110 to both discharge the capacitor section 106 and reset the phase of the local clock signal on line 101. The phase reset signal also serves to clear the sharpen and delay line in the sharpen and delay module 112. A signal is also sent on line 117 to clear the voltage comparator section 108 when the phase reset signal passes through the sharpen and delay line.

One or more of the sections 104, 106, and 108 are digitally controlled by signals from the calibrate module 300 sent out on line 302. These calibrate module outputs are set using base station output modulation patterns. Thus, the tag oscillator frequency is controlled by the signals from the base station to be one of a plurality of possible discrete frequencies. Circuits for analog control of the tag oscillator are anticipated by the inventors, but the digital control is preferred since the circuits required are more stable and require less current.

The tag oscillator disclosed in the above identified application works well if the voltage VDD remains constant and if the temperature of the tag is held relatively constant and there is relatively little variation in the manufacturing of the devices on the chip. However, if the oscillator frequency is set by the method disclosed, and then the voltage VDD changes when the tag orientation or distance from the base station changes. The maximum tag oscillation frequency varies with VDD as shown in fig. 5. The variation of the tag oscillator frequency actually set in a communication protocol would vary in a similar fashion if the tag voltage changed during the communication protocol. The parameters of the oscillator are chosen so that the maximum oscillation frequency has a broad maximum in the expected range of tag voltage VDD, but the maximum tag oscillation frequency may vary by as much as 15% over the expected change in tag voltage. The entire curve shown in fig. 5 shifts up and down with tag temperature or variation in manufacturing so that the only a narrower range of frequencies may used to communicate with tags of different temperature and supply voltage.

The oscillator disclosed in patent application 08/780,765 may be described by the circuit diagram of fig. 6. The oscillator comprises two parts, a time delay circuit 610 and a feedback circuit 615 which feeds back the output pulse 620 through a time delay 625 to a transistor 630 which discharges a capacitor 635. After the capacitor is discharged, a constant current source 640 recharges capacitor 635 When the voltage on the capacitor 635 reaches the threshold voltage 645, the comparator 650 output changes state, initiating the next event. The current from current source 640, the value of the capacitor 635, or the threshold voltage 645 may be set by signal from the base station in order to change the time delay produced by delay circuit 610, and hence the oscillator frequency produced in the combination time delay circuit 610 and the feedback circuit 615.

The apparatus of the invention is shown in figure 7. The delay circuit 710 delivers a pulse on line 720 to a feedback circuit 715. The feedback circuit 715 delays the pulse on line 720 in delay circuit 725, and the output pulse from feedback circuit 715 is used to reset the time delay circuit 710 and cause the delay circuit 710 and the feedback circuit 715 to oscillate. Many electronic devices require a time delay circuit where the time delay is independent of the circuit supply voltage, and the apparatus of the invention provides such a time delay circuit for all such devices which rely on broadcast power, such as RF transponders, and for devices which rely on batteries. (Toward the end of battery life, the voltage drops rather slowly, and the life of the device may be substantially lengthened by the delay circuit of the invention). The essence of the invention is that a first capacitor C is charged at time t=0, while a second capacitor C₃ is uncharged. The charge on is then shared between capacitors Ci and C₃ as capacitor C₃ is charged from capacitor by leaking charge through resistance R. The voltage on capacitor is then compared with the voltage on capacitor C₃ by comparator 750, which produces a pulse when the voltage on capacitor C₃ has a defined relation with the voltage on capacitor Ci. In the case shown in fig. 7, a voltage offset device 760 is used to set the defined relation. Transistors Mi and M₃ are used to discharge the capacitors Ct. and C₃ to reset the delay circuit. The reset pulse on line 765 discharges the capacitors, and then recharges Ci. after passing through delay 770 to turn on transistor M₅ so that the delay circuit 710 and feedback circuit form an oscillator.

Fig. 8 shows the voltages versus time t on , C₃ and the voltage on Ci minus Δ, the offset voltage produced by voltage offset device 760. The delay time τ is given by the time from the time that capacitor Ci is charged until the time that C₃ reaches C_r Δ.

The delay time τ produced by the circuit 710 is substantially independent of the voltage VDD. However, if the voltage offset Δ is constant, the time delay will vary slightly with VDD. A variable offset voltage source may be used to minimize the effect of changing VDD on the time delay τ. A comparator 750 may also be built having a built in offset between its two inputs.

Fig. 9 shows the most preferred embodiment of the invention. Capacitors - C are initially uncharged. An input pulse switches transistor M5 and charges the capacitors Ci and C₂ in series. The charge on capacitors Ci. and C₂ is then shared with capacitors C₃ and C by draining charge through resistor R. The capacitance ratios of capacitors and C₂ and capacitors C₃ and C may be chosen at will. Immediately after the infput pulse, the voltage across C₂ will exceed the voltage across C . If /C₂ > C₃/C , as charge sharing occurs among the capacitors mediated by resistor R, thre will come a time τ _cross beyond which the voltage across C₂ will be less than that across C This time τ _cross is given by τ cross = R {C_pre C_post / [C_pre + C_post]} ln{ g( b - a)/ [a (1-g) + bg]} (1)

where C_pre = (1/C, + l/C,)^"1 ; C_post = (1/C₃ +

; a = C, / ( d + C₂); b = C₃ / (C₃ + C₄ ) ; and g = C_pre/ [C_pre + C_post]- The voltage across capacitor C₂ and the voltage across capacitor C are compared by comparator 950. The comparator output 920 changes when the voltages cross. The delay circuit of fig. 9 may be used in an oscillator set up by feeding back the delayed pulse to discharge capacitors -C₄ and then recharge the capacitors and C₂ in series from supply voltage VDD. Any of the circuit elements Cj -C and R may be digitally set to change the time delay of circuit 910 and the oscillation frequency of an oscillator derived from circuit 910 with the addition of a feedback loop. The most preferred circuit element for digital setting is the resistance R. The circuit of fig 9 gives a time delay between charging capacitors and C₂ and production of a pulse from comparator 950 which is independent of the charging voltage VDD, as long as VDD is sufficient to run the circuit electronics.

Fig 10 shows the circuit of fig. 9 with the addition of transistors Ml to M4 to discharge capacitors Ci -C₄.

The most preferred feedback circuit for producing an oscillator from circuit 910 is to use a slight delay between the pulse out from comparator 950 and the pulse clearing capacitors C₃ and C , a further slight delay in clearing capacitors and C₂, and a further slight delay in switching transistor M5 in order to charge capacitors and C₂. A complete circuit which has been simulated and shown to work at 30C and down to VDD= 1 volt is shown in figures 11a and 1 lb. The most preferred embodiment for a variable delay set by external signals is shown in fig. 11a, wherein the delay and oscillation frequency is set by switching resistors in series. It is however clear to one skilled in the art that capacitors may also be switched in and out of the circuit as detailed in the above identified copending application.

Obviously, many modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that, within the scope of the appended claims, the invention may be practiced otherwise then as specifically described.

Claims

We claim:

1. A passive radio frequency (RF) transponder (tag), comprising:

a tag antenna for receiving power and information signals from a base station;

a tag power supply for receiving power from the tag antenna and supplying power at a supply voltage VDD to tag electronics;

a tag delay circuit receiving power from the tag power supply, the tag delay circuit having a delay to, where t₀ is substantially independent of VDD over a broad range of voltage

2. The RF tag of claim 1, wherein the tag delay circuit comprises a charge sharing circuit.

3. The RF tag of claim 2, wherein charge sharing circuit comprises:

a first capacitor d;

a first means for charging the first capacitor with an amount Q of charge, the first means transferring charge on signal from a first pulse;

a second capacitor C ;

a second means for transferring charge from the first to the second capacitor; and

a third means for comparing the charge on C₂ with the charge remaining on , wherein the third means produces a second pulse when the charges on C₂ and Ci have a defined relationship, whereby t₀ is the delay time between the first and the second pulses.

4. The RF tag of claim 3, wherein:

the first means is a transistor connected between a line with voltage VDD and a first terminal of ;

the second means is a resistor connected between the first terminal of and a first terminal of C₂, and wherein the second terminal of is connected to the second terminal of C₂;

the third means is a comparator comparing the voltage across C₂ with the a voltage from a voltage offset generator connected to the first terminal of Ci.

5. The RF tag of claim 3, wherein at least one of the capacitors and C₂ may have a variable capacitance set by the tag circuitry.

6. The RF tag of claim 3, wherein the resistor may have a variable resistance set by the tag circuitry.

7. The RF tag of claim 3, wherein the comparator may have a variable threshold set by the tag circuitry.

8. The RF tag of claim 2, wherein charge sharing circuit comprises:

a first capacitor Ci. and a second capacitor C₂ connected in series;

a first means for charging and C₂ with an amount Q of charge, the first means transferring charge Q on signal from a first pulse;

a third capacitor C₃ and a fourth capacitor C₄ connected in series;

a second means for transferring charge from and C₂ to C₃ and C ; and a third means for comparing the charge on C₄ with the charge remaining on C₂, wherein the third means produces a second pulse when the charges on C₄ and C₂ have a defined relationship, whereby t₀ is the delay time between the first and the second pulses.

9. The RF tag of claim 8, wherein:

the first means is a transistor connected between a line with voltage VDD and a first terminal of Ci;

the second means is a resistor connected between the first terminal of and a first terminal of C₃;

the second terminal of Ci is connected to a first terminal of C₂;

the second terminal of C₂ is connected to a second terminal of C₄;

the second terminal of C₃ is connected to the first terminal of C ; and

the third means is a comparator comparing the voltage across C₂ with the voltage across C .

10. The RF tag of claim 9, wherein any of the capacitances of the capacitors C\, C₂ ,

C₃ and C , the resistance of the resistor, or the comparator threshold may have values set by the tag circuitry.

11. The RF tag of claim 1, further comprising

a tag oscillator receiving power from the tag power supply, the tag oscillator having a frequency of oscillation f₀, where f₀ is substantially independent of VDD over a broad range of voltages

12. The RF tag of claim 11, wherein the tag oscillator comprises;

a delay circuit comprising a charge sharing circuit; and

a feedback circuit feeding back the output of the delay circuit to the input of the delay circuit.

13. The RF tag of claim 12, wherein the charge sharing circuit comprises:

a first capacitor and a second capacitor C₂ connected in series;

a first means for charging d and C₂ with an amount Q of charge, the first means transferring charge Q on a signal from a first pulse;

a third capacitor C₃ and a fourth capacitor C connected in series;

a second means for transferring charge from and C₂ to C₃ and C ; and

a third means for comparing the charge on C with the charge remaining on C₂, wherein the third means produces a second pulse when the charges on C₄ and C₂ have a defined relationship, whereby t₀ is the delay time between the first and the second pulses, and wherein the second pulse is used first to discharge capacitors _t C₂ , C₃ and C₄ and then to recharge and C₂ with an amount Q of charge.

14. The RF tag of claim 13, wherein:

the first means is a transistor connected between a line with voltage VDD and a first terminal of ; the second means is a resistor connected between the first terminal of Cj and a first terminal of C₃;

the second terminal of is connected to a first terminal of C₂;

the second terminal of C₂ is connected to a second terminal of C₄;

the second terminal of C₃ is connected to the first terminal of C₄; and

the third means is a comparator comparing the voltage across C₂ with the voltage across C₄.