US7179752B2 - Dry etching method - Google Patents
Dry etching method Download PDFInfo
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- US7179752B2 US7179752B2 US10/482,405 US48240504A US7179752B2 US 7179752 B2 US7179752 B2 US 7179752B2 US 48240504 A US48240504 A US 48240504A US 7179752 B2 US7179752 B2 US 7179752B2
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- 238000000034 method Methods 0.000 title claims abstract description 55
- 238000001312 dry etching Methods 0.000 title claims abstract description 14
- 238000005530 etching Methods 0.000 claims abstract description 81
- 239000011248 coating agent Substances 0.000 claims abstract description 20
- 238000000576 coating method Methods 0.000 claims abstract description 20
- 238000001020 plasma etching Methods 0.000 claims abstract description 14
- 238000009966 trimming Methods 0.000 claims description 29
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 18
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 16
- XPDWGBQVDMORPB-UHFFFAOYSA-N Fluoroform Chemical compound FC(F)F XPDWGBQVDMORPB-UHFFFAOYSA-N 0.000 claims description 5
- 239000008246 gaseous mixture Substances 0.000 claims description 2
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 7
- 238000007796 conventional method Methods 0.000 abstract description 2
- 239000007789 gas Substances 0.000 description 59
- 239000004065 semiconductor Substances 0.000 description 12
- 238000005259 measurement Methods 0.000 description 9
- 239000004020 conductor Substances 0.000 description 8
- 230000002093 peripheral effect Effects 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000004380 ashing Methods 0.000 description 3
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
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- 238000012545 processing Methods 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000007788 roughening Methods 0.000 description 2
- 238000004528 spin coating Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 239000004925 Acrylic resin Substances 0.000 description 1
- 229920000178 Acrylic resin Polymers 0.000 description 1
- 125000002723 alicyclic group Chemical group 0.000 description 1
- 150000001925 cycloalkenes Chemical class 0.000 description 1
- 238000010494 dissociation reaction Methods 0.000 description 1
- 230000005593 dissociations Effects 0.000 description 1
- -1 e.g. Substances 0.000 description 1
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0276—Photolithographic processes using an anti-reflective coating
Definitions
- the present invention relates to a dry etching method for use in manufacturing a semiconductor device; and, more particularly, to a dry etching method for etching an organic anti-reflecting coating (ARC) film through a mask layer made of, e.g., a photoresist.
- ARC organic anti-reflecting coating
- an anti-reflecting coating (ARC) film is widely employed in a field of manufacturing semiconductor devices in order to prevent, e.g., a generation of standing waves due to multiple interferences within a resist film during an exposure process using, e.g., a stepper.
- ARC film is an organic ARC film using an organic polymer.
- FIGS. 8A to 8C describe an exemplary manufacturing process of a semiconductor device employing the organic ARC film.
- a semiconductor wafer (a silicon substrate) 201 formed on a semiconductor wafer (a silicon substrate) 201 are an insulating layer 202 made of, e.g., a silicon oxide film and a conductor layer 203 formed of, e.g., polysilicon and, further, formed on the conductor layer 203 by, e.g., a spin coating method are an organic ARC film 204 and a mask layer 205 made of a photoresist.
- the mask layer 205 made of the photoresist is shaped into a predetermined pattern, as shown in FIG. 8B , by being exposed to light and being subsequently developed while undergoing an exposure process by, e.g., a stepper and a developing process by a developer system, respectively. Thereafter, the organic ARC film 204 is patterned to have a preset pattern, as shown in FIG. 8C , by being etched through the mask layer 205 by plasma etching employing an etching gas containing Cl 2 and O 2 gases.
- the conductor layer 203 is etched through the mask layer 205 and the organic ARC film 204 into a predetermined pattern (not shown) and then the mask layer 205 and the organic ARC film 204 are removed by ashing.
- the plasma etching employing the etching gas containing Cl 2 and O 2 gases has been conventionally employed to etch the organic ARC film.
- the sidewall profile tends to vary between the dense pattern region and the sparse pattern region.
- a profile of the sidewall is found to be tapered more in the sparse pattern region than in the dense pattern region.
- tapered profile of the sidewall tends to vary at a central portion and a peripheral portion even on a single wafer.
- an object of the present invention to provide a dry etching method capable of etching an organic ARC film to have a high-quality sidewall profile.
- a dry etching method for etching an organic anti-reflecting coating film through a mask layer formed to have a pattern, wherein the organic anti-reflecting coating film is etched by plasma etching employing an etching gas containing a CF 4 gas and an O 2 gas, and a trimming of a line width is carried out by etching the mask layer and the anti-reflecting coating film in a transversal direction.
- the pattern may have a dense pattern region in which neighboring patterns are close to each other and a sparse pattern region in which neighboring patterns are spaced apart from each other, and the trimming may be substantially uniformly carried out at the dense pattern region and the sparse pattern region.
- an amount of the trimming may be controlled by varying a flow rate of O 2 /(a flow rate of CF 4 +a flow rate of O 2 ) of the etching gas.
- an amount of the trimming may be controlled by varying a power density of a high frequency power applied to a lower electrode.
- the mask layer may be a resist film, and a silicon oxide film is formed under the organic anti-reflecting coating film.
- the resist film may be an ArF resist film.
- the silicon oxide film may be etched by using a gaseous mixture containing a CF 4 gas and a CHF 3 after etching the organic anti-reflecting coating film.
- a dry etching method for etching an organic anti-reflecting coating film through a mask layer formed to have a pattern, wherein the organic anti-reflecting coating film is etched by plasma etching employing an etching gas containing an N 2 gas and an O 2 gas, and a trimming of a line width is carried out by etching the mask layer and the anti-reflecting coating film in a transversal direction.
- the pattern may be a dense pattern region in which neighboring patterns are close to each other and a sparse pattern region in which neighboring patterns are spaced apart from each other, and the trimming is substantially uniformly carried out at the dense pattern region and the sparse pattern region.
- a flow rate of the N 2 gas is substantially identical to that of the O 2 gas.
- FIGS. 1A to 1C provide schematic cross sectional views of a wafer explaining a preferred embodiment of the present invention
- FIG. 2 exemplifies a configuration of an apparatus for use in the embodiment of the present invention
- FIG. 3 describes a pattern structure in the embodiment of the present invention
- FIG. 4 shows a measurement result of a CD shift in a first example
- FIG. 5 provides a measurement result of a CD shift in a second example
- FIGS. 6A to 6C depict schematic cross sectional views of a wafer explaining another preferred embodiment of the present invention.
- FIG. 7 describes a measurement result of a relationship between a gas flow ratio and a trimming amount
- FIGS. 8A to 8C set forth schematic cross sectional views of a wafer explaining the prior art
- FIG. 9 explains the prior art pattern structure
- FIG. 10 charts a measurement result of a CD shift in a comparative example.
- FIGS. 1A to 1C there are illustrated partially enlarged schematic longitudinal cross sectional views of a semiconductor wafer (silicon substrate) for explaining a preferred embodiment of the present invention.
- a semiconductor wafer (silicon substrate) 101 formed on a semiconductor wafer (silicon substrate) 101 are an insulating layer 102 made of, e.g., a silicon oxide film and a conductor layer 103 formed of, e.g., polysilicon and, further, formed on the conductor layer 103 by, for example, a spin coating method are an organic ARC film 104 and a mask layer 105 made of a (?:“a” inserted) photoresist.
- the mask layer 105 is first exposed to light and developed while undergoing an exposure process by a stepper and a developing process by a developer, respectively, to be formed into a predetermined pattern as shown in FIG. 1B . Thereafter, the organic ARC film 104 is etched through the mask layer 105 by plasma etching employing an etching gas including CF 4 and O 2 gases from a state shown in FIG. 1B , so that the organic ARC film 104 is patterned to have a preset pattern as illustrated in FIG. 1C . Further, after completing the etching of the organic ARC film 104 , the conductor layer 103 is etched through the mask layer 105 and the organic ARC film 104 into a predetermined pattern. Then, the mask layer 105 and the organic ARC film 104 are removed by ashing.
- FIG. 2 schematically illustrates an exemplary configuration of a plasma processing apparatus (etching apparatus) 1 for use in the preferred embodiment of the present invention.
- the etching apparatus 1 is a capacitively coupled parallel plate type etching apparatus having an upper and a lower electrode plate placed to face each other in parallel, one side of each plate being connected to a power supply for plasma generation.
- the etching apparatus 1 includes, for example, a cylindrical chamber 2 which is grounded and made of aluminum whose surface is treated by anodic oxidation (alumite-treated). Installed on a bottom portion of the chamber 2 via an insulating plate 3 such as ceramic is a substantially columnar susceptor support 4 for mounting thereon a wafer W. Disposed on the susceptor support 4 is a susceptor 5 serving as a lower electrode. Connected to the susceptor 5 is a high pass filter (HPF) 6 .
- HPF high pass filter
- a temperature control medium path 7 Formed within the susceptor support 4 is a temperature control medium path 7 .
- a temperature control medium is introduced into the temperature control medium path 7 via an inlet line 8 to circulate therethrough and is exhausted via an outlet line 9 .
- the temperature of the susceptor 5 is maintained at a desired level.
- the susceptor 5 is of a disk shape with a central topmost portion being protruded. Mounted on the central topmost portion of the susceptor 5 is an electrostatic chuck 11 shaped similar to the wafer W.
- the electrostatic chuck 11 includes an electrode 12 embedded in an insulating material.
- the electrostatic chuck 11 electrostatically adsorbs the wafer W by a Coulombic force generated by, e.g., a DC voltage of 1.5 kV supplied from a DC power supply 13 coupled to the electrode 12 .
- a gas channel 14 for supplying a heat transfer medium (for example, a He gas) to a backside of the wafer W to be processed. Heat is transferred between the susceptor 5 and the wafer W through the heat transfer medium, so that the wafer W is maintained at a predetermined temperature.
- a heat transfer medium for example, a He gas
- An annular focus ring 15 is disposed on an upper peripheral portion of the susceptor 5 to surround the wafer W mounted on the electrostatic chuck 11 .
- the focus ring 15 is made of an insulating material, e.g., ceramic or quartz, or a conductive material, and serves to improve an etching uniformity.
- the upper electrode 21 is supported within the chamber 2 via an insulating member 22 .
- the upper electrode 21 includes an electrode plate 24 (made of, e.g., quartz) facing toward the susceptor 5 and provided with a plurality of injection openings 23 and an electrode support 25 (made of a conductive material, e.g., aluminum whose surface is alumite treated) that serves to support the electrode plate 24 . Further, the distance between the susceptor 5 and the upper electrode 21 is adjustable.
- a gas inlet opening 26 communicating with a gas supply line 27 , which in turn is connected to a process gas supply unit 30 via a valve 28 and a mass flow controller 29 .
- An etching gas for plasma etching is supplied from the process gas supply unit 30 .
- the plasma processing apparatus is provided with a plurality of process gas supplying systems capable of supplying gases for example, CF 4 , O 2 , N 2 , CHF 3 , and the like, into the chamber 2 by independently controlling flow rates thereof.
- the gas exhaust unit 35 includes a vacuum pump such as a turbo molecular pump or the like, and serves to reduce an inner pressure of the chamber 2 down to a predetermined vacuum level (e.g., 0.67 Pa or less).
- a gate valve 32 installed on a sidewall of the chamber 2 is a gate valve 32 . The wafer W is transferred between the chamber 2 and an adjacent load lock chamber (not shown) while the gate valve 32 is opened.
- the first high frequency power supply 40 Connected to the upper electrode 21 via a matching unit 41 is a first high frequency power supply 40 . Further connected to the upper electrode 21 is a low pass filter (LPF) 42 .
- the first high frequency power supply 40 has a frequency ranging from 50 to 150 MHz. By applying a high frequency power in such a range, a plasma of high density in a desired dissociation state can be generated within the chamber 2 , which makes it possible to execute a plasma etching under a pressure lower than that in conventional cases.
- the frequency of the first high frequency power supply 40 preferably ranges from 50 to 80 MHz. Typically, its frequency is 60 MHz as illustrated in FIG. 2 or thereabouts.
- a second high frequency power supply 50 Connected to the susceptor 5 serving as the lower electrode via a matching unit 51 is a second high frequency power supply 50 whose frequency ranges from several hundred KHz to less than twenty MHz. By applying a power of a frequency in such a range, a proper ionic action can be facilitated without causing any damage on the wafer W to be processed.
- the frequency of the second frequency power supply 50 is, e.g., 13.56 MHz as shown in FIG. 2 or 800 KHz.
- the gate valve 32 is opened first, and then the wafer W, on which the organic ARC film 104 and the mask layer 105 patterned into the predetermined pattern are formed, is carried into the chamber 2 from the load lock chamber (not shown) to be mounted on the electrostatic chuck 11 .
- a DC voltage is then supplied from the DC power supply 13 to the electrostatic chuck 11 , so that the wafer W is adsorbed thereto electrostatically
- the gate valve 32 is closed and the chamber 2 is evacuated to a predetermined vacuum level by the gas exhaust unit 35 .
- the valve 28 is opened, and an etching gas containing Cl 4 +O 2 is supplied from the process gas supply unit 30 onto the wafer W.
- the etching gas a flow rate of which is controlled by the mass flow controller 29 , is discharged uniformly towards the wafer W as indicated by arrows in FIG. 2 via the process gas supply line 27 , the gas inlet opening 26 , a hollow central space of the upper electrode 21 and the injection openings 23 of the electrode plate 24 .
- the inner pressure of the chamber 2 is maintained at a predetermined pressure level.
- the etching gas is converted into a plasma to thereby perform the etching on the organic ARC film 104 on the wafer W.
- Such an etching process is terminated at the moment the state shown in FIG. 1C is obtained.
- the pattern of the organic ARC film obtained by the above etching process in accordance with the first embodiment was investigated by a scanning electron microscope (SEM) to find that a sidewall profile of the organic ARC film 104 was substantially vertical as shown in FIG. 3 . Moreover, such a high quality sidewall profile was found throughout the dense pattern region and the sparse pattern region and, further, the central portion and the peripheral portion of the wafer. Further, for the pattern of the organic ARC film thus obtained, a deviation of a line with of the pattern actually formed by etching from a designed line width (i.e., CD (critical dimension) shift) was measured in both of the dense pattern region and the sparse pattern region of respective parts on the surface of the wafer (the central portion and the peripheral portion thereof).
- CD critical dimension
- FIG. 4 provides a graph showing a measurement result of the CD shift, wherein a vertical axis represents a CD shift while a horizontal axis stands for a radial position on the surface of the wafer (a distance from a center of the wafer) (mm).
- a solid line A indicates a measurement result of an X-directional line width in the dense pattern region
- a solid line B represents a measurement result of an X-directional line width in the sparse pattern region
- a solid line C shows a measurement result of a Y-directional line width in the dense pattern region
- a solid line D describes a measurement result of a Y-directional line width in the sparse pattern region.
- a difference between a line width in the dense pattern region and that in the sparse pattern region and a difference between line widths within the surface of the wafer were both small.
- An average of the CD shifts was ⁇ 19.8 nm and the difference between a line width in the dense pattern region and that in the sparse pattern region was 4.4 nm.
- an etching gas Cl 2 (a flow rate of 10 sccm) + O 2 (a flow rate of 30 sccm) a pressure: 0.67 Pa (5 mTorr) a high frequency power applied 325 W to the upper electrode: a high frequency power applied 30 W to the lower electrode: a distance between the electrodes: 80 mm a susceptor temperature: 80° C.
- the pattern of the organic ARC film obtained by the above etching process was investigated by the SEM to find that a sidewall of the organic ARC film 204 had a tapered profile as shown in FIG. 9 .
- a difference between a line width in a dense pattern region and that in a sparse pattern region and a difference between line widths within the surface of a wafer were found to be greater than those in the case of the example described in FIG. 4 .
- An average of CD shifts was ⁇ 29.9 nm and the difference between the line width from the dense pattern region and that from the sparse pattern region was 14.6 nm.
- the etching gas including CF 4 +O 2 mentioned above was replaced with a gas of N 2 +O 2 , and a wafer with a predetermined pattern having a dense pattern region (a left part in FIG. 3 ) and a sparse pattern region (a right part in FIG. 3 ), as illustrated in FIG. 3 , was etched under the following condition:
- an etching gas N 2 (a flow rate of 20 sccm) + O 2 (a flow rate of 20 sccm) a high frequency power applied 325 W to the upper electrode: a high frequency power applied 30 W to the lower electrode: a distance between the electrodes: 80 mm a susceptor temperature: 80° C.
- the pattern of the organic ARC film obtained by the etching in accordance with the second example was investigated by the SEM to find that a high quality sidewall profile of the organic ARC film could be made to be virtually vertical in both of the dense pattern region and the sparse pattern region, as in the first example.
- a difference between a line width in the dense pattern region and that in the sparse pattern region and a difference between line widths within the surface of the wafer were both small as in the first example.
- An average of CD shifts was ⁇ 50.3 nm and the difference between a line in the dense pattern region and that in the sparse pattern region was 2.6 nm.
- the average of the CD shifts was as large as ⁇ 50.3 nm in the second example. For this reason, an actual line width becomes narrower than a designed line width.
- a line width of the mask layer to be large in advance and reducing (trimming) it through the etching process, a wiring with a minute line width or the like, can be resultantly formed without having to set the line width of the mask layer to be excessively small in exposure and developing processes of the mask layer.
- ArF resist which is a resist, the exposure process thereof being carried out by a laser beam using an ArF gas as a light source, is widely employed.
- the ArF resist is adequate for forming a minuter pattern than that formed by a conventional KrF resist. Since, however, the ArF resist has a low plasma-resistance, there exist certain disadvantages in that a surface of the resist may be roughened, selectivity against a to-be-etched portion (a ratio of etching rates) is small, and the resist may not be sustained.
- main substances forming the ArF resist are, e.g., a cycloolefin resin, an acrylic resin containing alicyclic structure, a cyclooefin-maleic anhydride resin, and so on.
- the present invention can be equally applied to such a case of using the ArF resist.
- a preferred embodiment using the ArF resist will now be described.
- FIGS. 6A to 6C there are illustrated partially enlarged schematic longitudinal cross sectional views of a semiconductor wafer (silicon substrate) for explaining the preferred embodiment using the ArF resist.
- the organic ARC film 123 is etched first through the ArF resist 124 (mask layer) by plasma etching employing an etching gas containing a CF 4 gas and an O 2 gas, so that the organic ARC film 123 is patterned to have a predetermined pattern, as illustrated in FIG. 6B .
- the silicon oxide film 122 is patterned into a preset pattern, as illustrated in FIG. 6C , by being plasma etched through the ArF resist 124 (mask layer) and the organic ARC film 123 by way of employing an etching gas containing a CF 4 gas and a CHF 3 gas.
- the ArF resist 124 and the organic ARC film 123 are removed by, e.g., ashing.
- the silicon oxide film 122 can be etched without causing a surface roughening and deterioration of the ArF resist 124 .
- a trimming described above can be carried out under a strict control over a trimming amount, and, further, an etching can be performed without changing a trimmed line width in the etching process of the silicon oxide film 122 .
- a wafer of a diameter of 200 mm was etched by following the above-described etching process as a third example.
- the etching was performed plural times while changing the value of a ratio [a flow rate of O 2 /a flow rate of (CF 4 +O 2 )] in order to examine a variation in a trimming amount as a function of the ratio of the flow rate of O 2 to the total flow rate of an etching gas (CF 4 +O 2 ).
- the etching condition was as follows:
- an etching gas CF 4 + O 2 (a total flow rate of 40 sccm) a pressure: 0.67 Pa (5 mTorr) a high frequency power applied 300 W to the upper electrode: a high frequency power applied 60 W to the lower electrode: a distance between the electrodes: 140 mm a temperature (top/wall/bottom): 80/60/75° C.
- a pattern obtained by the etching process of the third example was investigated by the SEM to find that the organic ARC film and the silicon oxide film could be etched without causing a surface roughening and deterioration of the ArF resist.
- the trimming amount of the organic ARC film can be readily controlled by adjusting [the flow rate of O 2 /the flow rate of (CF 4 +O 2 )] as shown in FIG. 7 .
- FIG. 7 describes a relationship between the trimming amount and the ratio of [a flow rate of O 2 /a flow rate of (CF 4 +O 2 )], wherein the result of the third example is represented by triangles and a vertical and a horizontal axes represent the trimming amount (nm) and the ratio (%) of [the flow rate of O 2 /the flow rate of (CF 4 +O 2 )].
- an amount of a high frequency power per unit area (a RF power density) applied to the lower electrode was 0.19 W/cm 2 in this case.
- the trimming amount could be changed almost linearly by varying [the flow rate of O 2 /the flow rate of (CF 4 +O 2 )].
- the etching of the silicon oxide film could be carried out while substantially maintaining the line width (i.e., involving a small amount of trimming).
- An average of the trimming amounts (decrements in the line width) was ⁇ 0.2 nm in the etching process of the silicon oxide film.
- an organic ARC film identical with that employed in the third example was etched by using a wafer having a diameter of 300 mm as a fourth example.
- the etching condition was as follows:
- an etching gas CF 4 + O 2 (a total flow rate of 80 sccm) a pressure: 0.93 Pa (7 mTorr) a high frequency power applied 100 W to the upper electrode: a high frequency power applied 40 W to the lower electrode: a distance between the electrodes: 170 mm a temperature (top/wall/bottom): 80/60/75° C. a He gas pressure (center/edge): 670/670 Pa (5 Torr) an overetching: 10%.
- Circular dots in FIG. 7 describe a relationship between a trimming amount and a ratio (%) of [a flow rate of O 2 /a flow rate of (CF 4 +O 2 )] in the fourth example.
- the trimming amount could also be changed almost linearly by changing [the flow rate of O 2 /the flow rate of (CF 4 +O 2 )] in the fourth example as well.
- an amount of a high frequency power per unit area (a RF power density) applied to the lower electrode was 0.57 W/cm 2 , which is greater than 0.19 W/cm 2 in the third example.
- trimming amounts are found to be relatively increased compared to those in the third example, as shown in FIG. 7 , which appears to be due to the fact that an etching in a transversal direction (trimming) progresses as the power density applied to the lower electrode increases because ionic energy is increased with the increase of the power density.
- the trimming amount can be controlled.
- the present invention is not limited thereto. That is, the present invention can be applied to any type of plasma etching apparatuses, for example, an etching apparatus for supplying a high frequency power to either one of the upper and the lower electrode, an etching apparatus for controlling the plasma by using a magnetic field, and so on.
- the dry etching method in accordance with the present invention can be employed in the semiconductor industry manufacturing semiconductor devices. Thus, it has an industrial applicability.
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Abstract
Description
an etching gas: | CF4 (a flow rate of 35 sccm) + O2 |
(a flow rate of 5 sccm) | |
a flow rate of CF4: | a flow rate of O2 = 7:1 |
a pressure: | 0.67 Pa (5 mTorr) |
a high frequency power applied | 325 W |
to the upper electrode: | |
a high frequency power applied | 30 W |
to the lower electrode: | |
a distance between the electrodes: | 80 mm |
a susceptor temperature: | 80° C. |
an etching gas: | Cl2 (a flow rate of 10 sccm) + O2 |
(a flow rate of 30 sccm) | |
a pressure: | 0.67 Pa (5 mTorr) |
a high frequency power applied | 325 W |
to the upper electrode: | |
a high frequency power applied | 30 W |
to the lower electrode: | |
a distance between the electrodes: | 80 mm |
a susceptor temperature: | 80° C. |
an etching gas: | N2 (a flow rate of 20 sccm) + O2 |
(a flow rate of 20 sccm) | |
a high frequency power applied | 325 W |
to the upper electrode: | |
a high frequency power applied | 30 W |
to the lower electrode: | |
a distance between the electrodes: | 80 mm |
a susceptor temperature: | 80° C. |
(Etching of the organic ARC film) |
an etching gas: | CF4 + O2 |
(a total flow rate of 40 sccm) | |
a pressure: | 0.67 Pa (5 mTorr) |
a high frequency power applied | 300 W |
to the upper electrode: | |
a high frequency power applied | 60 W |
to the lower electrode: | |
a distance between the electrodes: | 140 mm |
a temperature (top/wall/bottom): | 80/60/75° C. |
a He gas pressure (center/edge): | 400/400 Pa (3 Torr) |
an overetching: | 10% |
(Etching of the silicon oxide film) |
an etching gas: | CF4 (a flow rate of 20 sccm) + CHF3 |
(a flow rate of 20 sccm) | |
a pressure: | 5.3 Pa (40 mTorr) |
a high frequency power applied | 600 W |
to the upper electrode: | |
a high frequency power applied | 100 W |
to the lower electrode: | |
a distance between the electrodes: | 140 mm |
a temperature (top/wall/bottom): | 80/30/65° C. |
a He gas pressure (center/edge): | 1300/1300 Pa (10 Torr) |
an overetching: | 10%. |
(Etching of the organic ARC film) |
an etching gas: | CF4 + O2 (a total flow | ||
rate of 80 sccm) | |||
a pressure: | 0.93 Pa (7 mTorr) | ||
a high frequency power applied | 100 W | ||
to the upper electrode: | |||
a high frequency power applied | 40 W | ||
to the lower electrode: | |||
a distance between the electrodes: | 170 mm | ||
a temperature (top/wall/bottom): | 80/60/75° C. | ||
a He gas pressure (center/edge): | 670/670 Pa (5 Torr) | ||
an overetching: | 10%. | ||
Claims (10)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001-210034 | 2001-07-10 | ||
JP2001210034 | 2001-07-10 | ||
PCT/JP2002/006830 WO2003007357A1 (en) | 2001-07-10 | 2002-07-05 | Dry etching method |
Publications (2)
Publication Number | Publication Date |
---|---|
US20040214445A1 US20040214445A1 (en) | 2004-10-28 |
US7179752B2 true US7179752B2 (en) | 2007-02-20 |
Family
ID=19045586
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/482,405 Expired - Lifetime US7179752B2 (en) | 2001-07-10 | 2002-07-05 | Dry etching method |
Country Status (5)
Country | Link |
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US (1) | US7179752B2 (en) |
JP (1) | JP4133810B2 (en) |
CN (1) | CN1277293C (en) |
TW (1) | TWI270937B (en) |
WO (1) | WO2003007357A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US20070238304A1 (en) * | 2006-04-11 | 2007-10-11 | Jui-Hung Wu | Method of etching passivation layer |
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US20040214445A1 (en) | 2004-10-28 |
CN1535474A (en) | 2004-10-06 |
JP4133810B2 (en) | 2008-08-13 |
CN1277293C (en) | 2006-09-27 |
JPWO2003007357A1 (en) | 2004-11-04 |
WO2003007357A1 (en) | 2003-01-23 |
TWI270937B (en) | 2007-01-11 |
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