US7144791B2 - Lamination through a mask - Google Patents
Lamination through a mask Download PDFInfo
- Publication number
- US7144791B2 US7144791B2 US10/949,791 US94979104A US7144791B2 US 7144791 B2 US7144791 B2 US 7144791B2 US 94979104 A US94979104 A US 94979104A US 7144791 B2 US7144791 B2 US 7144791B2
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- Prior art keywords
- mask
- substrate
- receiver
- donor
- aperture
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- Expired - Fee Related, expires
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- 238000003475 lamination Methods 0.000 title abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 71
- 239000000463 material Substances 0.000 claims abstract description 39
- 238000000034 method Methods 0.000 claims abstract description 38
- 238000000151 deposition Methods 0.000 claims description 10
- 239000004020 conductor Substances 0.000 claims description 6
- 238000010030 laminating Methods 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 claims description 4
- 229920000642 polymer Polymers 0.000 claims description 3
- 239000010409 thin film Substances 0.000 abstract description 7
- 229920005570 flexible polymer Polymers 0.000 abstract description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 229920002799 BoPET Polymers 0.000 description 8
- 239000011521 glass Substances 0.000 description 8
- 229920003345 Elvax® Polymers 0.000 description 6
- 239000005041 Mylar™ Substances 0.000 description 6
- 230000008021 deposition Effects 0.000 description 4
- CXQXSVUQTKDNFP-UHFFFAOYSA-N octamethyltrisiloxane Chemical compound C[Si](C)(C)O[Si](C)(C)O[Si](C)(C)C CXQXSVUQTKDNFP-UHFFFAOYSA-N 0.000 description 4
- 239000010408 film Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 3
- 125000000391 vinyl group Chemical group [H]C([*])=C([H])[H] 0.000 description 3
- 229920002554 vinyl polymer Polymers 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229920006362 Teflon® Polymers 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 229920001971 elastomer Polymers 0.000 description 2
- 239000000806 elastomer Substances 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000002904 solvent Substances 0.000 description 2
- 241001655798 Taku Species 0.000 description 1
- 239000004809 Teflon Substances 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
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- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000009833 condensation Methods 0.000 description 1
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- 239000000470 constituent Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000004205 dimethyl polysiloxane Substances 0.000 description 1
- 235000013870 dimethyl polysiloxane Nutrition 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000000879 optical micrograph Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 238000004987 plasma desorption mass spectroscopy Methods 0.000 description 1
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- 238000007738 vacuum evaporation Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
- H05K3/046—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching by selective transfer or selective detachment of a conductive layer
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
- B41M1/00—Inking and printing with a printer's forme
- B41M1/12—Stencil printing; Silk-screen printing
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
- B41M5/00—Duplicating or marking methods; Sheet materials for use therein
- B41M5/025—Duplicating or marking methods; Sheet materials for use therein by transferring ink from the master sheet
- B41M5/03—Duplicating or marking methods; Sheet materials for use therein by transferring ink from the master sheet by pressure
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
- B41M5/00—Duplicating or marking methods; Sheet materials for use therein
- B41M5/26—Thermography ; Marking by high energetic means, e.g. laser otherwise than by burning, and characterised by the material used
- B41M5/382—Contact thermal transfer or sublimation processes
- B41M5/38207—Contact thermal transfer or sublimation processes characterised by aspects not provided for in groups B41M5/385 - B41M5/395
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/12—Deposition of organic active material using liquid deposition, e.g. spin coating
- H10K71/13—Deposition of organic active material using liquid deposition, e.g. spin coating using printing techniques, e.g. ink-jet printing or screen printing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
- H10K71/10—Deposition of organic active material
- H10K71/18—Deposition of organic active material using non-liquid printing techniques, e.g. thermal transfer printing from a donor sheet
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
- B41M3/00—Printing processes to produce particular kinds of printed work, e.g. patterns
- B41M3/12—Transfer pictures or the like, e.g. decalcomanias
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
- B41M5/00—Duplicating or marking methods; Sheet materials for use therein
- B41M5/26—Thermography ; Marking by high energetic means, e.g. laser otherwise than by burning, and characterised by the material used
- B41M5/382—Contact thermal transfer or sublimation processes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41M—PRINTING, DUPLICATING, MARKING, OR COPYING PROCESSES; COLOUR PRINTING
- B41M5/00—Duplicating or marking methods; Sheet materials for use therein
- B41M5/26—Thermography ; Marking by high energetic means, e.g. laser otherwise than by burning, and characterised by the material used
- B41M5/382—Contact thermal transfer or sublimation processes
- B41M5/38207—Contact thermal transfer or sublimation processes characterised by aspects not provided for in groups B41M5/385 - B41M5/395
- B41M5/38221—Apparatus features
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0528—Patterning during transfer, i.e. without preformed pattern, e.g. by using a die, a programmed tool or a laser
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0502—Patterning and lithography
- H05K2203/0537—Transfer of pre-fabricated insulating pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0548—Masks
- H05K2203/0557—Non-printed masks
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/975—Substrate or mask aligning feature
Definitions
- the present invention relates to a process for deposition of patterned materials by lamination through a mask.
- the process is particularly useful for constituents of thin film transistors or other electronic devices.
- a layer of deposited material is laminated from a donor substrate through a mask on to the device.
- the use of the mask limits the deposition of the laminated layer to areas where it is desired.
- the technique is especially useful in the deposition of gate dielectrics over gate electrodes in thin film field effect transistors.
- Baek et al (U.S. Pat. No. 6,493,048) disclose a manufacturing method for liquid crystal displays using a photoresist pattern as an etch mask.
- Taku and Masaharu JP2001135734 disclose a method for patterning ferroelectric material in the thin film field effect transistor involving anisotropic etching.
- Takatoshi and Takashi JP2001196589) disclose a manufacturing method of thin film transistors. The method involves etching.
- the present invention forms patterned layers of materials by using a lamination process involving pressing a layer of material deposited on a donor substrate through a mask to develop the pattern on to a receiver substrate.
- This invention describes a process comprising:
- the present invention also includes a process comprising:
- FIG. 1 is an example of lamination through a mask, where a patterned dilectric layer is added to a device being constructed. The mask is placed between the donor sheet and the device being built.
- FIG. 2 shows the donor being pressed though the mask in a laminator.
- FIG. 3 shows the presence of an elastomeric layer allowing dielectric to be pressed across the mask onto a device being built.
- FIG. 4 shows the removal of the mask and donor layer.
- FIG. 5 shows a photograph of mask-lamination of 420 nm of pvp dielectric onto ITO-glass using a TEM 200 grid as a mask.
- FIG. 6 shows a cross section scan of Figure a) showing how the patterned dielectric directly reproduces the mask, which has squared holes of 58 ⁇ m and wires of 25 ⁇ m.
- FIG. 7 shows a conducting Ni pattern mask-laminated onto glass using Ni-mylar coated with p-vp and a TEM single slot grid.
- FIG. 8 shows a crossectional profile of a Ni contact edge as shown in FIG. 7 .
- the present invention is a process for the transfer on material from a donor substrate to a receiver substrate by lamination in the form of a pattern.
- the pattern is obtained by placing a mask with an aperture between the donor substrate and the receiver substrate during lamination.
- Material can be coated on a donor substrate by a variety of known processes such as spin coating a solution, drop casting a solution or evaporation deposition and condensation on the donor substrate.
- the donor substrate is relatively inert to the deposited material and is conveniently a polymer sheet or film of materials such as Teflon®, Mylar®, Kapton® or similar materials.
- the donor substrate can be a multilayered film, where layers are engineered to release the material to be laminated and/or to add conformal coverage through the shadow mask.
- Elvax® can be plant coated roll-to-roll in a web coater onto Mylar® and used as a donor substrate. The material to be laminated is then deposited on the Elvax®), which adds both conformal coverage and ease of release from the donor substrate, since Elvax®) is elastomer-like and adhesion to Elvax® at elevated temperatures is poor.
- the receiver may be already patterned with other elements of a device.
- the process of the present invention is conveniently used with flexible polymer receiver substrates, which can also be engineered to maximize adhesion of the material to be laminated.
- the lamination process is frequently carried out at slightly elevated temperatures, i.e. 80; to 120° C. These temperatures are consistent with the use of flexible polymer receiver substrates, which cannot tolerate extreme temperatures.
- the process of the present invention is particularly useful in the fabrication of thin film transistors on flexible polymer substrates. Low cost techniques are sought where large areas of polymer sheets can be fabricated with thin film transistors for use as drivers for flexible displays, sensors, etc.
- the use of low cost procedures, such as lamination processes avoids the necessity of introducing the flexible polymer receiver substrate into a vacuum chamber. Additionally, lamination is a dried additive process that simplifies the construction of organic electronics by removing solvent compatibility issues.
- the donor substrate is coated, it is placed with the side with the coated material toward the receiver.
- a mask with an aperture is aligned between the donor and receiver substrates.
- the aperture may be positioned above pre-existing features on the receiver substrate.
- the coated material is a gate dielectric material
- the aperture of the mask may be positioned above a gate electrode structure already deposited on the receiver substrate.
- the aperture limits the coverage of material transferred from the donor to the receiver and thus defines a pattern to be formed in the transferred material.
- the mask is conveniently an inert flat sheet or film of materials such as Teflon, Mylar, Kapton or similar materials. Metal or ceramic masks could also be used.
- the elements are pressed together at a desired temperature in a lamination process.
- the temperature may be selected to soften one of the layers to allow adhesion.
- the material coated on the donor is pressed through the aperture in the mask to contact the receiver substrate. Only the material in the area defined by the aperture of the mask contacts the receiver.
- the receiver or donor substrates can be engineered to maximize contact between donor and receiver across the mask. Thus a pattern defined by the area of the aperture in the mask is formed. Under appropriate pressure and time conditions, the material above the aperture of the mask transfers to the receiver. After lamination, the donor substrate and the mask are removed leaving a pattern of the transferred material on the receiver in the pattern defined by the aperture of the mask.
- the process is illustrated schematically in FIG. 1 where the donor substrate is Mylar ( 1 ).
- An elastomer-like release layer of Elvax or PDMS ( 2 ) is also illustrated.
- a dielectric is deposited on the release layer ( 3 ).
- the receiver substrate ( 5 ) is patterned, in this illustration, with gate electrode contacts ( 6 ) and ( 7 ).
- the receiver substrate ( 5 ) may be glass with ITO, Mylar with nickel, Kapton with Cu or Au in SiO 2 .
- the mask ( 4 ) contains apertures and is positioned between the donor ( 1 ) and receiver ( 5 ) such that the apertures align with the gate electrodes.
- FIG. 2 shows the lamination process of the donor. Shown are the donor layers ( 1 ), ( 2 ) and ( 3 ), mask ( 4 ) and receiver ( 5 ) in a lamination press ( 8 ) and ( 9 ). When the layers are pressed (and optionally heated), the elastomer expands above the apertures in the mask ( 4 ) to create a conformal coverage of the dielectric that is to be transferred.
- FIG. 3 shows a cross section of the layers during the lamination process. If necessary, the layers are allowed to cool down.
- FIG. 4 illustrates the disassembly of the layers after the lamination process.
- the mask ( 4 ) and donor sheet ( 10 ) are removed. Only the material from the donor sheet aligned with the apertures in the mask remains on the receiver substrate ( 5 ).
- the patterned dielectric leaves gate electrode contacts accessible for either input or output connections or for interconnects or vias to other layers of an electronic device.
- the interface chemistry is such that the dielectric layer to be transferred is easily released from the elastomer-like release layer and binds to the device being built. Additionally, materials may be selected where the dielectric does not bind to the mask. This allows for multiple use of the mask ( 4 ) without cleaning.
- stamps are also usually limited to small areas.
- the mask could be used for a very large number of laminations. This technique can also use the advances in “dry-liftoff” processes without the use of expensive evaporation techniques. Furthermore, more than one layer can be transferred through the mask at once. For example, a semiconductor and a dielectric could be transferred at the same time. In that case, the dielectric can serve to protect the semiconductor from degradation by exposure to air.
- This example describes how a dielectric can be patterned by lamination through a mask.
- the substrate is a glass slide.
- the dielectric is 420 nm poly-vinyl pyrridine bar coated from a solvent solution onto Mylar with Elvax coating.
- a Transmission Electron Microscope (TEM) grid was used as a mask to pattern the dielectric during lamination.
- the TEM 200 Cu grid used had square holes measuring 58 microns on a side and 25 micron diameter lines.
- Lamination was performed on a Carver 3889 press-laminator, under a force of 10 klb and a temperature of 85° C.
- FIG. 5 shows an optical microscope image of the pattern of poly-vinyl pyrridine transferred onto ITO-coated glass using the process of the present invention.
- FIG. 6 shows the profile of the structure shown in FIG. 5 , taken using a Tencor P.15 profilometer.
- This example describes how a conductor can be patterned by lamination through a mask.
- the substrate is a glass slide.
- the conductor is 7 nm of Ni coated with a dielectric, 420 nm thick poly-vinyl pyrridine.
- the dielectric is deposited on a Mylar donor substrate.
- the nickel is deposited on the dielectric.
- a TEM grid was used as a mask to pattern the dielectric during lamination.
- Lamination was performed on a plate-laminator under a force of 10 klb and a temperature of 85° C. During lamination, both the dielectric and the conductor are transferred. The dielectric is transferred directly onto the glass.
- the Ni lies above the dielectric on the exposed surface.
- FIG. 7 shows an image of a region of nickel deposited by the process of the present invention.
- FIG. 8 the profile of the structure shown in FIG. 7 , taken using a Tencor P.15 profilometer.
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The present invention is a process for transfer of a pattern of material from a donor substrate to a receiver substrate by lamination. The pattern of the transferred material is defined by an aperture in a mask interposed between the donor and receiver during lamination. The technique is compatible with flexible polymer receiver substrates and is useful in fabricating thin film transistors for flexible displays.
Description
The present invention relates to a process for deposition of patterned materials by lamination through a mask. The process is particularly useful for constituents of thin film transistors or other electronic devices. In the process, a layer of deposited material is laminated from a donor substrate through a mask on to the device. The use of the mask limits the deposition of the laminated layer to areas where it is desired. The technique is especially useful in the deposition of gate dielectrics over gate electrodes in thin film field effect transistors.
Baek et al (U.S. Pat. No. 6,493,048) disclose a manufacturing method for liquid crystal displays using a photoresist pattern as an etch mask.
Taku and Masaharu (JP2001135734) disclose a method for patterning ferroelectric material in the thin film field effect transistor involving anisotropic etching.
Takatoshi and Takashi (JP2001196589) disclose a manufacturing method of thin film transistors. The method involves etching.
In contrast, the present invention forms patterned layers of materials by using a lamination process involving pressing a layer of material deposited on a donor substrate through a mask to develop the pattern on to a receiver substrate.
This invention describes a process comprising:
-
- a) depositing a material on a side of a donor substrate
- b) aligning a mask with an aperture between the donor substrate and a receiver substrate such that the aperture of the mask is in the desired position relative to the receiver substrate
- c) laminating the donor substrate oriented with the side with the deposited material towards the mask and the receiver substrate, the mask, and the receiver substrate such that the deposited material is transferred through the aperture of the mask on to the receiver substrate, and
- d) removing the donor substrate and the mask.
The present invention also includes a process comprising:
-
-
- a) depositing a release layer on a side of a donor substrate
- b) depositing a material on the release layer
- c) aligning a mask with an aperture between the donor substrate and a receiver substrate such that the aperture of the mask is in the desired position relative to the receiver substrate
- d) laminating the donor substrate oriented with the side with the deposited material towards the mask and the receiver substrate, the mask, and the receiver substrate such that the deposited material is transferred through the aperture of the mask on to the receiver substrate, and
- e) removing the donor substrate and the mask.
-
The present invention is a process for the transfer on material from a donor substrate to a receiver substrate by lamination in the form of a pattern. The pattern is obtained by placing a mask with an aperture between the donor substrate and the receiver substrate during lamination.
Material can be coated on a donor substrate by a variety of known processes such as spin coating a solution, drop casting a solution or evaporation deposition and condensation on the donor substrate. The donor substrate is relatively inert to the deposited material and is conveniently a polymer sheet or film of materials such as Teflon®, Mylar®, Kapton® or similar materials. The donor substrate can be a multilayered film, where layers are engineered to release the material to be laminated and/or to add conformal coverage through the shadow mask. For example, Elvax® can be plant coated roll-to-roll in a web coater onto Mylar® and used as a donor substrate. The material to be laminated is then deposited on the Elvax®), which adds both conformal coverage and ease of release from the donor substrate, since Elvax®) is elastomer-like and adhesion to Elvax® at elevated temperatures is poor.
The receiver may be already patterned with other elements of a device. The process of the present invention is conveniently used with flexible polymer receiver substrates, which can also be engineered to maximize adhesion of the material to be laminated. The lamination process is frequently carried out at slightly elevated temperatures, i.e. 80; to 120° C. These temperatures are consistent with the use of flexible polymer receiver substrates, which cannot tolerate extreme temperatures. The process of the present invention is particularly useful in the fabrication of thin film transistors on flexible polymer substrates. Low cost techniques are sought where large areas of polymer sheets can be fabricated with thin film transistors for use as drivers for flexible displays, sensors, etc. The use of low cost procedures, such as lamination processes, avoids the necessity of introducing the flexible polymer receiver substrate into a vacuum chamber. Additionally, lamination is a dried additive process that simplifies the construction of organic electronics by removing solvent compatibility issues.
Once the donor substrate is coated, it is placed with the side with the coated material toward the receiver. A mask with an aperture is aligned between the donor and receiver substrates. The aperture may be positioned above pre-existing features on the receiver substrate. For example, if the coated material is a gate dielectric material, the aperture of the mask may be positioned above a gate electrode structure already deposited on the receiver substrate. The aperture limits the coverage of material transferred from the donor to the receiver and thus defines a pattern to be formed in the transferred material. The mask is conveniently an inert flat sheet or film of materials such as Teflon, Mylar, Kapton or similar materials. Metal or ceramic masks could also be used.
Once the donor, mask and receiver are positioned, the elements are pressed together at a desired temperature in a lamination process. The temperature may be selected to soften one of the layers to allow adhesion. Under pressure, the material coated on the donor is pressed through the aperture in the mask to contact the receiver substrate. Only the material in the area defined by the aperture of the mask contacts the receiver. The receiver or donor substrates can be engineered to maximize contact between donor and receiver across the mask. Thus a pattern defined by the area of the aperture in the mask is formed. Under appropriate pressure and time conditions, the material above the aperture of the mask transfers to the receiver. After lamination, the donor substrate and the mask are removed leaving a pattern of the transferred material on the receiver in the pattern defined by the aperture of the mask.
The process is illustrated schematically in FIG. 1 where the donor substrate is Mylar (1). An elastomer-like release layer of Elvax or PDMS (2) is also illustrated. A dielectric is deposited on the release layer (3). The receiver substrate (5) is patterned, in this illustration, with gate electrode contacts (6) and (7). The receiver substrate (5) may be glass with ITO, Mylar with nickel, Kapton with Cu or Au in SiO2. The mask (4) contains apertures and is positioned between the donor (1) and receiver (5) such that the apertures align with the gate electrodes.
This method does not require time consuming and expensive techniques such as lithography or vacuum evaporation. The process takes only a few minutes and the size of the area patterned with this process is limited only by the size of the lamination press. This process can take advantage of developments in the chemistry of elastomer stamps without the actual use of stamps which are expensive to fabricate and prone to collapse after one or two uses. Stamps are also usually limited to small areas.
The mask could be used for a very large number of laminations. This technique can also use the advances in “dry-liftoff” processes without the use of expensive evaporation techniques. Furthermore, more than one layer can be transferred through the mask at once. For example, a semiconductor and a dielectric could be transferred at the same time. In that case, the dielectric can serve to protect the semiconductor from degradation by exposure to air.
This example describes how a dielectric can be patterned by lamination through a mask. The substrate is a glass slide. The dielectric is 420 nm poly-vinyl pyrridine bar coated from a solvent solution onto Mylar with Elvax coating. A Transmission Electron Microscope (TEM) grid was used as a mask to pattern the dielectric during lamination. The TEM 200 Cu grid used had square holes measuring 58 microns on a side and 25 micron diameter lines. Lamination was performed on a Carver 3889 press-laminator, under a force of 10 klb and a temperature of 85° C. FIG. 5 shows an optical microscope image of the pattern of poly-vinyl pyrridine transferred onto ITO-coated glass using the process of the present invention. FIG. 6 shows the profile of the structure shown in FIG. 5 , taken using a Tencor P.15 profilometer.
This example describes how a conductor can be patterned by lamination through a mask. The substrate is a glass slide. The conductor is 7 nm of Ni coated with a dielectric, 420 nm thick poly-vinyl pyrridine. The dielectric is deposited on a Mylar donor substrate. The nickel is deposited on the dielectric. As in Example 1 above, a TEM grid was used as a mask to pattern the dielectric during lamination. Lamination was performed on a plate-laminator under a force of 10 klb and a temperature of 85° C. During lamination, both the dielectric and the conductor are transferred. The dielectric is transferred directly onto the glass. The Ni lies above the dielectric on the exposed surface. The result is a patterned conductor on the glass slide, separated by a dielectric layer. FIG. 7 shows an image of a region of nickel deposited by the process of the present invention. FIG. 8 the profile of the structure shown in FIG. 7 , taken using a Tencor P.15 profilometer.
Claims (3)
1. A process comprising:
(a) depositing a material selected from a dielectric, semiconductor, conductor and combinations thereof on a dide of a donor substrate;
(b) aligning a mask with an aperture between the donor substrate and a receiver substrate such that the aperture of the mask is in the desired position relative to the receiver substrate;
(c) laminating the donor substrate oriented with the side with the deposited material towards the mask and the receiver substrate, the mask, and the receiver substrate such that the deposited material is transferred through the aperture of the mask on to the receiver substrate; and
(d) removing the donor substrate and the mask.
2. A process comprising:
a) depositing a release layer or a conformal layer on a side of a donor substrate;
b) depositing a material selected from a dielectric, semiconductor, conductor and combinations thereof on the release layer;
c) aligning a mask with an aperture between the donor substrate and a receiver substrate such that the aperture of the mask is in the desired position relative to the receiver substrate;
d) laminating the donor substrate oriented with the side with the deposited material towards the mask and the receiver substrate, the mask, and the receiver substrate such that the deposited material is transferred through the aperture of the mask on to the receiver substrate; and
e) removing the donor substrate and the mask.
3. The process of claim 1 or claim 2 when the donor substrate is a polymer sheet or film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US10/949,791 US7144791B2 (en) | 2003-09-26 | 2004-09-24 | Lamination through a mask |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US50668603P | 2003-09-26 | 2003-09-26 | |
US10/949,791 US7144791B2 (en) | 2003-09-26 | 2004-09-24 | Lamination through a mask |
Publications (2)
Publication Number | Publication Date |
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US20050142813A1 US20050142813A1 (en) | 2005-06-30 |
US7144791B2 true US7144791B2 (en) | 2006-12-05 |
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US10/949,791 Expired - Fee Related US7144791B2 (en) | 2003-09-26 | 2004-09-24 | Lamination through a mask |
Country Status (5)
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US (1) | US7144791B2 (en) |
EP (1) | EP1667847A1 (en) |
JP (1) | JP2007508683A (en) |
KR (1) | KR20060102329A (en) |
WO (1) | WO2005030491A1 (en) |
Cited By (1)
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RU2808044C2 (en) * | 2018-06-29 | 2023-11-22 | АКТЕГА Шмид Рюнер АГ | Method and device for enhancement of printed products |
Families Citing this family (2)
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GB2453766A (en) * | 2007-10-18 | 2009-04-22 | Novalia Ltd | Method of fabricating an electronic device |
CN109895519B (en) * | 2019-03-04 | 2021-03-30 | 景涛 | Low-resistance signal conduction transfer printing composite material, preparation method thereof and transfer printing method |
Citations (6)
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US3226255A (en) * | 1961-10-31 | 1965-12-28 | Western Electric Co | Masking method for semiconductor |
US4556627A (en) * | 1982-04-01 | 1985-12-03 | Sullivan Donald F | Transferring polymer from thin plastic films to photodevelop insulation patterns on printed wiring boards |
DE4440762C1 (en) | 1994-11-15 | 1996-04-04 | Borsi Kg F | Transparent carrier partial cladding for less material and labour |
US6077634A (en) * | 1996-03-28 | 2000-06-20 | Flex Products, Inc. | Methods for preparing color filters for displays |
JP2001135734A (en) | 1999-11-04 | 2001-05-18 | Fuji Electric Co Ltd | Method for manufacturing field effect transistor |
JP2001196589A (en) | 2000-01-04 | 2001-07-19 | Internatl Business Mach Corp <Ibm> | Top gate type TFT structure and manufacturing method thereof |
-
2004
- 2004-09-24 KR KR1020067005849A patent/KR20060102329A/en not_active Application Discontinuation
- 2004-09-24 EP EP04789254A patent/EP1667847A1/en not_active Withdrawn
- 2004-09-24 WO PCT/US2004/031980 patent/WO2005030491A1/en not_active Application Discontinuation
- 2004-09-24 JP JP2006528324A patent/JP2007508683A/en active Pending
- 2004-09-24 US US10/949,791 patent/US7144791B2/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3226255A (en) * | 1961-10-31 | 1965-12-28 | Western Electric Co | Masking method for semiconductor |
US4556627A (en) * | 1982-04-01 | 1985-12-03 | Sullivan Donald F | Transferring polymer from thin plastic films to photodevelop insulation patterns on printed wiring boards |
DE4440762C1 (en) | 1994-11-15 | 1996-04-04 | Borsi Kg F | Transparent carrier partial cladding for less material and labour |
US6077634A (en) * | 1996-03-28 | 2000-06-20 | Flex Products, Inc. | Methods for preparing color filters for displays |
JP2001135734A (en) | 1999-11-04 | 2001-05-18 | Fuji Electric Co Ltd | Method for manufacturing field effect transistor |
JP2001196589A (en) | 2000-01-04 | 2001-07-19 | Internatl Business Mach Corp <Ibm> | Top gate type TFT structure and manufacturing method thereof |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
RU2808044C2 (en) * | 2018-06-29 | 2023-11-22 | АКТЕГА Шмид Рюнер АГ | Method and device for enhancement of printed products |
Also Published As
Publication number | Publication date |
---|---|
EP1667847A1 (en) | 2006-06-14 |
WO2005030491A9 (en) | 2005-06-16 |
KR20060102329A (en) | 2006-09-27 |
JP2007508683A (en) | 2007-04-05 |
US20050142813A1 (en) | 2005-06-30 |
WO2005030491A1 (en) | 2005-04-07 |
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