US3508195A - Error detection and correction means - Google Patents
Error detection and correction means Download PDFInfo
- Publication number
- US3508195A US3508195A US357371A US3508195DA US3508195A US 3508195 A US3508195 A US 3508195A US 357371 A US357371 A US 357371A US 3508195D A US3508195D A US 3508195DA US 3508195 A US3508195 A US 3508195A
- Authority
- US
- United States
- Prior art keywords
- entr
- reg
- bus
- data
- read
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/10—Digital recording or reproducing
- G11B20/18—Error detection or correction; Testing, e.g. of drop-outs
- G11B20/1833—Error detection or correction; Testing, e.g. of drop-outs by adding special lists or symbols to the coded information
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
Definitions
- EXIT EXIT EXIT 78M M As AT AU EXIT EXIT ENTR 78M ausoum BUS 0UT3 1a AV Aw AA YHF BUS OUT 1 I WAR BUS our 5 ENTR ENTR ENTR 7 BUS our 0 8 A8 A0 A0 BUS oun 7a -aus our 2 7a
- FIG. 1 A first figure.
- ERROR DETECTION AND CORRECTION MEANS 516 Sheets-Sheet 16 Filed April 6, 1964 +DATA REG 6TR AF FIG 15 8A 828% +BUS 0uT1 A 0R 83B-Aw +BUS OUT 5 A ORc N AG AE AF -BATA REG 6 TR 27AM +R w REG T TR A 2mm AU +R-w REG 5 TR A 2TA ORE 75H +WRITE sET BYTE a AG +wR1TE SET BYTE 1 A REG 5 TR AN 8,10,21A W.
- a OR is gn s AK ORE +READ sum BYTE 1on5 AT -DATA REG A 3TR21A,75A M L A AL A 22B AL+READ TRANSLATE BIT 4 AP A 228 +READ TRANSLATE BIT 2 T' A ril 21, 1910 F. F. SELLERS, JR
- FIG.I8A ERROR DETECTION AND CORRECTION MEANS Filed April 6, 1964 516 Sheets-Sheet l9
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Signal Processing (AREA)
- Detection And Correction Of Errors (AREA)
- Error Detection And Correction (AREA)
- Programmable Controllers (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
- Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)
Description
A1131 1970 F. F; SELLERS, JR 3,508,,195
ERROR DETECTION AND CORRECTION MEANS Fild April 6, 1964 316 Sheets-Sheet l FIG. 1
2 cvcuc DATA REDUNDANCY INPUT RESIDUE CIRCUIT DIGITAL COMPARING CIRCUIT SUB-BLOCK ERROR PATTERN CHECK CIRCUIT RES'DUE CIRCUIT SUB-BLOCK POSITION 1 J ERROR 4 5 INDICATOR M r-M ATTORNEY April 1970 F. F. SELLERS, JR 3,508,195
ERROR DETECTION AND CORRECTION'MEAN Filed April 6, 1964 316 Sheets-Sheet 2 Q FIG. 2
LRC SAMPLE TIME CLOCK 22 A one ERROR A 5mm 2s coR \21 E PATTERN 52 no T0 corm 1 R TEST -51 wane 1 l R 1:! 0m 5mg TOTAPE n can cm I cPu vm om R/W OE To wk TAPE RD um 14 X9 R G 5 FIND mm SET UP A RE 6 A 0R TFILJD mm mm: TIME R CK K x9 55 TEST -41 CORR TIME 36 A mm mm s2 42 1am nus 1 /31 I one cm vRc N coamzcnous ,A READ TIME 5? /ENTER1 mm 26 E 7 vac mg 27/ OR P .-.,..E ;BROR
ERROR DETECTION AND CORRECTION MEANS Filed April 6, 1964 516 Sheets-Sheet 3 FIG.3A
l READ wR|TE MS CLOCK BUS 29A 109A 2&8 52 52 T R ETNAE SKEW R-w AMPS REGS REG 48A & B, 40A RB 18A & B
so 44A & B 20A & B 9 E W CORR FIRST CRCR EX 0R BIT 28A, 27A 56 28B 275 I T T i LRCR & XLATOR DENS SELN 21A EB CONTROL 408A & B 46MB 22A& B L|NES- T0 T TAPE UNITS 99A & B REAB Q WRITE HI CLIP RECG CLOCK G we CONTROL 57A & B 106A BB 47A RB LINES FROM W TAPE UNITS DEL CTR SIMULATE SIMULATE 100A & B GATING REG SELECT 117A&B,120 134,155 433 E so wR CLK & DEL CTR BKWD L.P. Q CONTROLS 85A&B 105A&B HZAXAB RD gm; 6 DELAY WR"" CLK CONDHION L CTR &DEL CTR 115A & B, 0505 115 106A & B
TU SEL BEc0BER 61A & B 62A& B SEQ IND UF B SSBAUEYC B 94A1\& B I
SERVICE IN Em ENTR ENTR 80BAJ AL FAM BA F BB 808 STATUS IN I OPERA'IIONAL IN ENTR X- 80B AN AN AP 80 ENTR ae so EXIT e31:
EXIT 7 CHAN April 1970 F. F. gELLERs, R 3,508,195
ERROR DETECTION AND CORRECTION MEANS Filed April 6. 1964 F 516 Sheets-Sheet 5 IN 2 EXIT EXIT EXIT 80B-AB AA AB F AC ENTR ENTR ENTR 80B AD -BUS IN 0 A0 F AR AS 808% BUS m 1 BUS [N5 EXIT EXIT EXIT ENTR ENTR ae ae ae 9e e 808 A6 A0 F AE AF AT F AU 808M BUS IN 4 ENTR 803M BUS IN 5 AV BUS IN 7 EXIT EXIT ENTR ENTR ae ae ae ae MAE AG F AH F AW AX 808M BUS IN6 ADDRESS IN EXIT EXIT ENTR ENTR ae SIOBAL BUS [NP AJ F AK F AY AZ 80B-AM April 1970 F. F. SELLERS, JR 3,508,195
ERROR DETECTION AND CORRECTION MEANS L. -nc 2: Fri CDO U Filed April 6, 1964 316 Sheets-Sheet 6 EXIT EXIT EXIT 78M M As AT AU EXIT EXIT ENTR 78M ausoum BUS 0UT3 1a AV Aw AA YHF BUS OUT 1 I WAR BUS our 5 ENTR ENTR ENTR 7 BUS our 0 8 A8 A0 A0 BUS oun 7a -aus our 2 7a EXIT EXIT ENTR ?9-AF Afi KY A BUS our 7 79 79M aus 0UT5 ENTR ENTR ENTR A? is AT BUS our 4 7s BUS OUT 5 79 BUS OUT 6 79 EXIT EXIT ENTR WAR BUS OUTP 3% 3 A A J SERVICE OUT 81 YHL BUS OUT 7 ENTR ENTR ENTR A? A L A? BUS OUT-P 79 T v ADDRESS our 84 -COMMAND OUT 84 EXIT EXIT EXIT HF ADDRESS our 8 8 0 8 0 COMMAND our 84-AA SUPPRESS our 81 8MB SERV|CE our ENTR ENTR ENTR SELECT OUT 81 AN AP Ao 0PERAT|0NAL OUT 81 SUPPRESS our 0P R no OUT 84M EA NAL EXIT EXIT EXIT EXIT ENTR 808 SELECT OUT 8 E 8 F 8 6 HOLD our l BJ BH MK HOLD our April 21, 1970 Filed April 6. 1964 F. F. SELLERS, JR
ERROR DETECTION AND CORRECTION MEANS 516 Sheets-Sheet '7 ENTR ENTR ENTR ENTR ENTR ENTR READ BUS? 48 AD BK CP AA AB AC AD READ BUS s 48 AC READ BUS 5 48 AB READ BUS 4 4-8 M -TU 8 REWINDING 91A 0P TU4 REWINDING 87A BK ENTR ENTR ENTR ENTR ENTR ENTR TUOREWINDING 87A BJ BL co AF AG AH 1 BJ READ W83 49 AH READ BUS 2 49 AG READ BUS P 49 AF -TU9 REWlNDING 94A 00 -TU2 REWINDING 88A BL ENTR ENTR ENTR R ENTR ENTR T 1 READ BUS o 50 *7 TRACK 100A BS -TU1O REWINDING 92A CR TU3 REWINDING 88A BM ENTR ENTR ENTR R ENTR R DE *8 EN cs A 08 A T c0 M0DB 400A As MODA 400A AR TUH REWINDING 92A 05 TU4 REWINDING 89A 8N ENTR ENTR ENTR R ENTR R i 8% DA I c x F B E A T C AT LOAD POINT 401 AX NOT FILE PROTECTED 402 BA -TU12 REWINDING 95A CT TU5 REWINDING 89A DP TU6 REWINDING 90A 5 QL QL Q R Q R Q J TU44 REWINDING 94A CW 80 cu BB CJ Dc CK cw OFF 401 80 -READ smus 101 M WR|TE ECHO 402 BB TU45 REWINDING 94A CV -TU15 REWINDING 93A DU TU7 REWINDING 90A ENTR ENTR ENTR ENTR R R ENTR ---DR A R A A ;+BKWD MEM 51 ON BR cv 0M AY cc PM ON M0DB OM OM April 21, 1970 Filed April 6. 1964 F. F. SELLERS, JR
ERROR nn'rnc'rzon AND oontmc'rrou Imus 316 Sheets-Shut 9 FIG.8 v
6084, +ADDRESS SW 0 A 54B BV +ADDRESS IN AA 56 +SENSE BITO v A 454W +DATA REG 5 TR A 75B AR +READ BITE 4 AK +DATA REG H'R A OR N +BUS m0 AE +DATA REG9 TR A l m 0 AF ii-AN 0R 0%} A 134 +DATA REG 10 TR AM I 6R A flwausnu A -BUS IN 1 A 54": +DATA REG 6 TR AL OR A OR 56 +SENSE BIT 4 M M A 6084) +ADDRESS SW 1 Av April 21, 1970 ERROR DETECTION AND CORRECTION MEANS Filed April 6. 1964 F. F. SELLERS, JR
516 Sheets-Sheet 12 N -sus IN 6 AF 23A,129
FIG.
95% +TU SEL 6TR A 54B AQ IADDRESS IN AA +SENSE we 58-A0 A 72B BF +SERV1CE IN AB c NAH +UN|T CHECK TR A I 538% +STATUS IN TR AD WAN +DATA REG 7 TR A +READ BYTE 2 AG *1 WAN +DATA REG 5 TR 2? Q2? 7554 +READ BYTE 3 AH MN +DATA REG 11 TR A 758% +READ BYTE 4 M g* 3 {HF +DATA REG12 TR AL A HF +DATA REG 4 TR AM 1 OR OR +DATA REG 8 TR A AN 44-AF AP AQ A WHO +UNIT EXCEPTION TR AS I OR +SENSE 8T? A E 58-AM AT g A 95B.AC AV BUS IN 6 25A,80A,429
+Bus m 1 23A,80A
April 21, 1970 F. F. SELLERS, JR
ERROR DETECTION AND CORRECTION MEANS Filed April 6, 1964 516 Sheets-Sheet 18 F IGJZ T 8M0 BUS on 3 A 83W +BUS ouTT A AC + DATA REG TZITR 9,11,18A AF +wBTTE SET BYTE 2 I T -AM Q 2 A +WRlTE sET BYTE 3 A OR N B'H AD A5 AF Y T DATA REG T2 TB 75A AE 27AM +R-W REG T R A -BEsET D T-T2 T2B-BE A 835 ms OUT 6 AH 74W OSHTIFT BYTE 20R4 A 82B-BF U 2 AK 7 DATA REG H-TR 9,11,1BB L l OR N a 4 AM AN DATA REG TT TR 75A A AM 228% +READ TRANSLATEBIT 6 AP April 1970 F. F. SELLERS, JR 3,508,195
ERROR DETECTION AND CORRECTION MEANS Filed April 6. 1964 316 Sheets-Sheet 14 FIG. 13
82W: +BUS OUT 1 A BUS ou 5 83B-AW T A A0 DATA REG AF L l 10m 8,10,18A
A M 0R N AD AE AF DATA REG M REG 5 TR 101R 75A 27A A 758 +WRITE SET BYTE2 AG 75M +WR|TE SET ems +BUS our 4 82B-BE A +BUSOUT 0 828-88 A +READ sumsmz AK ME AT 0R 4 +DATAREG am A r AN L l 8,10, 18A
A 0R N AL AM AN DATA REG m A" 75A +READ TRANSLATE BIT4 22 B'AL A ril 21, 1910 F. SELLERS, JR
ERROR DETECTION AND CORRECTION MEANS Filed April 6, 1964 316 Sheets-Sheet l5 27AM +R-W REG 1 TR A R-W REG T0 DATA REG BCF OR 745-50 A0 BUS our 7 A 75BAP+ WRITE SET BYTE1 AA 82HD+ BUS our 3 A 75B AH+WR|TE SET BYTE 3 AC I+DATA REG 8 TRAF l 9,11,18A,19A OR RESET 0 7 12 A OR 12555 AD AR REDTR SHE DATAREG8TR A 22B-AS A A 8F BUS OUT 2 A 85W BUS OUT 6 A +DATA REG 7 TR AN L 9,11,21A mm READ SHIFT BYTE QR 20R4 A ORE AL AT +READTRANSLATEBIT2 A J AM 22B-AY AP 21A OR; 22% READ TRANSLATE an 6 AS April 21, 1970 F. F. SELLERS, JR
ERROR DETECTION AND CORRECTION MEANS 516 Sheets-Sheet 16 Filed April 6, 1964 +DATA REG 6TR AF FIG 15 8A 828% +BUS 0uT1 A 0R 83B-Aw +BUS OUT 5 A ORc N AG AE AF -BATA REG 6 TR 27AM +R w REG T TR A 2mm AU +R-w REG 5 TR A 2TA ORE 75H +WRITE sET BYTE a AG +wR1TE SET BYTE 1 A REG 5 TR AN 8,10,21A W. A
74m +R-w REG To BATA REG BCF A 82MB BUS OUTO M A N SZHE +BUS OUT 4 AK AV AN -DATA REG 5 TR A0 21A,?5A ZZHE +READ TRANSLATE BIT G m +Rw REG 4 TR +REAB SHIFT BYTE 20R4 A T4B-AT OR 228 +REAB TRANSLATE BIT 0 A ril 21, 1970 F. F. SELLERS, JR 3,508,195
ERROR DETECTION AND CORRECTION MEANS Filed April 6, 1964 516 Sheets-Sheet l7 FIG. 16
22m +READ TRANSLATE am A +BUS oum 82BBD A AA +BUS OUT? 83B AY A +DATA REG 4TR9,11, AF OR OR N 21A A QR AE AF AD AR -DATA REG +R-W REG STR m +WRITE SET BYTE 2 A m Mm YSB'AM Q AG +WR|TE SET BYTE 1 74MB +R-w REG T0 DATA REG BCF +BUS OUTS 838- RESET [)1 e A m-Aw L AH QATA REG AN BZB-BF BUS OUT? A OR is gn s AK ORE +READ sum BYTE 1on5 AT -DATA REG A 3TR21A,75A M L A AL A 22B AL+READ TRANSLATE BIT 4 AP A 228 +READ TRANSLATE BIT 2 T' A ril 21, 1910 F. F. SELLERS, JR
ERROR DETECTION AND CORRECTION MEANS Filed April 6, 1964 516 Sheets-Sheet l8 SSHZ TRANSLATE 74MB R-W REG To DATA REG BCF R- REG 1 TR 2TB w DATA REGZTR AE TsA 82B BC +BUS 0UT1 +WRITE SET BYTE 838M +BUS mm A As N AC AF +READ 225% TRANSLATE BITS A AD +DATA REG 2TR AF 8,10,19A L A AL OR OR 82MB +BUS ouTo A l AV T (SB-AM SET BY E2 A N +DATA REG 1 TR AN BZB-BE LBUS AH AN 8,10,19A,20A
READ MHV sHTTT BYTE 10R3 A 22W +READTRANSLATE B|T2 AP DATA REG 1TR AM ZZHA +READTRANSLATE BITO AT 21 5A 0% 27B +R-w REGOTR I April 21, 1970 F. F. SELLERS,- JR 3,508,195
ERROR DETECTION AND CORRECTION MEANS Filed April 6, 1964 516 Sheets-Sheet l9 FIG.I8A
-6 RD DATA IIIRITE TAPE MARK 4OB AH READ DATA MN +DATA REG II TR Wm +DATA REG 9 TR WAF +DATA REG 6 TR 29% +EPR e BIT EPR T BIT 29A-AB CRCR 6 BIT 28A-AF +WDD +DATA REG 8 TR -CRCR T BIT IWRITE TRANSLATE 2 BIT A A +DATA REG I0 TR +WRITE TRANSLATE 3 BIT 2M5 +EPR A BIT 29A-HA 5 RD DATA 4 RD DATA +EPR 5 BIT +GATE EPR T0 R-W REG -CRCR 5 BIT I-WDD +CR R 4 BIT 29A-EA 33D-AF 28A-AL II2B-AF 28A-AK A ril 21, 1970 G F. F. SELLERS, JR 3,
ERROR DETECTION AND. CORRECTION MEANS Filed April 6, 1964 j 516 Sheets-Sheet :0
N -R-w REG 6TR AZ AZ 25A,52 I
OR N
+Rw REG 4 TR ZSAAS B0 A N FF R-W REG 4 TR BB AU BB 25A,52
-R-w REG 4 TR 27A AU R-W REG 5 TR 25A,52 BC + R-w REG 5TR 25A,27A M +Rw REG 5TR434BD BD -R-W REG 5 TR 27A AV
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US35737164A | 1964-04-06 | 1964-04-06 | |
US35736864A | 1964-04-06 | 1964-04-06 | |
US35736764A | 1964-04-06 | 1964-04-06 | |
US357370A US3404376A (en) | 1964-04-06 | 1964-04-06 | Computer sub-system circuits |
Publications (1)
Publication Number | Publication Date |
---|---|
US3508195A true US3508195A (en) | 1970-04-21 |
Family
ID=27502904
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US357371A Expired - Lifetime US3508195A (en) | 1964-04-06 | 1964-04-06 | Error detection and correction means |
US357368A Expired - Lifetime US3508194A (en) | 1964-04-06 | 1964-04-06 | Error detection and correction system |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US357368A Expired - Lifetime US3508194A (en) | 1964-04-06 | 1964-04-06 | Error detection and correction system |
Country Status (8)
Country | Link |
---|---|
US (2) | US3508195A (en) |
JP (1) | JPS4942804B1 (en) |
BE (1) | BE662155A (en) |
CH (1) | CH431147A (en) |
DE (1) | DE1287339B (en) |
GB (2) | GB1031554A (en) |
NL (1) | NL162760C (en) |
SE (1) | SE310807B (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3582633A (en) * | 1968-02-20 | 1971-06-01 | Lockheed Aircraft Corp | Method and apparatus for fault detection in a logic circuit |
US20050081131A1 (en) * | 2003-10-10 | 2005-04-14 | Quantum Corporation | Correcting data having more data blocks with errors than redundancy blocks |
US10840897B1 (en) * | 2019-10-31 | 2020-11-17 | Silicon Laboratories Inc. | Noise canceling technique for a sine to square wave converter |
US11038521B1 (en) | 2020-02-28 | 2021-06-15 | Silicon Laboratories Inc. | Spur and quantization noise cancellation for PLLS with non-linear phase detection |
US11095295B2 (en) | 2018-06-26 | 2021-08-17 | Silicon Laboratories Inc. | Spur cancellation for spur measurement |
US11316522B2 (en) | 2020-06-15 | 2022-04-26 | Silicon Laboratories Inc. | Correction for period error in a reference clock signal |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5617432A (en) * | 1994-11-09 | 1997-04-01 | International Business Machines Corporation | Common error protection code for data stored as a composite of different data formats |
US6185631B1 (en) * | 1998-10-14 | 2001-02-06 | International Business Machines Corporation | Program for transferring execution of certain channel functions to a control unit and having means for combining certain commands and data packets in one sequence |
EP2438511B1 (en) | 2010-03-22 | 2019-07-03 | LRDC Systems, LLC | A method of identifying and protecting the integrity of a set of source data |
US11994938B2 (en) | 2021-11-11 | 2024-05-28 | Samsung Electronics Co., Ltd. | Systems and methods for detecting intra-chip communication errors in a reconfigurable hardware system |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3051784A (en) * | 1961-05-12 | 1962-08-28 | Bell Telephone Labor Inc | Error-correcting system |
US3155818A (en) * | 1961-05-15 | 1964-11-03 | Bell Telephone Labor Inc | Error-correcting systems |
US3209327A (en) * | 1960-02-23 | 1965-09-28 | Ibm | Error detecting and correcting circuit |
US3222643A (en) * | 1961-06-22 | 1965-12-07 | Ibm | Error detecting and correcting systems |
US3227999A (en) * | 1962-06-15 | 1966-01-04 | Bell Telephone Labor Inc | Continuous digital error-correcting system |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3069657A (en) * | 1958-06-11 | 1962-12-18 | Sylvania Electric Prod | Selective calling system |
US3273119A (en) * | 1961-08-21 | 1966-09-13 | Bell Telephone Labor Inc | Digital error correcting systems |
US3311878A (en) * | 1963-02-14 | 1967-03-28 | Ibm | Error checking system for binary parallel communications |
US3315228A (en) * | 1963-08-19 | 1967-04-18 | Futerfas Jack | System for digital communication error measurements including shift registers with identical feedback connections |
US3308429A (en) * | 1963-11-15 | 1967-03-07 | Bell Telephone Labor Inc | Cyclic and multiplication by 2 mod n permutation decoder for systematic codes |
-
0
- GB GB1053174D patent/GB1053174A/en active Active
-
1964
- 1964-04-06 US US357371A patent/US3508195A/en not_active Expired - Lifetime
- 1964-04-06 US US357368A patent/US3508194A/en not_active Expired - Lifetime
-
1965
- 1965-03-26 GB GB13074/65A patent/GB1031554A/en not_active Expired
- 1965-04-01 NL NL6504178.A patent/NL162760C/en not_active IP Right Cessation
- 1965-04-02 JP JP40018988A patent/JPS4942804B1/ja active Pending
- 1965-04-03 DE DEJ27831A patent/DE1287339B/en not_active Withdrawn
- 1965-04-05 CH CH471265A patent/CH431147A/en unknown
- 1965-04-06 SE SE4439/65A patent/SE310807B/xx unknown
- 1965-04-06 BE BE662155A patent/BE662155A/xx unknown
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3209327A (en) * | 1960-02-23 | 1965-09-28 | Ibm | Error detecting and correcting circuit |
US3051784A (en) * | 1961-05-12 | 1962-08-28 | Bell Telephone Labor Inc | Error-correcting system |
US3155818A (en) * | 1961-05-15 | 1964-11-03 | Bell Telephone Labor Inc | Error-correcting systems |
US3222643A (en) * | 1961-06-22 | 1965-12-07 | Ibm | Error detecting and correcting systems |
US3227999A (en) * | 1962-06-15 | 1966-01-04 | Bell Telephone Labor Inc | Continuous digital error-correcting system |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3582633A (en) * | 1968-02-20 | 1971-06-01 | Lockheed Aircraft Corp | Method and apparatus for fault detection in a logic circuit |
US20050081131A1 (en) * | 2003-10-10 | 2005-04-14 | Quantum Corporation | Correcting data having more data blocks with errors than redundancy blocks |
US7228467B2 (en) * | 2003-10-10 | 2007-06-05 | Quantum Corporation | Correcting data having more data blocks with errors than redundancy blocks |
US11095295B2 (en) | 2018-06-26 | 2021-08-17 | Silicon Laboratories Inc. | Spur cancellation for spur measurement |
US11855649B2 (en) | 2018-06-26 | 2023-12-26 | Skyworks Solutions, Inc. | Spur cancellation for spur measurement |
US10840897B1 (en) * | 2019-10-31 | 2020-11-17 | Silicon Laboratories Inc. | Noise canceling technique for a sine to square wave converter |
US11038521B1 (en) | 2020-02-28 | 2021-06-15 | Silicon Laboratories Inc. | Spur and quantization noise cancellation for PLLS with non-linear phase detection |
US11316522B2 (en) | 2020-06-15 | 2022-04-26 | Silicon Laboratories Inc. | Correction for period error in a reference clock signal |
Also Published As
Publication number | Publication date |
---|---|
GB1053174A (en) | |
NL162760C (en) | 1980-06-16 |
US3508194A (en) | 1970-04-21 |
JPS4942804B1 (en) | 1974-11-16 |
BE662155A (en) | 1965-08-02 |
NL6504178A (en) | 1965-10-07 |
DE1287339B (en) | 1969-01-16 |
GB1031554A (en) | 1966-06-02 |
CH431147A (en) | 1967-02-28 |
SE310807B (en) | 1969-05-12 |
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