JP3018393B2 - Variable length data processor - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable-length data processing device suitable for quickly checking the data length of variable-length data.

[Summary of the Invention] The present invention provides a variable-length data processing apparatus, in which N delimiter code detecting means are provided, a variable-length data string is read out in block units of N times the unit length, and each unit length in the block is read. The data length of the variable-length data can be quickly checked by detecting the delimiter codes for the minutes in parallel and determining the data length of the variable-length data based on the detection status.

2. Description of the Related Art In a variable-length data processing apparatus, when checking the data length of variable-length data, for example, when checking how the word length has changed due to word correction, a delimiter code (delimiter code) is used. It is necessary to detect the position of the delimiter code, but the length of the delimiter code is the length of a unit length such as 1 byte. Reading has been performed sequentially in units of length, for example, one byte.

[Problems to be Solved by the Invention] As described above, conventionally, reading is performed in units of the length of the unit length, and delimiter detection is sequentially performed for each unit length, so that it takes a long time to check the data length. I needed it.

As a method for solving this problem, N times the unit length (N =
It is conceivable to read out in block units of (2, 3,...) And perform delimiter detection simultaneously and in parallel for each unit length in this block. In this case, a technique of checking the data length based on the detection result is considered. Must be established.

Then, for each variable length data string of N times the unit length, delimiter detection is performed simultaneously and in parallel for each unit length, and if the data length can be checked based on the detection result, the variable length can be changed quickly. Obviously, the data length of the long data can be checked.

It is an object of the present invention to perform delimiter detection simultaneously and in parallel for each unit length for each block unit having a multiple of the unit length, and to check the data length based on the detection result.

[Means for Solving the Problems] The means of the present invention are as follows.

The storage means a (see the functional block diagram of FIG. 1, the same applies hereinafter) stores a variable-length data string delimited by a unit-length delimiter code.

N (plural) delimiter code detecting means b are provided.

The supply unit c reads the variable-length data strings from the storage unit a in parallel in block units of N times the unit length, and supplies the variable-length data strings to the delimiter code detection units b by the unit length from the beginning.

Updating means d supplies supply means c until one of the N separating code detecting means b detects the separating code.
Numerical data is updated each time reading is performed on a block basis.

The generating means e determines which unit length in the block the delimiter code detecting means b corresponds to when the delimiter code is detected by any of the N delimiter code detecting means b. Then, length data of the variable length data is generated based on the determination result and the numerical data updated by the updating means.

[Operation] The operation of the means of the present invention is as follows.

Now, it is assumed that the storage means a stores a variable-length data string delimited by a one-byte delimiter code, which is a unit length, and that four delimiter code detection means b exist. For convenience of explanation, these are separated by delimiter code detecting means b1, b2, b3, b4.
Shall be called.

In this case, the supply unit c reads the variable-length data strings from the storage unit a in parallel in units of 4-byte blocks. Then, the first byte, the second byte, the third byte, and the fourth byte of the four bytes are supplied to delimiter code detection means b1, b2, b3, and b4, respectively.

The updating unit d supplies the supply unit c until the delimiter code is detected by any of the four delimiter code detection units b.
Numerical data is updated each time reading is performed on a block basis. The numerical data is updated by plus one or plus four every time the data is read in units of, for example, 4 bytes.

The generating means e determines which unit length in the block the delimiter code detecting means b corresponds to when the delimiter code is detected by any of the four delimiter code detecting means b. The length data of the variable length data is generated based on the determination result and the data updated by the updating means. For example, no delimiter code is detected from the first block read from the storage means a, and the delimiter code detection means b2 corresponding to the second byte in the second block.
In the case where the delimiter code is detected, the updating means d increments by one for each readout in block units, and when the numerical data is "2", the delimiter starts from the second byte of the second block. Since the code is detected, the length data of 5 bytes is generated.

Therefore, delimiter detection can be performed simultaneously and in parallel for each unit length for each block unit having a multiple of the unit length, and the data length can be checked based on the detection result.

First Embodiment Hereinafter, a first embodiment will be described with reference to FIG. 2 to FIG.

FIG. 2 is a block diagram of a data length measuring device built in the variable length data processing device, and includes a RAM 1, a control unit 2,
It comprises a register 3, four delimiter detection units A, B, C, D, a conversion unit 4, and a counter CT.

The RAM 1 stores a variable-length data string delimited by a 1-byte (unit length) delimiter code. For example, when data is moved in the RAM 1, a 4-byte data string is controlled under the control of the control unit 2. The data is read out to the register 3 in parallel in block units, and 1
The data is output to the delimiter detection units A, B, C, and D in byte units.

Each delimiter detection unit A, B, C, D checks whether the supplied data is a delimiter code, respectively,
The detection signal SA, SB, SC, SD of “1” or “0” is output to the conversion unit 4. In this case, the detection signals SA, SB, SC, and SD indicate that “1” is a delimiter code and “0” is not a delimiter code.

The conversion unit 4 outputs a count instruction signal to the control unit 2 when no delimiter code is detected from any of the delimiter detection units A, B, C, and D. In addition, delimiter detector A,
When a delimiter code is detected in any of B, C, and D, a delimiter detection signal is output to the control unit 2, and the detection signals SA, SB, SC, and SD are converted into 2-bit data. The bit data (conversion signals a and b) are output as the lower two bits of the data length data. The above conversion is
This is executed based on the conversion table TB shown in FIG.

When the count instruction signal is input, the control unit 2
The count-up instruction signal is output to the counter CT.

The count value of the counter CT is composed of 6 bits, and is output as upper 6 bits data for the lower 2 bits of the data length data. That is, every time the counter CT counts up by 1, the data length data is increased by 4 corresponding to the number of the delimiter detectors A, B, C, D.

Next, the data length measurement operation will be described with reference to FIGS.

Now, it is assumed that a variable-length data string as shown in FIG. 4 is stored in the RAM1. In the figure, “′” indicates a 1-byte delimiter code, and “x” indicates 1-byte data other than the delimiter code.

First, a first 4-byte block is read from the RAM 1 under the control of the control unit 2, set in the register unit 3, and distributed to the delimiter detection units A, B, C, D one byte at a time. At this time, the first byte, second byte, third byte, and fourth byte data in the 4-byte block are supplied to the delimiter detection units A, B, C, and D, respectively.

Therefore, each of the delimiter detection units A, B, C, and D checks whether or not the supplied 1-byte data is a delimiter code, and if it is a delimiter code, "1"; The detection signal SA, SB, SC, SD of "0" is output to the conversion unit 3. In the above example, since all of the four bytes are not delimiter codes, the detection signals SA, SB, SC, and SD are all “0”. As described above, when all of the detection signals SA, SB, SC, and SD are “0”, the conversion unit 3 outputs a count instruction signal to the control unit 2, whereby the control unit 2 instructs the counter CT to count up. A signal is output, and the count value of the counter CT is incremented by one. In the above example, the count value in the counter CT is “1”.

Next, the control unit 2 writes the data of the register 3 to the write address of the RAM 1, reads the data of the next second block (data of the fifth to eighth bytes from the head) from the RAM 1, sets the data in the register 3, Delimiter detection section in a way like
A byte is distributed to A, B, C, and D at a time. In this case, in the data example of FIG. 4, the delimiter code of the sixth byte from the top is supplied to the delimiter detection unit B, so that only the detection signal SB becomes “1” and the other detection signals SA, SC, SD becomes “0”.
At this time, the conversion signals a and b output from the conversion unit 4 are “1” and “0”, respectively, as shown in the conversion table of FIG.

On the other hand, the contents of the current 6 bits of the counter CT are as shown in FIG. Therefore, when read as numerical data in which the 6 bits of the counter CT are the upper bits and the converted signals a and b are the lower bits, the value becomes "6", and it can be seen that the delimiter code exists in the sixth byte from the top. The data length of the variable length data before the code is 5
It turns out to be a byte. This reading is performed by the control unit 2 or a CPU (not shown).

By adopting such a data reading method,
The counter CT counts the number of blocks having no delimiter code, multiplies the number of blocks by 4, and adds the numerical values indicated by the conversion signals a and b to the multiplied value, thereby eliminating a troublesome operation.

Second Embodiment Next, a second embodiment will be described with reference to FIGS.

The second embodiment is different from the converter 4 of the first embodiment shown in FIG.
Is configured as shown in FIG. 6 so that the number of data bytes between each delimiter is counted even when data reading is performed continuously, and when a plurality of delimiters are present in four consecutive bytes, The number of bytes of data between delimiters can be checked.

The conversion unit in the second embodiment includes a first conversion unit 41 to a fourth conversion unit 44, and these include the detection signal SA described above.
To SD are input in common, and the detection signals SA to SD are converted into the following numerical values.

When the delimiter code exists in the 4-byte block read in parallel, the first conversion unit 41 converts the delimiter code into a numerical value indicating the number of the byte from the head of the block. The first conversion unit 41 generates conversion signals a and b with reference to the conversion table of FIG. 3 just like the conversion unit 4 of the first embodiment, and when no delimiter code exists in the block, Outputs a count instruction signal.

When a plurality of delimiter codes are present in a 4-byte block read in parallel, the second conversion unit 42 converts the delimiter code into a numerical value indicating the number of bytes up to the next delimiter code.

When the delimiter code is present in the 4-byte block read in parallel, the third conversion unit 43 converts the delimiter code into a remaining byte number indicating how many bytes of data remain after the delimiter code. The number of remaining bytes converted by the third conversion unit 43 is equal to the number of detection signals SA to SD corresponding to the next block.
Is output to the previous remaining byte count register R and stored in the previous remaining byte count register R until the next delimiter code is detected. When there are a plurality of delimiter codes, conversion is made to the number of remaining bytes after the last delimiter code.

When a plurality of delimiter codes are present in a 4-byte block read in parallel, the fourth conversion unit 44 converts the plurality of delimiter codes into the number of delimiter codes.

The two-bit adder 45 includes a first conversion unit 41 that indicates the number of the byte in the block where the head delimiter code is in the block.
Is added to the last remaining byte number set in the last remaining byte number register R, and the added value is output as conversion signals aa, bb. These converted signals aa, bb are used as lower two bits of data length data, like the converted signals a, b in the first embodiment.

The count instruction signal from the first converter 41 and the carry signal from the 2-bit adder 45 are input to the counter CT via the OR gate 46 as a count-up instruction signal.

Next, the operation of the second embodiment will be described with reference to FIGS.

First, the continuous check operation of the data length will be described with reference to the data example of FIG.

When the four bytes "xx, x" of the first block in FIG. 7 are read, the detection signals SA, SB, SC, and SD become "0010", respectively. The conversion processing is performed based on the conversion table TB, and “11” is set to 2 as the conversion signals a and b.
Output to the bit adder 45. At this time, the first conversion unit 41
Does not output the count instruction signal because "1" is included in the detection signals SA, SB, SC, and SD.

At this time, since the conversion result by the second conversion unit 42 has only one delimiter code, the conversion processing is not performed. The number of remaining bytes obtained by the third conversion unit 43 is “1” because the delimiter code is the third byte from the beginning, and the conversion result by the fourth conversion unit 44 is “1” because there is only one delimiter code. 1 ". At this point, the remaining byte number “1” by the third conversion unit 43 has not yet been output to the previous remaining byte number register R.

Therefore, the conversion signal a output from the 2-bit adder 45
a, bb is the converted signal a, b from the first converter 41, "11"
, And no carry signal is output. Therefore, the counter CT remains “0”.

Therefore, similarly to the first embodiment, when read as numerical data in which the 6 bits of the counter CT are upper bits and the converted signals aa, bb are lower bits, it becomes "3" (see FIG. 8 (a)). The delimiter code exists at the third byte, and it becomes clear that the data length of the variable length data before that is 2 bytes.

When the second block is read, the third conversion unit 43
The remaining byte number "1" is set in the previous remaining byte number register R. At this time, since the delimiter code does not exist in the second block, a count instruction signal is output from the first conversion unit 41, and the count value in the counter CT is increased by 1 to "1" based on this signal. . When the count-up is performed in this manner, the data length read operation is not performed.

Next, when the 4 bytes “×, XX” of the third block are read, the detection signals SA, SB, SC, and SD become “0100”, respectively. Convert
“10” is output to the 2-bit adder 45 as the converted signals a and b.

Therefore, the 2-bit adder 45 adds “10” from the first conversion unit 41 to the current remaining byte number “1” in the previous remaining byte count register R, that is, “01”, and the addition result is obtained. “11” is output as the conversion signals aa, bb.

At this time, the count value of the counter CT is "1" as described above, so that the counter
When it is read as numerical data in which the 6 bits of CT are upper bits and the converted signals aa and bb are lower bits, it becomes "7" (see FIG. 8B), and the data length of the variable length data between the delimiter codes Becomes 6 bytes.

The control unit 2 clears the count value of the counter CT each time the data length check based on the count value and the conversion signals aa, bb as described above is completed.

Next, a case where there are a plurality of delimiter codes in a 4-byte block will be described with reference to a data example in FIG.

In this example of “×, ×,”, the detection signals SA, SB, SC, SD
Becomes “0101” respectively. In this case, the first conversion unit 41
The existence of the second detection signal SD of "1" is ignored and regarded as "0". As the detection signals SA, SB, SC, and SD, "0100" is input to the conversion table TB, respectively. Perform the conversion,
"10" is output as the converted signals a and b. This converted signal is used as data for checking the data length between the delimiter code and the preceding delimiter code.

Further, in this example, the second conversion unit 42 converts the distance data with the delimiter code to “2”, and the fourth conversion unit 44
Is converted to the number data “2” of the delimiter code.

Therefore, as described above, after checking the data length between the delimiter code and the preceding delimiter code, the distance data “2” converted by the second conversion unit 42 is read, and It turns out that the data length between the delimiter codes is 1 byte. In this embodiment, since reading is performed in units of 4-byte blocks,
It is difficult to imagine an example in which three or more delimiter codes exist in this block. However, when reading in a larger block unit of 5 bytes or more, if there are three or more delimiter codes, the second conversion unit 42 Converts into a plurality of distance data corresponding to these. Then, it is determined that the number of the distance data is a number obtained by subtracting -1 from the number data of the delimiter code converted by the fourth conversion unit 44.

When a plurality of delimiter codes exist in one block, the third conversion unit 43 converts the number of remaining bytes based on the last delimiter code in the block.

In this way, continuous reading of data is dealt with for a plurality of delimiter codes in one block.

[Effects of the Invention] According to the present invention, delimiter detection can be performed simultaneously and in parallel for each unit length for each block unit having a multiple of the unit length, and the data length can be checked based on the detection result. The data length check of data can be speeded up.

[Brief description of the drawings]

1 is a functional block diagram of the present invention, FIG. 2 is a block diagram of the first embodiment, FIG. 3 is a diagram showing a conversion table, and FIG. 4 is a variable table for explaining the operation of the first embodiment. FIG. 5 is a view showing an example of long data, FIG. 5 is a view showing generated data in the data example of FIG. 4, FIG. 6 is a block diagram of a conversion unit in the second embodiment, and FIG. A diagram showing an example of data for explaining a long continuous check operation,
FIG. 8 is a diagram showing generated data in the data example of FIG. 7, and FIG. 9 is a diagram showing a data example for explaining an operation when a plurality of delimiter codes exist in one block in the second embodiment. It is. 1 ... RAM, 2 ... Control unit, 4 ... Conversion unit, CT ... Counter, A, B, C, D ... Delimiter detection unit, TB ... Conversion table.

Claims (1)

(57) [Claims] 1. A storage means for storing a variable-length data string delimited by a unit-length delimiter code, N delimiter code detection means, and variable-length data from the storage means in block units of N times the unit length. A supply means for reading out the columns in parallel and supplying them to the respective delimiter code detecting means by a unit length from the head thereof, and the supply means until one of the N delimiter code detectors detects a delimiter code. Means for updating numerical data each time parallel reading is performed by the means; and when a delimiter code is detected by any of the N delimiter code detectors, the delimiter code detector associated with the detection determines which unit in the block. Determine if it corresponds to the long,
Generating means for generating length data of variable-length data based on the result of the determination and the numerical data updated by the updating means.