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US20060261911A1 - Matching circuit - Google Patents

Matching circuit Download PDF

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Publication number
US20060261911A1
US20060261911A1 US11/434,889 US43488906A US2006261911A1 US 20060261911 A1 US20060261911 A1 US 20060261911A1 US 43488906 A US43488906 A US 43488906A US 2006261911 A1 US2006261911 A1 US 2006261911A1
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United States
Prior art keywords
matching
matching block
circuit
block
auxiliary
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Abandoned
Application number
US11/434,889
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English (en)
Inventor
Atsushi Fukuda
Hiroshi Okazaki
Shoichi Narahashi
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NTT Docomo Inc
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NTT Docomo Inc
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Publication date
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Assigned to NTT DOCOMO, INC. reassignment NTT DOCOMO, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: FUKUDA, ATSUSHI, NARAHASHI, SHOICHI, OKAZAKI, HIROSHI
Publication of US20060261911A1 publication Critical patent/US20060261911A1/en
Priority to US12/396,980 priority Critical patent/US7750756B2/en
Priority to US12/405,891 priority patent/US7750757B2/en
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H04B1/44—Transmit/receive switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38—Impedance-matching networks
    • H03H7/383—Impedance-matching networks comprising distributed impedance elements together with lumped impedance elements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02—Transmitters
    • H04B1/04—Circuits
    • H04B1/0458—Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages

Definitions

  • This invention pertains to a matching circuit handling multiple bands which, in a plurality of frequency bands, establishes matching between circuits having different impedances. It pertains to matching circuits built into small-sized multiband power amplifiers which amplify, with high efficiency, signals in a plurality of frequency bands used e.g. in mobile communications and satellite communications.
  • the configuration of the 800 MHz/2 GHz band power amplifier shown in Reference 1 is shown in FIG. 1 , and the operation thereof will be explained.
  • the transmitted signal coming from the transmitter is input into the single pole terminal of an input switch 150 , a Single Pole Double Throw (SPDT) switch.
  • the transmitted signal by being switched by input switch 150 , is input into an 800 MHz band amplifier 151 connected to a double throw terminal of input switch 150 , or a 2 GHz band amplifier 152 .
  • the output signals of 800 MHz band amplifier 151 and 2 GHz band amplifier 152 are switched by an output switch 153 , a Single Pole Double Throw switch, and supplied to an antenna.
  • FIG. 2 the configuration of 800 MHz band amplifier 151 and 2 GHz band amplifier 152 is shown.
  • Each amplifier is configured with a series connection of an input matching circuit 160 , an amplification element 161 , and an output matching circuit 162 .
  • Input matching circuit 160 obtains matching between a signal source 163 , whose output impedance does not depend on the frequency, and amplification element 161 .
  • Output matching circuit 162 obtains matching between the output impedance of amplification element 161 and a load 164 .
  • the method of designing matching circuits for wideband operation can also be considered.
  • the result is that there occurs a reduction in gain and efficiency.
  • the applicant of the present application first proposed, in Reference 2 (International Publication No. WO 2004/082138 Pamphlet), a matching circuit which can handle the conversion to multiband capability.
  • the input matching circuit of the amplifier disclosed in Reference 2 is shown in FIG. 3 .
  • the FET (Field Effect Transistor) input impedance can be expressed as a load 170 (impedance Z L (f)) having frequency-dependent characteristics.
  • a first terminal P 1 to which this load 170 is connected has a main matching block 171 connected to it.
  • the other end (point A) of main matching block 171 is connected to one end of a delay circuit 172 having a certain reactance value.
  • the other end (point B) of delay circuit 172 is connected to a signal source 173 having an impedance Z 0 (below, the impedance not changing with frequency is called Z 0 ).
  • Main matching block 171 is designed to match the impedance Z L (f 1 ) of load 170 with the impedance Z 0 of signal source 173 , in frequency band f 1 .
  • main matching block 171 becomes a matching circuit with respect to frequency f 1 .
  • Delay circuit 172 is constituted by a distributed-parameter element, the characteristic impedance of which is given, as is well known, by the relationship shown in Eq. 1.
  • Z 0 ⁇ square root over (L/C) ⁇ (1)
  • L is the inductance of the distributed-parameter element and C is the capacitance of the distributed-parameter element. Consequently, by taking the characteristic impedance of delay circuit 172 to be Z 0 , matching is obtained in frequency band f 1 between signal source 173 and load 170 .
  • main matching block 171 is a matching circuit with respect to frequency f 1 , matching between signal source 173 and load 170 is not obtained at frequency f 2 . Accordingly, an auxiliary matching block 175 is connected via switch element 174 to point B. And then, when operating in frequency band f 2 , switch element 174 is taken to be in a conducting state.
  • the delay value of delay circuit 172 is set to the delay value required to match at point B in frequency band f 2 .
  • FIG. 4 an example where the number of frequency bands which can be handled has been increased to three is shown in FIG. 4 .
  • the system increases by one additional set, the set of delay circuit 180 , switch element 181 , and auxiliary matching block 182 .
  • the impedance Z L (f 3 ) of load 170 is regulated by means of delay circuit 180 and auxiliary matching block 182 so that the impedance seen from point C toward the side of delay circuit 180 becomes Z 0 .
  • switch element 174 and switch element 181 are chosen to be in a non-conducting state in the case of frequency band f 1
  • switch element 174 is chosen to be in a conducting state for in the case of frequency band f 2
  • switch element 181 is chosen to be in a conducting state in the case of frequency band f 3 .
  • the delay value required in frequency band f 3 can be considered to be the sum of the values for delay circuit 172 and delay circuit 180 .
  • delay circuits 172 and 180 it is realistic to choose them to be transmission lines which are distributed parameter networks. However, particularly in cases where the frequency is low, transmission lines become comparatively large components inside the circuit. E.g., if load 170 is taken to be a FET and in case an amplifier for the 1 GHz band is designed, a 50 ⁇ transmission line has a width of 0.63 mm and a length of 9.22 mm, so the result is a component having a length of about 10 mm.
  • the delay circuits are realistically constituted by transmission lines.
  • the length easily becomes comparatively long.
  • the area of a transmission line serving as a delay circuit becomes large, so there has been the problem that the matching circuit as a whole also was made bigger. Further, this problem increases as the frequency becomes lower, and as the number of frequencies rises.
  • the matching circuit of the present invention has a first matching block, connected at one end to a load having an impedance with frequency-dependent characteristics and a second matching block formed by a lumped-parameter element connected in series to the first matching block.
  • the second matching block matches the impedances of the signal source and the load in the lowest frequency band.
  • it has a ⁇ -type circuit.
  • a ⁇ -type circuit is a circuit in which respective switch elements and auxiliary matching blocks are connected to both ends of the second matching block.
  • the matching conditions in the aforementioned low frequency band can be created by a series connection of the first matching block and the second matching block.
  • the impedance of the ⁇ -type circuit in the case of a high frequency band, by setting an appropriate value for the ⁇ -type circuit, it is possible to choose the impedance of the ⁇ -type circuit to be Z 0 and to choose the impedance of the second matching block to be one with no influence for the high frequency band.
  • the second matching block is constituted by lumped elements, it is possible to make the matching circuit smaller-sized than the conventional matching circuit constituted by transmission lines.
  • FIG. 1 is a diagram showing the configuration of a conventional 800 MHz/2 GHz band power amplifier
  • FIG. 2 is a diagram showing the configuration of each power amplifier in FIG. 1 .
  • FIG. 3 is a diagram showing a conventional matching circuit.
  • FIG. 4 is a diagram showing an example where the number of frequency bands which can be handled by the conventional matching circuit has been taken to be three.
  • FIG. 5 is a diagram showing the base configuration of a matching circuit of this invention.
  • FIG. 6A is a diagram explaining the operation in a low frequency band f 2 .
  • FIG. 6B is a diagram explaining the operation in a high frequency band f 1 .
  • FIG. 7 is a diagram showing the configuration where the ⁇ -type circuit of a matching circuit of this invention, shown in FIG. 5 , has been replaced with a T-type circuit.
  • FIG. 8 is a diagram where the matching circuit of the present invention, shown in FIG. 5 , has been generalized so that it can be adapted to a plurality of frequency bands.
  • FIG. 9 is a diagram showing the image of N frequency bands.
  • FIG. 10 is a diagram showing an embodiment of a matching circuit using two T-type circuits.
  • FIG. 11 is a diagram where a matching circuit of the present invention, using T-type matching circuits, has been generalized so that it can be adapted to a plurality of frequency bands.
  • FIG. 12 is a diagram showing another configuration example of a matching circuit of the present invention using T-type matching circuits.
  • FIG. 13 is a diagram showing a configuration example of a matching circuit of the present invention, using T-type matching circuits where auxiliary matching blocks have been connected in series.
  • FIG. 14 is a diagram showing an example where the second matching block of FIG. 5 is configured with an L-type circuit.
  • FIG. 15 is a diagram showing the configuration of the second matching block using a T-type circuit.
  • FIG. 16 is a diagram showing another configuration of the second matching block using a T-type circuit.
  • FIG. 17 is a diagram showing an example where the first matching block has been configured with a plurality of elements.
  • FIG. 18 is a diagram showing an example where a matching circuit of this invention has been applied to an amplification circuit.
  • FIG. 19A is a diagram showing the simulation results in the case of a setting for the 2 GHz band, with the configuration of FIG. 18 .
  • FIG. 19B is a diagram showing the simulation results in the case of a setting for the 1 GHz band, with the configuration of FIG. 18 .
  • the matching circuit of the present invention is constituted by a first matching block 2 and a matching circuit part 8 consisting of lumped elements.
  • Matching circuit part 8 is a ⁇ -type circuit constituted by a second matching block 3 , switch elements 4 and 5 , and auxiliary matching blocks 6 and 7 .
  • One end of first matching block 2 is connected to a first terminal P 1 to which an element 1 (a load in this example) having an impedance Z L (f) with frequency-dependent characteristics is connected.
  • an element 1 a load in this example
  • Z L (f) impedance Z L (f) with frequency-dependent characteristics
  • second matching block 3 is connected, via a second terminal P 2 , to an element 9 , e.g. a signal source, with an impedance Z 0 whose impedance does not depend on the frequency. Also, to the terminal on the first matching block 2 side of second matching block 3 , there is connected a series circuit of switch element 4 and auxiliary matching block 6 . To the other end of second matching block 3 , there is connected a series circuit of switch element 5 and auxiliary matching block 7 . By being connected in this way, matching circuit part 8 becomes a ⁇ -type circuit.
  • element 9 e.g. a signal source
  • FIG. 6A is a diagram showing the operation in a low frequency band f 2 .
  • FIG. 6B is a diagram showing the operation in a high frequency band f 1 .
  • switch elements 4 and 5 of FIG. 5 are non-conducting.
  • impedance Z 2 of the second matching block is set so that the sum Z A of impedance Z L (f 2 ) of element 1 in the frequency band f 2 , impedance Z 1 of first matching block 2 , and impedance Z 2 of second matching block 3 (below, the impedances will be omitted in portions where the same can be considered not to be particularly necessary) becomes Z 0 .
  • the impedances are matched at second terminal P 2 .
  • matching circuit 8 becomes a ⁇ -type circuit in which auxiliary matching blocks 6 and 7 are respectively connected to both ends of second matching block 3 .
  • first matching block 2 is a matching circuit for the frequency band f 1 , impedance matching is obtained with impedance Z 0 of element 9 at point A at frequency f 1 .
  • first matching block 2 which operates to match impedance Z L (f 1 ) of element 1 to impedance Z 0 of element 9 .
  • second matching block 3 which operates to match the impedance Z L (f 2 ) of element 1 , changed by the modification of the frequency band from f 1 to f 2 , to the impedance Z 0 of element 9 .
  • auxiliary matching blocks 6 and 7 which operate to remove the influence of second matching block 3 which is a hindrance in frequency band f 1 .
  • Matching circuit part 8 in FIG. 5 can also be configured with a T-type circuit.
  • An example where the matching circuit part has been configured with a T-type circuit is shown in FIG. 7 .
  • second matching block 3 in FIG. 5 is replaced by a second matching block 31 and a series second matching block 32 .
  • One end of second matching block 31 is connected to point A.
  • the other end of second matching block 31 is connected to one end of series second matching block 32 .
  • the other end of series second matching block 32 is connected to second terminal P 2 .
  • To the connection point of second matching block 31 and series second matching block 32 there is connected an auxiliary matching block 34 via a switching element 33 .
  • FIG. 5 and FIG. 7 cannot be converted with the well known Y- ⁇ conversion (T- ⁇ conversion) relationship.
  • the impedance value of auxiliary matching block 34 may be designed by adding this condition.
  • matching block part 8 may be designed with a T-type circuit from the beginning. In this way, it is possible for matching circuit part 8 to have a configuration which is not limited to a ⁇ -type circuit but can also be a T-type circuit.
  • FIG. 8 is an example where the basic structure of this invention, shown in FIG. 5 , has been generalized so that it can be adapted to a plurality of frequency bands.
  • This matching circuit is composed of first matching block 2 , L-type blocks 43 a to 43 n , and shunt circuit blocks 46 a to 46 n .
  • One terminal of second matching block 40 a is connected to first matching block 2 .
  • the other end of second matching block 40 a is connected to one terminal of second matching block 40 b .
  • each second matching block 40 i is connected in series.
  • First auxiliary matching block 42 i is connected, via first switch element 41 i , to the terminal of second matching block 40 i on the side of first terminal P 1 .
  • an L-type circuit is formed by means of second matching block 40 i , first switch element 41 i , and first auxiliary matching block 42 i.
  • first switch elements 41 a to 41 c and second switch elements 44 a to 44 c are all in a non-conducting state.
  • Element 1 is connected, via three second matching blocks 40 a to 40 c connected in series, to element 9 (impedance Z 0 ).
  • the impedance Z L (f) of element 1 changes with frequency.
  • element 9 is a signal source or the like, the impedance of which does not depend on the frequency.
  • second matching block 40 c is designed so that the combined impedance of element 1 , first matching block 2 , and second matching blocks 40 a and 40 b is converted to Z 0 . If second matching block 40 c is designed in this way, the impedance Z 0 is matched at the second terminal P 2 side end of second matching block 40 c.
  • switch element 41 c of L-type block 43 c and second switch element 44 a of shunt circuit block 46 a are chosen to be in a conducting state.
  • first auxiliary matching block 42 c and second auxiliary matching block 45 a are connected to both ends of second matching block 40 c , a ⁇ -type circuit is configured.
  • second matching block 40 b is designed so that the combined impedance due to element 1 (impedance Z L (f 3 )), first matching block 2 , and second matching block 40 a is matched to Z 0 .
  • second matching block 40 b is designed in this way, the impedance seen from the second terminal P 2 side of second matching block 40 b (the first terminal P 1 side of second matching block 40 c ) toward element 1 becomes Z 0 .
  • first auxiliary matching block 42 c and second auxiliary matching block 45 a are designed so that Eq. 2 is satisfied at frequency f 3 .
  • the impedance seen from the first terminal P 1 side of second matching block 40 c (the second terminal P 2 side of second matching block 40 b ) toward element 9 also becomes Z 0 .
  • switch element 41 b of L-type block 43 b and second switch element 44 b of shunt circuit block 46 b are chosen to be in a conducting state.
  • first auxiliary matching block 42 b and second auxiliary matching block 45 b are connected to both ends, connected in series, of second matching block 40 c and second matching block 40 b , a ⁇ -type circuit is configured.
  • Second matching block 40 a is designed so that the combined impedance due to element 1 (impedance Z L (f 2 )) and first matching block 2 is matched to Z 0 .
  • second matching block 40 a is designed in this way, the impedance seen from the second terminal P 2 side of second matching block 40 a (the first terminal P 1 side of second matching block 40 b ) toward element 1 becomes Z 0 .
  • first auxiliary matching block 42 b and second auxiliary matching block 45 b are designed so that Eq. 2 is satisfied at frequency f 2 .
  • the impedance seen from the first terminal P 1 side of second matching block 40 b (the second terminal P 2 side of second matching block 40 a ) toward element 9 also becomes Z 0 .
  • switch element 41 a of L-type block 43 a and second switch element 44 c of shunt circuit block 46 c are in a conducting state.
  • first auxiliary matching block 42 a and second auxiliary matching block 45 c are connected to both ends of second matching blocks 40 c to 40 a , a ⁇ -type circuit is configured.
  • First matching block 2 is designed so that impedance Z L (f 1 ) of element 1 is matched to Z 0 . If first matching block 2 is designed in this way, the impedance seen from the second terminal P 2 side of first matching block 2 (the first terminal P 1 side of second matching block 40 a ) toward element 1 becomes Z 0 .
  • first auxiliary matching block 42 a and second auxiliary matching block 45 c are designed so that Eq. 2 is satisfied at frequency f 1 .
  • the impedance seen from the first terminal P 1 side of second matching block 40 a (the second terminal P 2 side of first matching block 2 ) toward element 9 also becomes Z 0 .
  • FIG. 9 expresses the image of N frequency bands.
  • the abscissa axis of FIG. 9 is the frequency and the ordinate axis is the power of transmission.
  • a relation that the frequency becomes lower as N increases is shown as an example.
  • the frequencies are arranged in the order corresponding to shunt circuit blocks 46 a to 46 n .
  • the order of arranging shunt circuit blocks 46 a to 46 n is indifferent.
  • the second matching block is configured with lumped elements connected in series between the conductively connected first switch element and second switch element. Consequently, even if the number of second matching blocks becomes large, it is possible to make the whole circuit remarkably small, compared to the case of a configuration with transmission lines.
  • FIG. 10 there is shown an embodiment of a matching circuit using two T-type circuits.
  • This matching circuit is composed of first matching block 2 , an L-type block part 63 a , an L-type block part 63 b , and a second matching block 60 c .
  • One end of first matching block 2 is connected to a first terminal P 1 at which it is connected to element 1 .
  • the other end of first matching block 2 is connected to one end of a second matching block 60 a inside L-type block part 63 a .
  • second matching block 60 a To the other end of second matching block 60 a , there is connected an auxiliary matching block 62 a via a first switch element 61 a . Moreover, the other end of second matching block 60 a is also connected to one end of a second matching block 60 b inside L-type block part 63 b . To the other end of second matching block 60 b , an auxiliary matching block 62 b is connected via a second switch element 61 b . In addition, the other end of second matching block 60 b is also connected to one end of second matching block 60 c .
  • L-type block part 63 a is composed of second matching block 60 a , first switch element 61 a , and auxiliary matching block 62 a .
  • L-type block part 63 b is composed of second matching block 60 b , second switch element 61 b , and auxiliary matching block 62 b .
  • T-type matching circuits 64 and 65 are composed of two L-type block parts 63 a and 63 b and one second matching block 60 c .
  • T-type matching circuit 64 is composed of second matching blocks 60 a and 60 b , first switch element 61 a , and auxiliary block 62 a .
  • T-type matching circuit 65 is composed of second matching blocks 60 c and 60 b , second switch element 61 b , and auxiliary matching block 62 b . In this way, a matching circuit which matches impedances in three frequency bands is configured in two stages with T-type matching circuits 64 and 65 .
  • switch elements 61 a and 61 b are chosen to be in a non-conducting state.
  • the impedance of element 1 changes with the frequency band.
  • Element 1 with an impedance Z L (f 3 ) is connected, via the serially connected first matching block 2 and second matching blocks 60 a , 60 b , and 60 c , to element 9 which has an impedance of Z 0 .
  • Second matching block 60 b and second matching block 60 c are designed so that the combined impedance with element 1 , first matching block 2 , and second matching block 60 a becomes Z 0 .
  • Second matching block 60 b and second matching block 60 c it is possible to match the impedances at second terminal P 2 of second matching block 60 c.
  • Second matching block 60 a is designed so that the combined impedance with element 1 , having an impedance Z L (f 2 ), and first matching block 2 is taken to be Z 0 .
  • second matching block 60 a is designed so that the impedance seen from point D toward element 1 becomes Z 0 .
  • auxiliary matching block 62 b is designed so that the combined impedance of second matching blocks 60 b and 60 c , auxiliary matching block 62 b , and element 9 becomes Z 0 . If auxiliary matching block 62 b is designed in this way, the impedance seen from point D toward the element 9 side becomes Z 0 .
  • auxiliary matching block 62 b removes the influence of second matching blocks 60 c and 60 b at frequency f 2 .
  • switch element 61 b constituting T-type matching circuit 65 is in a non-conducting state
  • switch element 61 a constituting T-type matching circuit 64 is in a conducting state.
  • First matching block 2 is designed so that the the combined impedance with impedance Z L (f 1 ) of element 1 becomes Z 0 .
  • first matching block 2 is designed in this way, the impedance seen from point A toward element 1 becomes Z 0 .
  • first auxiliary matching block 62 a is designed so that the combined impedance of second matching blocks 60 a , 60 b , and 60 c , auxiliary matching block 62 a , and element 9 becomes Z 0 .
  • first auxiliary matching block 62 a By designing first auxiliary matching block 62 a in this way, the impedance seen from point A toward element 9 becomes Z 0 . Consequently, it is possible to obtain matching of the impedances at point A. Also, on the second terminal P 2 side as well, the impedance seen toward element 1 is Z 0 . Consequently, the combined impedance of second matching blocks 60 a , 60 b , 60 c and auxiliary matching block 62 a does not exert influence any more on the matching conditions. In other words, auxiliary matching block 62 a removes the influence of second matching blocks 60 a , 60 b , 60 c at the frequency f 1 .
  • switch element 61 b is non-conducting. However, it is not mandatory to take switch element 61 b to be non-conducting. In case switch element 61 b is taken to be conducting when the frequency band is f 1 , auxiliary matching block 62 a may be designed with that assumption.
  • FIG. 11 An example showing a generalization of the T-type matching circuit explained in Embodiment 3 is shown in FIG. 11 .
  • the configuration up to the second-stage L-type block 63 b seen from first matching block 2 is identical to that of FIG. 10 .
  • L-type blocks are added on the second terminal P 2 side of second-stage L-type block 63 b .
  • a total of N L-type blocks 63 a to 63 n are connected.
  • N is an integer equal to or greater than 1.
  • the matching circuit shown in FIG. 11 is a subordinate connection configuration of N T-type matching circuits and is capable of matching in N+1 frequency bands. The operation is the same as in FIG. 10 .
  • FIG. 12 Another T-type matching circuit embodiment is shown in FIG. 12 .
  • a T-type circuit was formed using second matching blocks of adjacent L-type blocks.
  • FIG. 12 is an example in which a plurality of auxiliary matching blocks are connected, via switch elements, between two second matching blocks connected in series.
  • This matching circuit is composed of first matching block 2 and T-type matching circuits 83 a , 83 b , and 83 c .
  • T-type matching circuit 83 a is composed of second matching blocks 80 a and 80 b , a switch element 81 a , and an auxiliary matching block 82 a .
  • One end of second matching block 80 a is connected to first matching block 2 .
  • second matching block 80 a is connected to one end of second matching block 80 b .
  • auxiliary matching block 82 a is connected, via switch element 81 a , between second matching block 80 a and second matching block 80 b .
  • second matching blocks 80 a and 80 b , switch element 81 a , and auxiliary matching block 82 a make up a T-type circuit.
  • T-type matching circuit 83 b is composed of second matching blocks 80 c and 80 d , a switching element 81 b , and an auxiliary matching block 82 b .
  • T-type matching circuit 83 c is composed of second matching blocks 80 c and 80 d , a second switching element 84 , and an auxiliary matching block 85 .
  • second matching blocks 80 c and 80 d are constituent parts of both T-type matching circuit 83 b and T-type matching circuit 83 c .
  • auxiliary matching block 82 b is connected, via switch element 81 b , to the connection point of second matching block 80 c and second matching block 80 d .
  • auxiliary matching block 85 is also connected, via second switch element 84 , to the connection point of second matching block 80 c and second matching block 80 d .
  • One end of second matching block 80 c is connected to second matching block 80 b .
  • the other end of second matching block 80 d is connected to the second terminal P 2 to which element 9 is connected.
  • a T-type matching circuit may be connected in multiple stages between element 1 and element 9 .
  • the present embodiment is capable of matching in three frequency bands by means of three T-type matching circuits.
  • switch elements 81 a and 81 b and second switch element 84 are non-conducting.
  • Second matching blocks 80 c and 80 d are designed so that the combined impedance with element 1 (impedance Z L (f 3 )), first matching block 2 , and second matching blocks 80 a , 80 b is made to match the impedance Z 0 of element 9 in the frequency band f 3 . Consequently, impedance matching can be obtained at second terminal P 2 .
  • Second matching blocks 80 a and 80 b are designed so that the combined impedance of element 1 (impedance Z L (f 2 )) and first matching block 2 is made to match the impedance Z 0 of element 9 in the frequency band f 2 . Consequently, the impedance seen from the second terminal P 2 side of second matching block 80 b (the first terminal P 1 side of second matching block 80 c ) toward element 1 becomes Z 0 .
  • auxiliary matching block 82 b is designed so that the combined impedance of second matching blocks 80 c and 80 d , auxiliary matching block 82 b , and element 9 becomes Z 0 at the frequency f 2 .
  • auxiliary matching block 82 b in this way, the impedance seen from the first terminal P 1 side of second matching block 80 c (the second terminal P 2 side of second matching block 80 b ) toward element 9 becomes Z 0 at the frequency f 2 . Consequently, the impedances are matched.
  • First matching block 2 is designed so that the impedance of element 1 (impedance Z L (f 2 )) is made to match the impedance Z 0 of element 9 in the frequency band f 1 . Consequently, the impedance seen from the second terminal P 2 side of first matching block 2 toward element 1 becomes Z 0 .
  • Auxiliary matching block 82 a and 85 are designed so that, in the frequency band f 1 , the combined impedance of second matching blocks 80 a , 80 b , 80 c and 80 d , auxiliary matching block 82 a , and element 9 becomes Z 0 . Consequently, the impedance seen from the second terminal P 2 side of first matching block 2 (the first terminal P 1 side of second matching block 80 a ) toward element 9 becomes Z 0 .
  • the two second matching blocks and the auxiliary matching block only make up a set with respect to one frequency band.
  • a plurality of auxiliary matching blocks becomes necessary.
  • FIG. 13 there is shown a configuration example of a matching circuit using an additional auxiliary matching block.
  • FIG. 13 shows a configuration example where a second switch element 90 and a second auxiliary matching block 91 have been connected in series with auxiliary matching block 82 b of FIG. 12 . Having auxiliary matching blocks connected in series in two stages is done so that second matching blocks 80 c and 80 d constituting T-type matching circuit 83 b can handle two frequency bands.
  • switch element 81 b may be configured with a Single Pole Double Throw (SPDT) switch or a multi-contact switch, and switching may be performed between auxiliary matching blocks with different values.
  • SPDT Single Pole Double Throw
  • the invention is not limited to the T type or the ⁇ type.
  • Second matching block 3 is constituted by an L-type circuit consisting of a series matching block 100 , a switch element 101 for matching, and a matching element 102 .
  • One end of series matching block 100 is connected to first matching block 2 .
  • Matching element 102 is connected to the other end of series matching block 100 via switch element 101 for matching.
  • switch elements 4 and 5 are in a non-conducting state, and only switch element 101 for matching is conducting. At this point, the sum of the impedances of element 1 and first matching block 2 are matched to impedance Z 0 of element 9 by means of series matching block 100 and matching element 102 .
  • switch elements 4 and 5 are made to conduct and switch element 101 for matching is chosen to be non-conducting.
  • matching element 102 it is possible, by the existence of matching element 102 , to broaden the options of second matching block 3 and auxiliary matching block 6 and 7 .
  • second matching block 3 it is possible to increase the freedom in designing second matching block 3 by configuring second matching block 3 with series matching block 100 , first switch element 101 for matching, and matching element 102 .
  • the values of the lumped elements constituting second matching block 3 are discrete, making delicate tuning difficult.
  • Second matching block 3 in FIG. 15 is constituted by a T-type circuit consisting of second matching blocks 60 a and 60 b , a switch element 110 for matching, and a matching element 111 .
  • Second matching block 60 a and second matching block 60 b are connected in series.
  • One end of second matching block 60 a is connected to first matching block 2 .
  • the other end of second matching block 60 b is connected to second terminal P 2 .
  • Matching element 111 is connected, via switch element 110 for matching, to the connection point of second matching block 60 a and second matching block 60 b.
  • Switch element 110 for matching and matching element 111 are provided in order to increase the freedom in designing the second matching blocks and auxiliary matching block 7 and auxiliary matching block 6 .
  • FIG. 16 differs from FIG. 7 in the point that, on the second terminal P 2 side of T-type matching circuit part 30 , there are provided a switch element 120 form matching and a matching element 121 .
  • switch element 33 and switch element 120 for matching are e.g. made to conduct exclusively.
  • Matching element 121 and second matching block 31 and 32 are designed so that the combined impedance with element 1 and first matching block 2 is chosen to be Z 0 .
  • first matching block 2 may also be configured with a plurality of elements.
  • a configuration example thereof is shown in FIG. 17 .
  • first matching block 2 is composed of a first series matching block 130 and an auxiliary matching block 131 connected to one end thereof. Further, auxiliary matching block 131 may be connected to either end of first series matching block 130 .
  • First series matching block 130 is connected to element 9 via matching circuit part 8 .
  • any circuit configuration is acceptable.
  • FIG. 18 is an example applied to an amplifying circuit operating in two frequency bands, the 2 GHz band and the 1 GHz band.
  • an FET 140 which is a power amplifier element
  • the matching circuit shown in FIG. 17 is connected, and on the input side, the matching circuit shown in FIG. 16 is connected.
  • first matching block 2 has become a first matching block 141 .
  • the output side matching circuit has, based on the matching circuit shown in FIG. 16 , first matching block 2 configured with a first matching block 142 .
  • FIG. 19A and FIG. 19B the simulation results for the amplifier in FIG. 18 are shown.
  • FIG. 19A is a diagram showing the frequency characteristics in the case where the circuit has been set for the 2 GHz band.
  • the abscissa axis indicates the frequency and the ordinate axis indicates the S parameter.
  • the reflection S 11 of the signal input into first terminal P 1 gets attenuated abruptly at 2 GHz.
  • the transmission S 21 of the signal input in first terminal P 1 exhibits a value of approximately 14 dB at 2 GHz, so the circuit transmits well.
  • FIG. 19B is a diagram showing the frequency characteristics in the case where the circuit has been set for the 1 GHz band.
  • the reflection S 11 of the signal input into first terminal P 1 gets attenuated abruptly at 1 GHz.
  • the transmission S 21 of the signal input in first terminal P 1 exhibits a value of approximately 19 dB at 1 GHz, so the circuit transmits well. It is seen that the matching circuit according to the present invention functions as a multiband matching circuit.
  • the matching circuit according to the present invention has an impedance seen from both ends of a second matching block, inserted between element 9 and element 1 and formed with lumped-parameter elements, which is made to match the impedance Z 0 by means of an auxiliary matching block. Also, by raising the number of auxiliary matching blocks, a matching circuit handling a plurality of frequency bands is adopted. Further, since the second matching block is formed with lumped elements, it can be made smaller than prior-art matching circuits configured with transmission lines.
  • FIG. 3 and FIG. 5 are diagrams of circuits made capable of matching in two frequency bands together.
  • the matching circuit of the present invention ( FIG. 5 ) requires in total two additional components, one switch element and one auxiliary matching circuit.
  • the delay circuit 172 required in the conventional matching circuit is a large-size component. The size thereof varies with the frequency band and the used power amplification element, but when e.g., the frequency band is taken to be 1 GHz with a certain amplification element, the width is 0.63 mm and the length is 9.22 mm, or the length is 15.32 mm.
  • the matching circuit of the present invention can be configured with a chip circuit commonly known by the name 0603 and having a width of 0.3 mm and a length of 0.6 mm and a Monolithic Microwave Integrated Circuit several mm square.
  • all of the components constituting the matching circuit of the present invention end up amply fitting into the space of delay circuit 172 .
  • the number of delay circuits 172 must be increased. Consequently, as a matching circuit for multiband use, the matching circuit of the present invention can be further reduced in size, compared to a conventional matching circuit.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Amplifiers (AREA)
  • Microwave Amplifiers (AREA)
  • Transmitters (AREA)
US11/434,889 2005-05-20 2006-05-17 Matching circuit Abandoned US20060261911A1 (en)

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US12/405,891 US7750757B2 (en) 2005-05-20 2009-03-17 Matching circuit

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JP2005148621A JP4838536B2 (ja) 2005-05-20 2005-05-20 整合回路

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US20070115065A1 (en) * 2005-11-24 2007-05-24 Ntt Docomo, Inc. Stabilization circuit and multiband amplification circuit
US20080150630A1 (en) * 2006-12-20 2008-06-26 Ntt Docomo, Inc. Matching circuit and dual-band power amplifier
US20080278260A1 (en) * 2007-05-10 2008-11-13 Ntt Docomo, Inc Matching circuit
US20090121961A1 (en) * 2007-08-29 2009-05-14 Panasonic Corporation Dual-frequency matching circuit
US20090121960A1 (en) * 2007-08-29 2009-05-14 Panasonic Corporation Dual-frequency matching circuit
US20090128251A1 (en) * 2007-04-09 2009-05-21 Panasonic Corporation Dual-frequency matching circuit
US7570131B2 (en) 2007-04-09 2009-08-04 Panasonic Corporation Dual-frequency matching circuit
US20090195328A1 (en) * 2007-07-20 2009-08-06 Advantest Corporation Delay line, signal delay method, and test signal generating apparatus
US20100079211A1 (en) * 2008-09-30 2010-04-01 Panasonic Corporation Matching circuit, and radio-frequency power amplifier and mobile phone including the same
US20100194487A1 (en) * 2009-01-30 2010-08-05 Ntt Docomo, Inc. Multiband matching circuit and multiband power amplifier
US20100194491A1 (en) * 2009-01-30 2010-08-05 Ntt Docomo, Inc. Multiband matching circuit and multiband power amplifier
US20120051409A1 (en) * 2010-09-01 2012-03-01 Samsung Electronics Co., Ltd. Apparatus and method for controlling a tunable matching network in a wireless network
US8970319B2 (en) 2011-01-07 2015-03-03 Ntt Docomo, Inc. Variable matching circuit
US9130522B2 (en) 2011-01-31 2015-09-08 Fujitsu Limited Matching device, transmitting amplifier, and wireless communication device
US20170026010A1 (en) * 2015-07-02 2017-01-26 Murata Manufacturing Co., Ltd. Amplification circuit
CN109659693A (zh) * 2018-12-12 2019-04-19 维沃移动通信有限公司 一种天线结构及通信终端

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US7508269B2 (en) 2005-11-24 2009-03-24 Ntt Docomo, Inc. Stabilization circuit and multiband amplification circuit
US20070115065A1 (en) * 2005-11-24 2007-05-24 Ntt Docomo, Inc. Stabilization circuit and multiband amplification circuit
US20080150630A1 (en) * 2006-12-20 2008-06-26 Ntt Docomo, Inc. Matching circuit and dual-band power amplifier
US7710217B2 (en) 2006-12-20 2010-05-04 Ntt Docomo, Inc. Matching circuit and dual-band power amplifier
US7570131B2 (en) 2007-04-09 2009-08-04 Panasonic Corporation Dual-frequency matching circuit
US20090128251A1 (en) * 2007-04-09 2009-05-21 Panasonic Corporation Dual-frequency matching circuit
US7564321B2 (en) 2007-04-09 2009-07-21 Panasonic Corporation Dual-frequency matching circuit
US20080278260A1 (en) * 2007-05-10 2008-11-13 Ntt Docomo, Inc Matching circuit
US7656249B2 (en) 2007-05-10 2010-02-02 Ntt Docomo, Inc. Matching circuit
US20090195328A1 (en) * 2007-07-20 2009-08-06 Advantest Corporation Delay line, signal delay method, and test signal generating apparatus
US7573352B2 (en) 2007-08-29 2009-08-11 Panasonic Corporation Dual-frequency matching circuit
US20090189710A1 (en) * 2007-08-29 2009-07-30 Panasonic Corporation Dual-frequency matching circuit
US7567144B2 (en) 2007-08-29 2009-07-28 Panasonic Corporation Dual-frequency matching circuit
US20090195326A1 (en) * 2007-08-29 2009-08-06 Panasonic Corporation Dual-frequency matching circuit
US7564322B1 (en) 2007-08-29 2009-07-21 Panasonic Corporation Dual-frequency matching circuit
US7573351B1 (en) 2007-08-29 2009-08-11 Panasonic Corporation Dual-frequency matching circuit
US20090128441A1 (en) * 2007-08-29 2009-05-21 Panasonic Corporation Dual-frequency matching circuit
US7579924B2 (en) 2007-08-29 2009-08-25 Panasonic Corporation Dual-frequency matching circuit
US7639099B2 (en) 2007-08-29 2009-12-29 Panasonic Corporation Dual-frequency matching circuit
US20090121960A1 (en) * 2007-08-29 2009-05-14 Panasonic Corporation Dual-frequency matching circuit
US20090121961A1 (en) * 2007-08-29 2009-05-14 Panasonic Corporation Dual-frequency matching circuit
US20100079211A1 (en) * 2008-09-30 2010-04-01 Panasonic Corporation Matching circuit, and radio-frequency power amplifier and mobile phone including the same
US20100194491A1 (en) * 2009-01-30 2010-08-05 Ntt Docomo, Inc. Multiband matching circuit and multiband power amplifier
US20100194487A1 (en) * 2009-01-30 2010-08-05 Ntt Docomo, Inc. Multiband matching circuit and multiband power amplifier
US8368483B2 (en) 2009-01-30 2013-02-05 Ntt Docomo, Inc. Multiband matching circuit and multiband power amplifier
US8487713B2 (en) 2009-01-30 2013-07-16 Ntt Docomo, Inc. Multiband matching circuit and multiband power amplifier
US20120051409A1 (en) * 2010-09-01 2012-03-01 Samsung Electronics Co., Ltd. Apparatus and method for controlling a tunable matching network in a wireless network
US8712348B2 (en) * 2010-09-01 2014-04-29 Samsung Electronics Co., Ltd. Apparatus and method for controlling a tunable matching network in a wireless network
US8970319B2 (en) 2011-01-07 2015-03-03 Ntt Docomo, Inc. Variable matching circuit
US9130522B2 (en) 2011-01-31 2015-09-08 Fujitsu Limited Matching device, transmitting amplifier, and wireless communication device
US20170026010A1 (en) * 2015-07-02 2017-01-26 Murata Manufacturing Co., Ltd. Amplification circuit
US9722548B2 (en) * 2015-07-02 2017-08-01 Murata Manufacturing Co., Ltd. Amplification circuit
CN109659693A (zh) * 2018-12-12 2019-04-19 维沃移动通信有限公司 一种天线结构及通信终端
WO2020119368A1 (zh) * 2018-12-12 2020-06-18 维沃移动通信有限公司 天线结构及通信终端
US11870413B2 (en) 2018-12-12 2024-01-09 Vivo Mobile Communication Co., Ltd. Antenna structure and communications terminal

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CN100527611C (zh) 2009-08-12
EP1724936A3 (en) 2007-03-21
US20090179711A1 (en) 2009-07-16
KR100748040B1 (ko) 2007-08-09
US20090167458A1 (en) 2009-07-02
EP1724936A2 (en) 2006-11-22
KR20060120449A (ko) 2006-11-27
JP2006325153A (ja) 2006-11-30
US7750756B2 (en) 2010-07-06
JP4838536B2 (ja) 2011-12-14
US7750757B2 (en) 2010-07-06
CN1866735A (zh) 2006-11-22

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