TWM653437U - Connector hot plug structure - Google Patents

Abstract

The invention relates to a hot-swap structure of a connector. When a plug-in device is inserted into a fast peripheral component interconnection interface, a plug-in detection module is used to detect the plug-in action, and an identification module reads the electrical signal when the plug-in device is inserted, so as to provide a comparison module with the positive and negative source trigger information of a chip database for comparison. If the comparison is consistent, a control signal containing delay time length information is issued by the authority control module. If the comparison is inconsistent, a control signal containing delay time length information is issued by the general control unit. Generate a universal signal containing universal delay time information, so that the chip reset module sends a reset request to the control system according to the control signal or universal signal, so as to upgrade the lower-level plug-in and pull-out action authority of the plug-in device to the upper-level hot-swap request of the connector processing chip, and the control system selects a hot-swap control module that meets the plug-in device specifications to realize plug-and-play of the plug-in device on the USB4 or Thunderbolt connector.

Description

Hot-swappable structure of connector

The present invention provides a hot-swap structure of a connector that uses hardware or firmware design to reset the connector processing chip, thereby increasing the authority of the plug-in and pull-out action, thereby achieving hot-swap effect on the peripheral component interconnect express interface (PCIe).

Universal Serial Bus 4 (USB4) and Thunderbolt are becoming more and more popular in the current host platform market. Thunderbolt and USB4 are different from previous USB protocol standards. Thunderbolt and USB4 require the support of USB-C connector and USB PD for power supply. Compared with USB3.2, it allows the establishment of DisplayPort and PCIe tunnels. This architecture defines a method of dynamically sharing a single high-speed link with multiple terminal device types. It supports 40Gbit/s or above, and the transmission rate is higher than USB3.2. Thunderbolt is a connector standard designed by Intel and Apple. It is intended to be used as a universal bus between computers and other devices. It has a minimum PCIe speed requirement of 32Gbit/s or higher, supports two 4K displays (DisplayPort 1.4), and supports Intel VT-d as the basic direct memory access protection (cited from Wikipedia USB4 and Thunderbolt).

However, when using the above-mentioned USB4 or Thunderbolt, there are the following problems and deficiencies that need to be improved:

First, the system that manages PCIe device support limits the hot-swap capabilities of PCIe storage media to USB4 and Thunderbolt, so that USB4 and Thunderbolt connections must restart the entire system to reset the power supply to USB4 and Thunderbolt devices.

Second, currently, hot-swapping of PCIe is achieved by providing a delay time for startup or resetting the power of the device's main IC. However, due to the high transmission rate of PCIe, the detection of the connector plugging and unplugging action does not have time to perform a second delay time or reset the power (Retry impossible). Therefore, once a failure occurs, the power must be restarted or the connector plugging and unplugging action must be re-executed. In particular, the plugging and unplugging communication of PCIe is unstable, so hot-swapping cannot be 100% successful.

Third, due to the habit of multitasking, the system often needs to be designed with multiple ports. When any of these ports is in working state, it is impossible to reset any of the ports.

Therefore, how to solve the above-mentioned problems and deficiencies in usage is the direction that the applicant of this new model and the relevant manufacturers engaged in this industry are eager to study and improve.

Therefore, in view of the above-mentioned deficiencies, the applicant of this new type has collected relevant information, evaluated and considered various aspects, and based on many years of experience in this industry, after continuous trials and modifications, has finally designed a new patent for a hot-swap structure of a connector that uses hardware or firmware design to reset the connector processing chip, thereby improving the authority of the plug-in and unplug action, so that it can achieve hot-swap function on the peripheral component interconnect express interface (PCIe).

The main purpose of this new model is to use the design of the authority control module to upgrade the authority of the lower-level plug-in and pull-out action of the plug-in device to the upper-level hot-plug request of the connector processing chip, and cooperate with the design of a single connection port (high-speed transmission interface) to improve the stability of the fast peripheral component interconnect interface in processing hot-plug requests.

The main purpose of this new model is to utilize the design of the universal control unit, chip database and hot-swap control module to achieve the best reset time for the connector processing chip and make the hot-swap action 100% successful.

To achieve the above-mentioned purpose, the connector of the present invention is used to connect a high-speed transmission interface. The connector is provided with a fast peripheral component interconnect interface (Peripheral Component Interconnect Express, PCIe) connected to its information, and generates an electrical signal when connected to a plug-in device. The hot-swap structure mainly includes: a chip database, a plug-in detection module, an identification module, a comparison module, a permission control module, a general control unit, a chip reset module, and a plurality of hot-swap control modules. The chip database is arranged on one side of the high-speed transmission interface, and the plug-in detection module is arranged on one side of the high-speed transmission interface and is used to detect the plug-in device and the fast peripheral. The plug-in and unplug action of the component interconnection interface, the identification module is electrically connected to the plug-in detection module and the chip database, the comparison module is arranged in the identification module, the authority control module is arranged in the connector and electrically connected to the comparison module and the chip database, the general control unit is arranged in the authority control module, the chip reset module is arranged on one side of the authority control module and is informationally connected to a control system, and the hot-swap control modules are arranged on one side of the high-speed transmission interface and are informationally connected to the chip reset module.

When the user inserts the plug-in device into the high-speed transmission interface, the plug-in detection module detects the plug-in action and generates an insertion signal. After the identification module receives the insertion signal, it reads the electrical signal generated when the plug-in device is inserted, so that the comparison module can compare the electrical signal with the positive and negative source trigger information in the chip database. If the comparison is consistent, the authority control module will send a control signal containing the delay time length information corresponding to the specification of the plug-in device. If the comparison is inconsistent, If the general control unit generates a general signal containing general delay time information, the chip reset module sends a reset request to the control system according to the control signal or the general signal, so as to upgrade the lower-level plug-in and pull-out action authority of the plug-in device to the upper-level hot-plug request of the connector processing chip, and the control system selects a hot-plug control module that meets the plug-in device specifications to realize plug-and-play of the plug-in device on the USB4 or Thunderbolt connector.

The above technology can overcome the problem of USB4 or Thunderbolt not supporting hot-plugging and the problem of PCIe hot-plugging not being 100% successful, thus achieving the practical progress of the above advantages.

1: Connector

11: Rapid peripheral component interconnection interface

2: Control system

21: High-speed transmission interface

211: Plug and unplug detection module

3: Chip database

31: Positive and negative source trigger information

32: Delay time length information

33: General delay time information

4: Identification module

41: Comparison module

5: Permission control module

51: General Control Department

6: Chip reset module

61: Reset request

7: Hot-swap control module

8: Power control module

9: Plug and unplug device

The first figure is a three-dimensional perspective view of the preferred embodiment of the new invention.

The second figure is a structural block diagram of the preferred embodiment of the new invention.

The third figure is the action block flow chart (I) of the preferred embodiment of the new invention.

Figure 4 is the action block flow chart (II) of the preferred embodiment of the new invention.

Figure 5 is the action block flow chart (III) of the preferred embodiment of the new invention.

Figure 6 is a three-dimensional diagram of another preferred embodiment of the present invention.

Figure 7 is a schematic diagram of another preferred embodiment of the new model (I).

Figure 8 is a schematic diagram of another preferred embodiment of the present invention (II).

Figure 9 is a structural block diagram of another preferred embodiment of the present invention.

Figure 10 is a circuit diagram of another preferred embodiment of the present invention.

In order to achieve the above-mentioned purpose and effect, the technical means and structure adopted by this new model are described in detail in the following figure for the better implementation example of this new model, and its features and functions are explained in detail for a complete understanding.

Please refer to the first to fifth figures, which are three-dimensional perspective views of the preferred embodiments of the present invention. From the figure to the action block flow chart (three), it can be clearly seen that the connector 1 of the present invention is used to connect a high-speed transmission interface 21. The connector 1 is provided with a fast peripheral component interconnect interface 11 (Peripheral Component Interconnect Express, PCIe) connected to its information, and generates an electrical signal when connecting a plug-in device 9. The hot-swap structure mainly includes:

A chip database 3 is provided on one side of the high-speed transmission interface 21 and is used to store positive and negative source trigger information 31, delay time length information 32, and universal delay time information 33 corresponding to the specifications of the plug-in device 9;

A plug-in detection module 211 is disposed on one side of the high-speed transmission interface 21 and is used to detect the plug-in action between the plug-in device 9 and the fast peripheral component interconnection interface 11 to generate an insertion signal;

An identification module 4 is electrically connected to the plug-in detection module 211 and the chip database 3, and reads the electrical signal when receiving the insertion signal;

A comparison module 41 is disposed in the identification module 4 and compares the electrical signal with the positive and negative source trigger information 31;

An authority control module 5 is disposed in the connector 1 and electrically connected to the comparison module 41 and the chip database 3, and generates a control signal having the insertion signal and the delay time length information 32 when the comparison result of the comparison module 41 matches;

A general control unit 51 is provided in the permission control module 5, and generates a general signal having the insertion signal and the general delay time information 33 when the comparison result of the comparison module 41 does not match;

A chip reset module 6 is disposed on one side of the authority control module 5 and is informationally connected to a control system 2, and upon receiving the control signal or the universal signal, sends a reset request 61 having the control signal or the universal signal to the control system 2; and

The plurality of hot-swap control modules 7 are arranged on one side of the high-speed transmission interface 21 and are informationally connected to the chip reset module 6. The control system 2 selects a hot-swap control module 7 to be connected to the high-speed transmission interface 21 according to the reset request 61.

The connector 1 complies with the specification of USB4 or Thunderbolt; the high-speed transmission interface 21 is a socket corresponding to the connector 1 and is the only connection port on the control system 2 side that can be converted to the fast peripheral component interconnection interface 11; the chip database 3 is a storage interface such as a memory or a hard disk; the plug-in detection module 211 is a mechanical structure such as a snap spring or a detection terminal of the plug-in device 9. The detection is performed by means of circuit design such as sub-modules; the identification module 4, the comparison module 41, the authority control module 5, the general control unit 51, and the chip reset module 6 are electronic components such as processors and transistors on the circuit board. The circuit board can be integrated with the fast peripheral component interconnect interface 11, or integrated with the circuit board in the connector 1. This embodiment takes the former as an example; the hot-swap control module 7 is a block circuit on the circuit board; the plug-in device 9 is a solid state drive (SSD). However, the corresponding types of the above components are only examples of the preferred embodiments. All types with the same functions belong to the scope of the present invention and are not limited to the above examples.

Through the above description, the structure of this technology can be understood. According to the corresponding coordination of this structure, the connector 1 processing chip can be reset by hardware or firmware design, so as to improve the authority of plug-in and unplug action, so as to realize the advantage of hot-plug effect on the peripheral component interconnect express interface 11 (PCIe).

First, it can be clearly seen from the figure that the high-speed transmission interface 21 is a socket that complies with USB4 or Thunderbolt technology, and these two are compatible with USB3, DisplayPort and PCIe tunnels, so it can be used to connect flash drives, external hard drives, card readers, and even external display cards. Even if the high-speed transmission interface 21 is a single connection port on one side of the control system 2, it is sufficient to meet various external needs of users, and the high-speed transmission interface 21 as the only connection port of the control system 2 naturally has a high processing authority, so that the request from the high-speed transmission interface 21 has a more stable communication and is less susceptible to interference.

Secondly, in order to upgrade the lower-level plug-in and pull-out action authority of the plug-in device 9 to the upper-level hot-plug request of the processor chip of the connector 1, it is necessary to allow the high-speed transmission interface 21 to more completely collect the information of the plug-in device 9, that is, including the generally known specifications, norms, standards, details, detailed descriptions, etc. (i.e. Specification, or commonly known as spec), and for the purpose of hot plugging, it is necessary to further know the length of time required to reset the processor chip of the connector 1 so that it can reset the power supply (including voltage, current, and power parameters). Since the specifications of the plug-in devices 9 on the market are similar, the above information can be obtained through prior research and development tests and recorded in the chip database 3. When a known plug-in device 9 is inserted, the above processing authority and the action of complete information collection can be combined to successfully insert the plug-in device 9 100%.

In actual use, when the plug-in device 9 is inserted into the fast peripheral component interconnect interface 11, the plug-in detection module 211 generates an insertion signal by detecting the plug-in action through the connector 1, and after the identification module 4 receives the insertion signal, it reads the electrical signal generated when the plug-in device 9 is inserted, so that the comparison module 41 can compare the electrical signal with the positive and negative source triggers in the chip database 3. The information 31 is compared to identify whether the specification of the plug-in device 9 is known. Since the fast peripheral component interconnect interface 11 can only receive signals and cannot send signals or feedback signals, the slight difference between the positive and negative sources of each plug-in device 9 is used to distinguish and identify the information 31, such as the voltage value of 1.05V or 1.92V.

If the comparison result of the comparison module 41 is consistent, the authority control module 5 will send a control signal including an insertion signal and a delay time length information 32 corresponding to the specification of the plug-in device 9. When the chip reset module 6 receives the control signal, it can send a reset request 61 to the control system 2 according to the control signal, so that the lower plug-in and pull-out action authority of the plug-in device 9 can be upgraded to the upper hot plug request of the processing chip of the connector 1; but if the comparison result is inconsistent, the general control unit will 51 reads the universal delay time information 33 in the chip database 3 to generate a universal signal including the universal insertion signal and the universal delay time information 33, so that the chip reset module 6 sends a reset request 61 to the control system 2 according to the universal signal, which can also achieve the effect of enhancing the authority. Finally, the control system 2 selects the hot-swap control module 7 that meets the specifications of the plug-in device 9 to realize the plug-and-play of the plug-in device 9 on the USB4 or Thunderbolt connector 1.

The difference between the control signal and the general signal is that the delay time length information 32 of the control signal is a pre-set time length for a known plug-in device 9, which can complete the action more quickly, and when the control system 2 selects the hot-swap control module 7, it can also select a dedicated or appropriate hot-swap control module 7 based on the complete information in the chip database 3, and complete the hot-swap action more accurately, efficiently and safely. As for the universal signal, since the inserted plug-in device 9 is not in the chip database 3, it can only be tried one by one among the multiple hot-swap control modules 7. At this time, because of the design of the aforementioned single high-speed transmission interface 21, when trying to reset the processing chip of the connector 1 with different information, there is no need to consider whether other connection ports are in use, and this attempt is processed at the level of the high-speed transmission interface 21 and has not yet been uploaded to the level of the control system 2. Therefore, it is not subject to the limitations of PCIe high-speed computing and the inability to attempt to reset the power supply. In other words, as long as a set of universal delay time information 33 is stored in the chip database 3, sufficient time can be given so that all processing chips can complete the hot-swap action. In this embodiment, the delay time length information 32 is 0 milliseconds (ms) to 500 milliseconds (ms), and the general delay time information 33 is 1 second to 2 seconds.

Please refer to the sixth figure at the same time, which is a three-dimensional diagram of another preferred embodiment of the new model. It can be clearly seen from the figure that this embodiment is similar to the above embodiment. The plug-in device 9 of this embodiment is an M.2 SSD memory card. M.2 is the electrical interface specification of the appearance size and pins of the internal expansion card and related connectors of the computer. It adopts a new physical layout and connector. The theoretical transmission rate can reach more than 40Gbit/s, and its fast peripheral component interconnection interface 11 is an external box type converted through a USB4 or Thunderbolt connector 1. This shows that the new model also supports hot plugging of M.2 SSD memory cards.

Please refer to FIG. 7 and FIG. 8 at the same time, which are schematic diagrams (I) and (II) of another preferred embodiment of the present invention. It can be clearly seen from the figures that the present embodiment is similar to the above-mentioned embodiment. The plug-in device 9 of the present embodiment is a memory card, and the connector 1 and the fast peripheral component interconnection interface 11 are integrated into one body, and are in accordance with the compact flash memory card (Compact Flash Express, CFExpress) specification memory card holder, the high-speed transmission interface can be regarded as the terminal of the memory card holder, the memory card holder is combined with small and medium-sized mobile devices such as laptops, digital cameras, TV boxes, etc., so it can be explained that the hot-swappable structure of the present invention has a wide range of applications. In addition, a power control module 8 is provided on one side of the control system 2, which reduces the power supply to the connector 1 when the plug detection module 211 generates a pull-out signal. For example, the power of the connector 1 in the working state is 2.5w. When the plug device 9 is unplugged, its power is reduced to less than 0.05w, so that the connector 1 can get a full rest in the non-working state, and the equipment where it is located can also save more power.

Please refer to FIG. 9 and FIG. 10 at the same time, which are structural block diagrams and circuit diagrams of another preferred embodiment of the present invention. It can be clearly seen from the figure that the present embodiment is similar to the above-mentioned embodiment. The hot-swap structure of the present embodiment is in a circuit board integrated with the control system 2, wherein the authority control module 5, the general control unit 51, and the chip reset module 6 are arranged on the connector 1, and the connector 1 is also integrated with the fast peripheral component interconnection interface 11, and the connector 1 itself, and the remaining chip database 3, plug detection module 211, identification module 4, comparison module 41, hot plug control module 7, power control module 8, and high-speed transmission interface 21 are all arranged on the circuit board where the control system 2 is located, which can further reduce the size and manufacturing cost of the connector 1. In addition, the circuit board where the control system 2 is located is originally larger than the circuit board in the connector 1, so more sets of hot plug control modules 7 can be configured to adapt to more plug devices of different specifications.

However, the above is only the preferred embodiment of the present invention, and does not limit the patent scope of the present invention. Therefore, all simple modifications and equivalent structural changes made by using the contents of the description and drawings of the present invention should be included in the patent scope of the present invention and should be stated.

In summary, the hot-swap structure of the connector of this new type can truly achieve its effect and purpose when used. Therefore, this new type is truly a new type with excellent practicality. In order to meet the application requirements of new patents, we have filed an application in accordance with the law. We hope that the review committee will approve this new type as soon as possible to protect the applicant's hard work. If the review committee of the Jun Bureau has any doubts, please feel free to write to us for instructions. The applicant will do his best to cooperate and feel very grateful.

1: Connector

11: Rapid peripheral component interconnection interface

2: Control system

21: High-speed transmission interface

211: Plug and unplug detection module

3: Chip database

4: Identification module

41: Comparison module

5: Permission control module

51: General Control Department

6: Chip reset module

7: Hot-swap control module

Claims (7)

A hot-swap structure of a connector, the connector is used to connect a high-speed transmission interface, the connector is provided with a fast peripheral component interconnect interface (Peripheral Component Interconnect Express, PCIe) connected to its information, and generates an electrical signal when connecting a plug-in device, and the hot-swap structure mainly includes: A chip database is provided on one side of the high-speed transmission interface and is used to store the positive and negative source trigger information, delay time length information, and universal delay time information corresponding to the specification of the plug-in device; a plug-in detection module is provided on one side of the high-speed transmission interface and is used to detect the plug-in action between the plug-in device and the fast peripheral component interconnection interface to generate an insertion signal; An identification module is electrically connected to the plug-in detection module and the chip database, and reads the electrical signal when receiving the insertion signal; A comparison module is disposed in the identification module and compares the electrical signal with the positive and negative source trigger information; An authority control module is disposed in the connector and electrically connected to the comparison module and the chip database, and generates a control signal having the insertion signal and the delay time length information when the comparison result of the comparison module matches; A general control unit is provided in the permission control module, and generates a general signal having the insertion signal and the general delay time information when the comparison result of the comparison module does not match; A chip reset module is disposed on one side of the authority control module and is informationally connected to a control system, and upon receiving the control signal or the universal signal, sends a reset request with the control signal or the universal signal to the control system; and A plurality of hot-swap control modules are disposed on one side of the high-speed transmission interface and are informationally connected to the chip reset module. The control system selects one of the hot-swap control modules to be connected to the high-speed transmission interface according to the reset request. As described in the first item of the patent application, the hot-swap structure of the connector, wherein a power control module is provided on one side of the control system, and when the plug-in detection module generates a pull-out signal, the power supply to the high-speed transmission interface is reduced. A hot-swap structure of a connector as described in Item 1 of the patent application, wherein the plug-in device is a solid state drive (SSD). A hot-swap structure of a connector as described in Item 1 of the patent application, wherein the plug-in device is a memory card, and the connector is integrated with the fast peripheral component interconnect interface and complies with the memory card socket of the Compact Flash Express (CFExpress) specification. A hot-swap structure of a connector as described in Item 1 of the patent application, wherein the hot-swap structure is one of a circuit board of the control system or an external box connected to the connector. A hot-swap structure of a connector as described in Item 1 of the patent application, wherein the connector complies with the specifications of USB4 or Thunderbolt. A hot-swap structure of a connector as described in Item 1 of the patent application, wherein the delay time length information is 0 milliseconds (ms) to 500 milliseconds (ms), and the universal delay time information is 1 second to 2 seconds.

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