TWI865082B - Power supply having adaptive voltage compensation loop and related system - Google Patents

Abstract

A power supply includes a rectifying circuit, a flyback conversion circuit, a voltage detecting circuit, a voltage stabilization and feedback compensation circuit, and a control circuit. The rectifying circuit and the flyback conversion circuit convert an AC voltage into an output voltage for driving a load. The voltage detecting circuit provides feedback current and feedback voltage associated with the status of the output voltage. The voltage stabilization and feedback compensation circuit provides an adaptive voltage compensation loop for storing energy of the feedback current, thereby supplying the feedback voltage. The control circuit controls the operation of the voltage stabilization and feedback compensation circuit based on the operation mode of the load for providing the corresponding adaptive voltage compensation loop and controls the operation of the flyback conversion circuit according to the feedback voltage.

Description

Power supply with adaptive voltage regulation and compensation circuit and related power system

The present invention relates to a power supply and a related power supply system, and in particular to a power supply with an adaptive voltage-stabilizing compensation circuit and a related power supply system.

Different components in a computer system require different operating voltages, so power supplies are commonly used to convert AC indoor power into DC power to drive different components through transformation, rectification and filtering. With the rise of environmental awareness, countries have energy-saving specifications for consumer electronic products, office equipment, home appliances and external power supplies. For example, the US Energy Star is a certification program jointly sponsored by the US Department of Energy and the Environmental Protection Agency. It has clear definitions and energy-saving specification requirements for power supplies with different rated output power in various states and under different load operations.

In order to cope with increasingly stringent energy-saving specifications, power supplies are usually designed with a voltage-regulated feedback compensation architecture to reduce power consumption. The traditional flyback architecture of power supplies is simple in design but has poor dynamic response, that is, when the system at the receiving end operates under severe dynamic loads, the output end of the power supply will be unstable, resulting in insufficient output voltage energy and no voltage output. Therefore, a power supply with an adaptive voltage-regulated compensation loop is needed.

The present invention provides a power supply with an adaptive voltage-stabilizing compensation circuit, which is used to provide an output voltage to supply power to a power receiving device, and includes a rectifier circuit, a flyback converter circuit, a voltage detection circuit, a voltage-stabilizing feedback compensation circuit and a control circuit. The rectifier circuit is used to convert an AC voltage supplied by a city power supply into a DC input voltage. The flyback converter circuit is used to convert the DC input voltage into the output voltage. The voltage detection circuit is used to provide a feedback current and a feedback voltage related to the output voltage. The voltage-regulated feedback compensation circuit is used to adaptively provide a voltage-regulated feedback compensation loop to store energy related to the feedback current, thereby supplying the feedback voltage. The control circuit is used to determine a current operation mode of the power receiving device according to a communication signal provided by the power receiving device; when it is determined according to the communication signal that the power receiving device is operating in a first mode, the voltage regulation feedback compensation circuit is controlled to provide the voltage regulation feedback compensation circuit with a first feedback capacitance value, thereby causing the voltage detection circuit to provide the feedback voltage with a first value; when it is determined according to the communication signal that the power receiving device is operating in a second mode, the voltage regulation feedback compensation circuit is controlled to provide the voltage regulation feedback compensation circuit with a second feedback capacitance value. The invention relates to a flyback converter circuit comprising a first control signal which is periodically switched between a first enable potential and a first disable potential in a first duty cycle to control the operation of the flyback converter circuit; and a first control signal which is periodically switched between the first enable potential and the first disable potential in a second duty cycle to control the operation of the flyback converter circuit. Wherein, when the power receiving device operates in the first mode, a first real-time output load of the power supply is less than a second real-time output load of the power supply when the power receiving device operates in the second mode, the first feedback capacitance value is less than the second feedback capacitance value, the first value is less than the second value, and the first duty cycle is less than the second duty cycle.

10: Rectifier circuit

20: Flyback converter circuit

30: Voltage detection circuit

32: LED

34: Photosensitive transistor

40: Voltage regulation feedback compensation circuit

50: Control circuit

60: Transmission interface

100: Power supply

200: Power receiving device

300: Power supply system

JACK1, PLUG1, JACK2: connector

Vbus: power supply pin

GND: ground pin

CM: Communication potential

EC: Embedded Controller

TR: Transformer

NP: Primary side winding set and number of turns

NS: Secondary winding and number of turns

GND1, GND2: ground potential

Q1: Power switch

Q2-Q4: Auxiliary switch

PC: Linear optocoupler

R1, R2: resistors

TL: Voltage regulator

A: Anode end of the voltage regulator

K: cathode end of the voltage regulator

R: Reference terminal of the voltage regulator

CO: Energy storage capacitor

CC: Compensation capacitor

CB: Feedback capacitor

CR1, CR2: Auxiliary capacitors

DO: output diode

D1-D4: diodes

LM: Magnetizing inductance

LR: Auxiliary inductor

V _IN : DC input voltage

V _OUT : Output voltage

V _AC : Alternating current voltage

V _FB : Feedback voltage

V _REF : Reference voltage

I _C : Compensation Current

I _FB : Feedback current

I _LR : Inductor current

GD1-GD4: control signal

S _CM : Communication Signal

P1-P6: Foot position

Figure 1 is a functional block diagram of a power supply system in an embodiment of the present invention.

Figure 2 is a schematic diagram of the implementation of the power supply in the power supply system of the embodiment of the present invention.

Figure 3 is a schematic diagram of the implementation of the power supply in the power supply system of another embodiment of the present invention.

Figure 4A is a schematic diagram of power supply related signals when the power receiving device operates in normal mode in an embodiment of the present invention.

Figure 4B is a schematic diagram of power supply related signals when the power receiving device operates in a severe dynamic load mode in an embodiment of the present invention.

Figure 4C is a schematic diagram of power supply related signals when the power receiving device operates in power saving mode in an embodiment of the present invention.

Figure 5A is an equivalent circuit diagram of the voltage regulation feedback compensation circuit in the embodiment of the present invention when the power receiving device operates in normal mode.

Figure 5B is an equivalent circuit diagram of the voltage regulation feedback compensation circuit in an embodiment of the present invention when the power receiving device operates under a severe dynamic load mode.

Figure 5C is an equivalent circuit diagram of the voltage regulation feedback compensation circuit in an embodiment of the present invention when the power receiving device operates in power saving mode.

FIG. 1 is a functional block diagram of a power supply system 300 in an embodiment of the present invention. The power supply system 300 includes a power supply 100 and a power receiving device 200. The power supply 100 includes a connector JACK1, a connector PLUG1, a rectifier circuit 10, a flyback conversion circuit 20, a voltage detection circuit 30, a voltage regulation feedback compensation circuit 40, and a control circuit 50. The power receiving device 200 includes a connector JACK2 and an embedded controller EC.

The power supply 100 can be connected to the mains through the connector JACK1 located at its input end, and can be connected to the connector JACK2 of the power receiving device 200 through the connector PLUG1 located at its output end. The connector PLUG1 of the power supply 100 can be connected to the connector JACK2 of the power receiving device 200 through a transmission interface 60. In one embodiment, the connector PLUG1 of the power supply 100 and the connector JACK2 of the power receiving device 200 can transmit signals through corresponding power supply pins Vbus, ground pins GND, and communication pins CM. In one embodiment, the transmission interface 60 can be a USB Type-C interface, but is not limited thereto.

The power supply 100 can convert the AC voltage V _AC supplied by the city power supply into an output voltage V _OUT to supply the power required for the operation of the power receiving device 200. The power receiving device 200 can receive the power or instructions provided by the power supply 100 through the connector JACK2 located at its input end, and the embedded controller EC can provide a communication signal S _CM related to the current operation mode of the power receiving device 200.

FIG. 2 and FIG. 3 are schematic diagrams of the implementation of the power supply 100 in the power supply system 300 in the embodiment of the present invention. In the embodiment of the present invention, the rectifier circuit 10 of the power supply 100 can be a bridge rectifier, which includes rectifier diodes D1-D4, and is used to convert the AC voltage V _AC supplied by the mains into a DC input voltage V _IN . However, the implementation of the rectifier circuit 10 does not limit the scope of the present invention.

In the embodiment shown in FIG. 2 and FIG. 3 , the flyback converter circuit 20 includes a transformer TR, a power switch Q1, an excitation inductor LM, an energy storage capacitor CO, and an output diode DO. The flyback converter circuit 20 can receive an input voltage V _IN at its input end, convert the input voltage V _IN into an output voltage V _OUT , and supply power to a connector JACK2 of a power receiving device 200 through a connector PLUG1 at its output end. The transformer TR includes a primary winding (indicated by the number of turns NP) and a secondary winding (indicated by the number of turns NS), wherein the non-pointing end of the primary winding NP is selectively coupled to a ground potential GND1 via a power switch Q1, and the point-to-point end of the secondary winding NS is coupled to a ground potential GND2. The first end of the magnetizing inductor LM is coupled to the point-to-point end of the primary winding NP in the transformer TR, and the second end is coupled to the non-pointing end of the primary winding NP in the transformer TR. The first end of the power switch Q1 is coupled to the non-pointing end of the primary winding NP in the transformer TR, the second end is coupled to the ground potential GND1, and the control end receives a first control signal GD1. The anode of the output diode DO is coupled to the non-pointing end of the secondary winding NS in the transformer TR, and the cathode is coupled to the Vbus pin of the connector PLUG1. The first end of the energy storage capacitor CO is coupled to the cathode of the output diode DO, and the second end is coupled to the ground potential GND2 to store the energy of the output voltage V _OUT .

The DC input voltage V _IN output by the rectifier circuit 10 is the input voltage of the flyback converter circuit 20. The power switch Q1 can perform high-frequency switching according to the first control signal GD1 to allow the excitation inductor LM to store and release energy. The transformer TR can sense the energy corresponding to the DC input voltage V _IN stored in the primary winding NP to the secondary winding NS, and the energy storage capacitor CO can store the energy of the secondary winding NS to provide the output voltage V _OUT . When the output diode DO is turned on due to the forward bias, the energy stored in the secondary winding NS of the transformer TR can charge the energy storage capacitor CO, and then supply the output voltage V _OUT to the power receiving device 200 through the Vbus pin of the connector PLUG1; when the output diode DO is turned off due to the reverse bias, the power transmission path of the power supply 100 will be cut off, and at this time, the Vbus pin of the connector PLUG1 has no output (V _OUT =0).

In the embodiment shown in FIG. 2 and FIG. 3 , the voltage detection circuit 30 includes a linear optocoupler PC, a compensation capacitor CC, a voltage regulator TL, and resistors R1-R2. Resistors R1 and R2 are connected in series between the output voltage V _OUT and the ground potential GND2, and a reference voltage V _REF related to the output voltage V _OUT can be established on the resistor R2, where V _RET =V _OUT *R2/(R1+R2). The reference terminal R of the voltage regulator TL is coupled between the resistors R1 and R2 to receive the reference voltage V _REF , the anode terminal A is coupled to the ground potential GND2, and the cathode terminal K is coupled to the linear optocoupler PC, where V _KA represents the cross-voltage between the cathode terminal K and the anode terminal A of the voltage regulator TL. The first terminal of the compensation capacitor CC is coupled to the cathode terminal K of the voltage regulator TL, and the second terminal thereof is coupled to the reference terminal R of the voltage regulator TL. The voltage regulator TL can adjust the compensation current I _C flowing through the cathode terminal K and the anode terminal A according to the state of the reference terminal R. In more detail, the voltage regulator TL compares the reference voltage _VREF received at its reference terminal R with a built-in reference voltage. When an error occurs, the compensation capacitor CC coupled between the cathode terminal K of the voltage regulator TL and the reference terminal R can adjust the gain of the voltage regulator TL accordingly, so that the value of the compensation current _IC can reflect the value of the reference voltage _VREF , that is, the value of the output voltage _VOUT .

The linear optocoupler PC includes a light emitting diode 32 and a photosensitive transistor 34, which can perform electrical-optical-electrical conversion between the primary side and the secondary side of the transformer TR. The light emitting diode 32 is coupled between the first input terminal and the second input terminal of the linear optocoupler PC, and its anode is coupled to the first terminal of the energy storage capacitor CO (that is, coupled to the output voltage V _OUT ), and its cathode is coupled to the cathode terminal K of the voltage regulator TL. The photosensitive transistor 34 is coupled between the first output terminal and the second output terminal of the linear optocoupler PC, and its first terminal is coupled to the control circuit 50, and its second terminal is coupled to the voltage regulator feedback compensation circuit 40. Since the compensation current _IC flowing through the LED 32 is related to the value of the output voltage V _OUT , the linear optocoupler PC can use the LED 32 on the input side to sense the change of the output voltage V _OUT , and convert the electrical energy related to the change of the output voltage V _OUT into light energy, which is then received by the photosensitive transistor 34 on the output side and converted into a feedback current I _FB . The feedback current I _FB flows through the voltage regulation feedback compensation circuit 40 and is stored as a feedback voltage V _FB , wherein the value of the feedback voltage V _FB is related to the total feedback capacitance value of the voltage regulation feedback compensation loop provided by the voltage regulation feedback compensation circuit 40 .

In the embodiment shown in FIG. 2 and FIG. 3, the voltage regulation feedback compensation circuit 40 includes first to third auxiliary switches Q2-Q4, a feedback capacitor CB, a first auxiliary capacitor CR1 and a second auxiliary capacitor CR2, and an auxiliary inductor LR. The first terminal of the first auxiliary switch Q2 is coupled to the second terminal of the photosensitive transistor 34 in the linear optical coupler PC to receive the feedback current _IFB , the second terminal thereof is coupled to the first auxiliary capacitor CR1, and the control terminal thereof receives a second control signal GD2. The first terminal of the second auxiliary switch Q3 is coupled to the auxiliary inductor LR, the second terminal thereof is coupled to the ground potential GND1, and the control terminal thereof receives a third control signal GD3. The first end of the third auxiliary switch Q4 is coupled to the second end of the photosensitive transistor 34 in the linear optical coupler PC to receive the feedback current I _FB , the second end thereof is coupled to the second auxiliary capacitor CR2, and the control end receives a fourth control signal GD4. The first end of the feedback capacitor CB is coupled to the second end of the photosensitive transistor 34 in the linear optical coupler PC to receive the feedback current I _FB , and the second end thereof is coupled to the ground potential GND1. The first end of the first auxiliary capacitor CR1 is coupled to the second end of the first auxiliary switch Q2, and the second end thereof is coupled to the ground potential GND1. The first end of the second auxiliary capacitor CR2 is coupled to the second end of the third auxiliary switch Q4, and the second end thereof is coupled to the ground potential GND1.

In the embodiment shown in FIG. 2 and FIG. 3, the control circuit 50 may be a microcontroller The present invention relates to a microcontroller unit (MCU), which comprises pins P1 to P5, wherein the pin P1 is used to output a first control signal GD1 that switches between a first enable potential and a first disable potential at a high frequency to a control end of a power switch Q1, the pin P2 is used to selectively output a second control signal GD2 having a second enable potential or a second disable potential to a control end of a first auxiliary switch Q2, the pin P3 is used to selectively output a third control signal GD3 having a third enable potential or a third disable potential to a control end of a second auxiliary switch Q3, the pin P4 is coupled to the control end of the third auxiliary switch Q4, and the pin P5 is coupled to a voltage detection circuit 30 to receive a feedback voltage V _FB .

In the embodiment shown in FIG. 2 , the control circuit 50 is further coupled to the CM pin of the connector PLUG1 through the pin P4 to receive the communication signal S _CM , that is, the fourth control signal GD4 of the third auxiliary switch Q4 is provided by the communication signal S _CM . In the embodiment shown in FIG. 3 , the control circuit 50 further includes a pin P6 coupled to the CM pin of the connector PLUG1 to receive the communication signal S _CM , and selectively outputs a fourth control signal _GD4 having a fourth enable potential or a fourth disable potential to the control terminal of the third auxiliary switch Q4 through the pin P4 according to the value of the communication signal S CM .

As shown in FIG. 2 and FIG. 3 , when the power supply 100 is not connected to the mains, all control signals are 0, and the power supply 100 has no output (V _OUT =0). When the power supply 100 is connected to the mains, the rectifier circuit 10 can convert the AC voltage V _AC supplied by the mains into a DC input voltage V _IN , and the control circuit 50 outputs a first control signal GD1 that switches between a first enable potential and a first disable potential at a high frequency to the control end of the power switch Q1 through the pin P1, so that the power switch Q1 can switch between the on and off states at a high frequency accordingly, thereby allowing the boost inductor LM to periodically store and release energy, and then periodically induct the primary side energy of the transformer TR to the secondary side, and at this time the output voltage V _OUT starts to rise.

The output voltage V _OUT is divided by resistors R1 and R2, and a reference voltage V _REF is established on resistor R2. The voltage regulator TL compares the reference voltage V _REF with the potential of its reference terminal R for voltage error. When an error is detected, the compensation capacitor CC is used to adjust the loop voltage gain and voltage V _KA , so that the value of the compensation current I _C flowing through the voltage regulator TL can reflect the value of the reference voltage V _REF . Then, the linear optocoupler PC can use the LED 32 on the input side to sense the variation of the compensation current _IC , and convert the electrical energy related to the variation of the compensation current _IC into light energy, which is then received by the phototransistor 34 on the output side and converted into the feedback current I _FB . Since the value of the reference voltage V _BEF is related to the value of the output voltage V _OUT , the variation of the compensation current _IC is related to the variation of the output voltage V _OUT , and the value of the feedback current I _FB can also reflect the state of the output voltage V _OUT .

The power supply 100 of the present invention controls the voltage regulation feedback compensation circuit 40 according to the operation mode of the power receiving device 200, thereby providing a corresponding voltage regulation feedback compensation architecture. For the purpose of illustration, it is assumed that the power receiving device 200 can operate in three modes: normal mode, severe dynamic load mode, and power saving mode. The power receiving device 200 can output a communication signal S _CM to the CM pin of the connector PLUG1 in the power supply 100 through the CM pin of its connector JACK2, so that the power supply 100 can know the current operation mode of the power receiving device 200. When the power supply 100 supplies power to the power receiving device 200, when the power receiving device 200 operates in the normal mode, the severe dynamic load mode and the power saving mode, the first to third real-time output loads of the power supply 100 are LOAD1, LOAD2 and LOAD3, respectively, where LOAD3<LOAD1<LOAD2.

In the embodiment shown in FIG. 2 , when the power receiving device 200 operates in the severe dynamic load mode, it outputs a communication signal S _CM having a fourth enable potential through the CM pin of its connector JACK2. When operating in the power saving mode, it outputs a communication signal S _CM having a fourth disable potential through the CM pin of its connector JACK2. When operating in the normal mode, it does not output any signal through the CM pin of its connector JACK2 (i.e., the fourth control signal GD4 is a floating potential).

In the embodiment shown in FIG. 3 , when the power receiving device 200 operates in the normal mode, a communication signal S _CM having a first potential is output through the CM pin of the connector JACK2. When operating in the severe dynamic load mode, a communication signal S _CM having a second potential is output through the CM pin of the connector JACK2. When operating in the power saving mode, a communication signal S _CM having a third potential is output through the CM pin of the connector JACK2. The first potential, the second potential and the third potential are different from each other.

FIG. 4A is a schematic diagram of the power supply 100 related signals when the power receiving device 200 operates in the normal mode in the embodiment of the present invention. FIG. 4B is a schematic diagram of the power supply 100 related signals when the power receiving device 200 operates in the severe dynamic load mode in the embodiment of the present invention. FIG. 4C is a schematic diagram of the power supply 100 related signals when the power receiving device 200 operates in the power saving mode in the embodiment of the present invention. FIG. 5A is an equivalent circuit diagram of the voltage regulation feedback compensation circuit 40 when the power receiving device 200 operates in the normal mode in the embodiment of the present invention. FIG. 5B is an equivalent circuit diagram of the voltage regulation feedback compensation circuit 40 when the power receiving device 200 operates in a severe dynamic load mode in the embodiment of the present invention. FIG. 5C is an equivalent circuit diagram of the voltage regulation feedback compensation circuit 40 when the power receiving device 200 operates in a power saving mode in the embodiment of the present invention.

As shown in FIG. 4A and FIG. 5A, when the control circuit 50 does not receive the communication signal S _CM through its pin P4 (the embodiment shown in FIG. 2) or receives the communication signal S _CM with the first potential through its pin P6 (the embodiment shown in FIG. 3), it will be determined that the current power receiving device 200 is operating in the normal mode. At this time, the control circuit 50 will output the second control signal GD2 with the second disable potential through its pin P2 to turn off the first auxiliary switch Q2, and will output the third control signal GD3 with the third disable potential through its pin P3 to turn off the second auxiliary switch Q3. Since the control terminal of the third auxiliary switch Q4 has a floating potential when the communication signal S _CM is not received, the third auxiliary switch Q4 will also be turned off. In this case, the voltage regulation feedback compensation circuit provided by the voltage regulation feedback compensation circuit 40 only includes the feedback capacitor CB, and its total first feedback capacitance value CT1 is also CB, as shown in FIG. 5A. The feedback capacitor CB is charged by the feedback current _IFB to provide the feedback voltage _VFB . When the control circuit 50 receives the feedback voltage _VFB through its pin P5, it compares the feedback voltage _VFB with its internal triangular wave voltage TRI, and then controls the power switch Q1 in a pulse modulation manner. For example, assuming that the feedback voltage V _FB received by the control circuit 50 is VCB1 when the power receiving device 200 operates in the normal mode, the first duty cycle DT1 of the first control signal GD1 is determined by the interval of VCB1>TRI to achieve the function of stabilizing the output voltage V _OUT , as shown in FIG. 4A .

As shown in FIG. 4B and FIG. 5B, when the control circuit 50 receives the communication signal S _CM having the fourth enable potential through its pin P4 (the embodiment shown in FIG. 2) or receives the communication signal S _CM having the second potential through its pin P6 (the embodiment shown in FIG. 3), it will be determined that the current power receiving device 200 is operating in the severe dynamic load mode. At this time, the control circuit 50 will output the second control signal GD2 having the second enable potential through its pin P2 to turn on the first auxiliary switch Q2, and will output the third control signal GD3 having the third disable potential through its pin P3 to turn off the second auxiliary switch Q3. At the same time, the third auxiliary switch Q4 is turned on by the communication signal S _CM having a fourth enable potential (the embodiment shown in FIG. 2 ), or the control circuit 50 outputs a fourth control signal GD4 having a fourth enable potential through its pin P4 to turn on the third auxiliary switch Q4 (the embodiment shown in FIG. 3 ). In this case, the voltage regulation feedback compensation circuit 40 provides a voltage regulation feedback compensation loop including a feedback capacitor CB, a first auxiliary capacitor CR1, and a second auxiliary capacitor CR2 in parallel, and the total second feedback capacitance CT2 is (CB+CR1+CR2), as shown in FIG. 5B . The feedback capacitor CB, the first auxiliary capacitor CR1 and the second auxiliary capacitor CR2 are all charged by the feedback current _IFB to increase the value of the feedback voltage _VFB . When the control circuit 50 receives the feedback voltage _VFB through its pin P5, it compares the feedback voltage _VFB with its internal triangular wave voltage TRI, and then controls the power switch Q1 in a pulse modulation manner. For example, assuming that when the power receiving device 200 operates in a severe dynamic load mode, the feedback voltage _VFB received by the control circuit 50 has a value of VCB2, and the second duty cycle DT2 of the first control signal GD1 is determined by the interval of VCB2>TRI, as shown in Figure 4B. When the power receiving device 200 operates in a severe dynamic load mode, the value of the feedback voltage V _FB increases to VCB2 (VCB2>VCB1) with the larger total second feedback capacitance CT2, so that the control circuit 50 can output the first control signal GD1 with a longer second duty cycle DT2. By increasing the on-time of the power switch Q1, the average energy of the magnetizing inductor LM can be increased to avoid insufficient power supply or power failure under the demand of high instant output load, thereby achieving the function of stabilizing the output voltage V _OUT .

As shown in FIG. 4C and FIG. 5C , when the control circuit 50 receives the communication signal S _CM having the fourth disable potential through its pin P4 (the embodiment shown in FIG. 2 ) or receives the communication signal S _CM having the third potential through its pin P6 (the embodiment shown in FIG. 3 ), it will be determined that the current power receiving device 200 is operating in the power saving mode. At this time, the control circuit 50 will output the second control signal GD2 having the second disable potential through its pin P2 to turn off the first auxiliary switch Q2, and will output the third control signal GD3 having the third enable potential through its pin P3 to turn on the second auxiliary switch Q3. At the same time, the third auxiliary switch Q4 will be turned off by the communication signal S _CM having a fourth disable potential (the embodiment shown in FIG. 2 ), or the control circuit 50 will output a fourth control signal GD4 having a fourth disable potential through its pin P4 to turn off the third auxiliary switch Q4 (the embodiment shown in FIG. 3 ). In this case, the voltage regulation feedback compensation loop provided by the voltage regulation feedback compensation circuit 40 will include a parallel structure of a feedback capacitor CB and an auxiliary inductor LR, as shown in FIG. 5C . As is generally known to those with common knowledge in the relevant field, the voltage across the capacitor-inductor parallel structure is the same, but the phase of the inductor current will lag behind the voltage by 90 degrees, and the phase of the capacitor current will lead the voltage by 90 degrees, so that there will be a 180-degree phase difference between the inductor current and the capacitor current, that is, the feedback current I _FB flowing through the feedback capacitor CB and the inductor current I _LR flowing through the auxiliary inductor LR are in opposite directions, so that the total third feedback capacitance value CT3 of the voltage regulator feedback compensation circuit 40 will be smaller than CB. When part of the feedback current I _FB is offset by the inductor current I _LR , the feedback voltage V _FB is pulled down. When the control circuit 50 receives the feedback voltage V _FB through its pin P5, it compares the feedback voltage V _FB with its internal triangular wave voltage TRI, and then controls the power switch Q1 in a pulse modulation manner. For example, assuming that when the power receiving device 200 operates in the power saving mode, the feedback voltage V _FB received by the control circuit 50 has a value of VCB3, and the third duty cycle DT3 of the first control signal GD1 is determined by the interval of VCB3>TRI, as shown in Figure 4C. When the power receiving device 200 operates in the power saving mode, the value of the feedback voltage V _FB decreases to VCB3 (VCB3<VCB1) with the smaller total third feedback capacitance value CT3, so that the control circuit 50 can output the first control signal GD1 with a shorter third duty cycle DT3. By reducing the conduction time of the power switch Q1, the average energy of the excitation inductor LM can be reduced to achieve the purpose of power saving.

In the embodiment of the present invention, the power switch Q1 and the first to third auxiliary switches Q2-Q4 can be metal-oxide-semiconductor field-effect transistors (MOSFET), bipolar junction transistors (BJT), or other components with similar functions. For N-type transistors, the enable potential is high and the disable potential is low; for P-type transistors, the enable potential is low and the disable potential is high. However, the types of the above switches do not limit the scope of the present invention.

In summary, in the power supply 100 of the present invention, the rectifier circuit 10 and the flyback converter circuit 20 can convert the AC voltage V _AC supplied by the mains into the output voltage V _OUT to supply the power required for the operation of the power receiving device 200. The voltage detection circuit 30 can detect the state of the output voltage V _OUT and provide the corresponding feedback current I _FB and feedback voltage V _FB . The voltage-regulated feedback compensation circuit 40 can adaptively provide a voltage-regulated feedback compensation loop to store the energy of the related feedback current I _FB , thereby supplying the feedback voltage V _FB . The control circuit 50 controls the voltage regulation feedback compensation circuit 40 according to the operation mode of the power receiving device 200 so that it can provide a corresponding voltage regulation feedback compensation loop, and controls the operation of the flyback conversion circuit 20 according to the value of the feedback voltage V _FB to achieve the function of stabilizing the output voltage V _OUT . The power supply and power supply system of the present invention can avoid the occurrence of power shortage or power failure under the demand of high real-time output load, and can achieve the purpose of power saving under the demand of low real-time output load.

The above is only the preferred embodiment of the present invention. All equivalent changes and modifications made within the scope of the patent application of the present invention shall fall within the scope of the present invention.

10: Rectifier circuit

20: Flyback converter circuit

30: Voltage detection circuit

32: LED

34: Photosensitive transistor

40: Voltage regulation feedback compensation circuit

50: Control circuit

100: Power supply

Vbus power supply pin

GND ground pin

CM communication potential

TR: Transformer

NP: Primary side winding set and number of turns

NS: Secondary winding and number of turns

GND1, GND2: ground potential

Q1: Power switch

Q2-Q4: Auxiliary switch

PC: Linear optocoupler

R1, R2: resistors

TL: Voltage regulator

A: Anode end of the voltage regulator

K: cathode end of the voltage regulator

R: Reference terminal of the voltage regulator

CO: Energy storage capacitor

CC: Compensation capacitor

CB: Feedback capacitor

CR1, CR2: Auxiliary capacitors

DO: output diode

D1-D4: diodes

LM: Magnetizing inductance

LR: Auxiliary inductor

V _IN : DC input voltage

V _OUT : Output voltage

V _AC : Alternating current voltage

V _FB : Feedback voltage

V _REF : Reference voltage

I _C : Compensation Current

I _FB : Feedback current

I _LR : Inductor current

GD1-GD4: control signal

S _CM : Communication Signal

P1-P5: Foot position

Claims (5)

A power supply with an adaptive voltage-stabilizing compensation circuit is used to provide an output voltage to supply power to a power receiving device, and includes: a rectifier circuit, used to convert an AC voltage of a mains supply into a DC input voltage; a flyback conversion circuit, used to convert the DC input voltage into the output voltage according to a first control signal that periodically switches between a first enabling potential and a first disabling potential; a voltage detection circuit, used to provide a feedback current and a feedback voltage related to the output voltage; a voltage-stabilizing feedback compensation circuit, used to adaptively provide a stable A voltage feedback compensation circuit is used to store energy related to the feedback current, thereby supplying the feedback voltage. The voltage feedback compensation circuit includes: a feedback capacitor, which includes: a first end, coupled to the voltage detection circuit to receive the feedback current; and a second end, coupled to a first ground potential; a first auxiliary switch, which includes: a first end, coupled to the voltage detection circuit to receive the feedback current; a second end; and a control end for receiving a second control signal; a first auxiliary capacitor, which includes: a first end, coupled to the second end of the first auxiliary switch; and a second end coupled to the first ground potential; an auxiliary inductor, comprising: a first end connected to the voltage detection circuit to receive the feedback current; and a second end; and a second auxiliary switch, comprising: a first end coupled to the second end of the auxiliary inductor; a second end coupled to the first ground potential; and a control end for receiving a third control signal; and a control circuit for: determining a current operating mode of the power receiving device according to a communication signal provided by the power receiving device; and determining that the power receiving device is in a first mode according to the communication signal. When the power receiving device is operated in a second mode, the second control signal with a second disable potential is output to turn off the first auxiliary switch and the second control signal with a third disable potential is output to turn off the second auxiliary switch, so as to control the voltage regulating feedback compensation circuit to provide the voltage regulating feedback compensation circuit with a first feedback capacitance value, thereby making the voltage detection circuit provide the feedback voltage with a first value, wherein the first feedback capacitance value is determined by the feedback capacitance; when it is determined according to the communication signal that the power receiving device is operated in a second mode, the second control signal with a second enable potential is output to turn on the The first auxiliary switch is turned on and the second control signal having the third disable potential is output to turn off the second auxiliary switch to control the voltage regulation feedback compensation circuit to provide the voltage regulation feedback compensation circuit with a second feedback capacitance value, thereby causing the voltage detection circuit to provide the feedback voltage with a second value, wherein the second feedback capacitance value is determined by the parallel connection structure of the first auxiliary capacitor and the feedback capacitor; when it is determined according to the communication signal that the power receiving device is operating in a third mode, the second control signal having the second disable potential is output to turn off the first auxiliary switch and output a first control signal having a second disable potential. The third control signal of the three enabling potentials is used to turn on the second auxiliary switch to control the voltage regulating feedback compensation circuit to provide the voltage regulating feedback compensation circuit with a third feedback capacitance value, thereby enabling the voltage detection circuit to provide the feedback voltage with a third value, wherein the third feedback capacitance value is determined by the parallel connection structure of the auxiliary inductor and the feedback capacitor; when receiving the feedback voltage with the first value, the first control signal that is periodically switched between the first enabling potential and the first disabling potential in a first duty cycle is output to control the operation of the flyback conversion circuit; when receiving the feedback voltage with the first value, the first control signal is output to control the operation of the flyback conversion circuit; When the feedback voltage has the second value, the first control signal that is periodically switched between the first enable potential and the first disable potential with a second duty cycle is output to control the operation of the flyback conversion circuit; when the feedback voltage has the third value, the first control signal that is periodically switched between the first enable potential and the first disable potential with a third duty cycle is output to control the operation of the flyback conversion circuit, wherein: when the power receiving device operates in the first mode, a first real-time output load of the power supply is less than when the power receiving device is in the second mode. When the power receiving device operates in the third mode, a second real-time output load of the power supply is less than the first real-time output load of the power supply when the power receiving device operates in the first mode; when the power receiving device operates in the third mode, a third real-time output load of the power supply is less than the first real-time output load of the power supply when the power receiving device operates in the first mode; the first feedback capacitance value is less than the second feedback capacitance value, and the third feedback capacitance value is less than the first feedback capacitance value; the first value is less than the second value, and the third value is less than the first value; and the first duty cycle is less than the second duty cycle, and the third duty cycle is less than the first duty cycle. A power supply as described in claim 1, wherein the flyback conversion circuit comprises: a power switch, which comprises: a first terminal; a second terminal coupled to the first ground potential; and a control terminal for receiving the first control signal; a transformer, which is used to induce the energy of the DC input voltage from a primary side to a secondary side to provide the output voltage, and comprises: a primary side winding, which is arranged on the primary side, and comprises a first striking terminal and a first non-striking terminal, wherein the first non-striking terminal is selectively coupled to the first ground potential via the power switch; and a secondary side winding, Set on the secondary side, it includes a second dotted end and a second non-dotted end, wherein the second dotted end is coupled to a second ground potential; an excitation inductor, which includes: a first end, coupled to the first dotted end; and a second end, coupled to the first non-dotted end; an energy storage capacitor, used to store the energy of the secondary side winding to supply the output voltage, which includes: a first end; and a second end, coupled to the second ground potential; and an output diode, which includes: an anode, coupled to the second non-dotted end; and a cathode, coupled to the first end of the energy storage capacitor. The power supply as described in claim 1, wherein: the voltage-regulated feedback compensation circuit further comprises: a third auxiliary switch, comprising: a first end coupled to the voltage detection circuit to receive the feedback current; a second end; and a control end coupled to the communication signal; and a second auxiliary capacitor, comprising: a first end coupled to the second end of the third auxiliary switch; and a second end coupled to the first ground potential; when the power receiving device is in the first mode or When operating in the third mode, the communication signal has a fourth disable potential or a floating potential to turn off the third auxiliary switch; and when the power receiving device operates in the second mode, the communication signal has a fourth enable potential to turn on the third auxiliary switch, thereby making the second auxiliary capacitor connected in parallel to the feedback capacitor, so that the second feedback capacitor value of the voltage-regulating feedback compensation loop is determined by the parallel connection structure of the first auxiliary capacitor, the second auxiliary capacitor and the feedback capacitor. A power supply as described in claim 1, wherein the voltage detection circuit comprises: a first resistor and a second resistor, connected in series between the output voltage and a ground potential, for providing a reference voltage related to the output voltage; a voltage regulator, comprising a cathode terminal, an anode terminal and a reference terminal, for receiving the reference voltage through the reference terminal and adjusting the current flowing through the cathode terminal according to the state of the reference voltage. and a compensation current at the anode end; a linear optical coupler for sensing the variation of the compensation current and converting an electrical energy related to the variation of the compensation current into light energy, and then converting the light energy into the feedback current; and a compensation capacitor for adjusting the gain of the voltage regulator, which includes: a first end coupled to the cathode end of the voltage regulator; and a second end coupled to the reference end of the voltage regulator. A power supply system, comprising: a power supply as described in any one of claim 1-4; a transmission interface; and a power receiving device coupled to the power supply to receive the output voltage and transmit the communication signal related to its current operating mode to the power supply.

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