TWI847124B - Wave device - Google Patents
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- TWI847124B TWI847124B TW111114755A TW111114755A TWI847124B TW I847124 B TWI847124 B TW I847124B TW 111114755 A TW111114755 A TW 111114755A TW 111114755 A TW111114755 A TW 111114755A TW I847124 B TWI847124 B TW I847124B
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- insulating layer
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- 239000000758 substrate Substances 0.000 claims abstract description 93
- 239000010410 layer Substances 0.000 claims description 152
- 239000011241 protective layer Substances 0.000 claims description 93
- 229910000679 solder Inorganic materials 0.000 claims description 61
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 238000005272 metallurgy Methods 0.000 claims description 6
- 239000004020 conductor Substances 0.000 claims description 4
- 238000000034 method Methods 0.000 description 15
- 238000010897 surface acoustic wave method Methods 0.000 description 15
- 229910052751 metal Inorganic materials 0.000 description 12
- 239000002184 metal Substances 0.000 description 12
- 238000005516 engineering process Methods 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 101100012902 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) FIG2 gene Proteins 0.000 description 4
- 101100233916 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) KAR5 gene Proteins 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 229910052451 lead zirconate titanate Inorganic materials 0.000 description 2
- 238000003466 welding Methods 0.000 description 2
- 101001121408 Homo sapiens L-amino-acid oxidase Proteins 0.000 description 1
- 102100026388 L-amino-acid oxidase Human genes 0.000 description 1
- AWJDQCINSGRBDJ-UHFFFAOYSA-N [Li].[Ta] Chemical compound [Li].[Ta] AWJDQCINSGRBDJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- NKZSPGSOXYXWQA-UHFFFAOYSA-N dioxido(oxo)titanium;lead(2+) Chemical compound [Pb+2].[O-][Ti]([O-])=O NKZSPGSOXYXWQA-UHFFFAOYSA-N 0.000 description 1
- HFGPZNIAWCZYJU-UHFFFAOYSA-N lead zirconate titanate Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ti+4].[Zr+4].[Pb+2] HFGPZNIAWCZYJU-UHFFFAOYSA-N 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
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- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
Description
本發明涉及一種半導體技術領域,特別是有關於一種可以提昇頻率享應性能的聲波元件。 The present invention relates to a semiconductor technology field, and in particular to an acoustic wave element that can improve frequency response performance.
表面聲波元件(SAW,surface acoustic wave)能夠通過將功率施加到形成在基板上的叉指式換能器(IDT,Interdigital Transducer)的梳狀電極來激勵聲波。表面聲波元件廣泛地用於對例如45MHz到2GHz的頻寬內的無線電信號進行處理的各種電路。這些電路的例子有用於發送的帶通濾波器、用於接收的帶通濾波器(band pass filter)、本地端振盪濾波器、天線雙工器(duplexer)、中頻濾波器以及調頻調變器(FM,Frequency Modulation)。 Surface acoustic wave (SAW) elements can excite acoustic waves by applying power to the comb electrodes of an interdigital transducer (IDT) formed on a substrate. Surface acoustic wave elements are widely used in various circuits that process radio signals within a bandwidth of, for example, 45 MHz to 2 GHz. Examples of these circuits are bandpass filters for transmission, bandpass filters for reception, local end oscillator filters, antenna duplexers, intermediate frequency filters, and frequency modulation modulators (FM).
表面聲波元件需要位於由梳狀電極組成的聲波元件的功能部件,例如叉指式換能器的電極指,上方的空腔以確保表面聲波元件的性能。常規的表面聲波器件採用具有其中安裝有表面聲波元件的凹槽的陶瓷接合以在表面聲波元件與設置在陶瓷封裝上的內連線之間構成電性連接。 Surface acoustic wave elements require cavities located above functional components of the acoustic wave element composed of comb electrodes, such as electrode fingers of an interdigital transducer, to ensure the performance of the surface acoustic wave element. Conventional surface acoustic wave devices use a ceramic joint having a groove in which the surface acoustic wave element is mounted to form an electrical connection between the surface acoustic wave element and the internal wiring provided on the ceramic package.
然而,在引線接合的製程中使用了導線,但是會妨礙表面聲波器件尺寸的縮小。為了減小表面聲波器件的尺寸,則是進一步的開發了倒裝式接合 (flip-chip bonding)。由於倒裝式接合不使用導線進行安裝,因而實現了表面聲波器件尺寸的減小。 However, the use of wires in the wire bonding process will hinder the reduction of the size of the surface acoustic wave device. In order to reduce the size of the surface acoustic wave device, flip-chip bonding was further developed. Since flip-chip bonding does not use wires for mounting, it has achieved a reduction in the size of the surface acoustic wave device.
近年來,已經對於減小表面聲波器件尺寸有了更嚴格的要求。在某些情況下,甚至於倒裝式接合也不能實現所需的縮小尺寸。於是又提出了將表面聲波元件設置在基板上,而基板的表面上設置有覆蓋層,以在表面聲波元件的功能部件的上方限定空腔,上述的覆蓋層則做為封裝體。此類型的封裝被稱為晶片級封裝(WLP,wafer level package),此種封裝方式則實現了將表面聲波元件的體積小型化。 In recent years, there have been more stringent requirements for reducing the size of surface acoustic wave devices. In some cases, even flip-chip bonding cannot achieve the required size reduction. Therefore, it is proposed to set the surface acoustic wave element on a substrate, and a covering layer is set on the surface of the substrate to define a cavity above the functional components of the surface acoustic wave element, and the above-mentioned covering layer serves as a package. This type of packaging is called wafer level package (WLP), and this packaging method realizes the miniaturization of the surface acoustic wave element.
本發明主要目的是提供一種聲波元件,在焊墊上形成導體層以增加凸塊與焊墊之間的強度,以解決當聲波元件以倒裝方式進行封裝時,凸塊因應力而斷裂時會連帶將焊墊一併由基板上拔起,而造成整個封裝結構毀損的問題。 The main purpose of the present invention is to provide an acoustic wave component, in which a conductive layer is formed on the solder pad to increase the strength between the bump and the solder pad, so as to solve the problem that when the acoustic wave component is packaged in a flip-chip manner, the bump will break due to stress and the solder pad will be pulled off the substrate, causing damage to the entire packaging structure.
本發明的另一目的在於提供一種聲波元件,增加設計可行性,增加電源凸塊或接地凸塊,提升電氣性能。 Another purpose of the present invention is to provide an acoustic wave element to increase design feasibility, add power bumps or ground bumps, and improve electrical performance.
根據上述目的,本發明揭露一種聲波元件,包括:基板,具有上表面及下表面,於上表面的周邊上設有多個焊墊;至少一個電子元件,設置在基板的上表面,使得在基板的上表面的周邊的多個焊墊環繞電子元件;蓋體結構,設置在具有電子元件的基板的上方,且蓋體結構與基板之間的空間定義為封閉式空腔,使電子元件設置在此封閉式空腔內;第一保護層,覆蓋在基板的部分上表面及覆蓋在多個焊墊的部分表面上,且暴露出未被第一保護層覆蓋的多個焊墊的部分表面;導體層設置在第一保護層的部分表面、未被第一保護層覆蓋的多 個焊墊的部分表面、蓋體結構的外側表面及蓋體結構的部分上表面;以及多個凸塊,設置在位於蓋體結構的上表面的導體層上。 According to the above purpose, the present invention discloses an acoustic wave element, comprising: a substrate having an upper surface and a lower surface, and a plurality of solder pads are arranged on the periphery of the upper surface; at least one electronic component is arranged on the upper surface of the substrate, so that the plurality of solder pads on the periphery of the upper surface of the substrate surround the electronic component; a cover structure is arranged above the substrate having the electronic component, and the space between the cover structure and the substrate is defined as a closed cavity, so that the electronic component is arranged in the closed cavity. The first protective layer covers part of the upper surface of the substrate and part of the surface of the plurality of solder pads, and exposes part of the surface of the plurality of solder pads not covered by the first protective layer; the conductive layer is disposed on part of the surface of the first protective layer, part of the surface of the plurality of solder pads not covered by the first protective layer, the outer surface of the cover structure and part of the upper surface of the cover structure; and a plurality of bumps are disposed on the conductive layer located on the upper surface of the cover structure.
在本發明的一較佳實施例中,蓋體結構由基板往上依序包括:部分第二保護層覆蓋鄰近於電子元件的多個焊墊的部分表面,並設置在鄰近於電子元件的基板的上表面;第一絕緣層,設置在第二保護層的部分表面上,且第二保護層及第一絕緣層未遮蓋在基板上的電子元件;以及第二絕緣層,覆蓋在第一絕緣層的部分表面上,使得第二保護層及第一絕緣層所構成的結構定義為蓋體結構的側面牆體及第二絕緣層為蓋體結構的頂面牆體。 In a preferred embodiment of the present invention, the cover structure includes, from the substrate upward, a portion of the second protective layer covering a portion of the surface of multiple solder pads adjacent to the electronic components and disposed on the upper surface of the substrate adjacent to the electronic components; a first insulating layer disposed on a portion of the surface of the second protective layer, and the second protective layer and the first insulating layer do not cover the electronic components on the substrate; and a second insulating layer covering a portion of the surface of the first insulating layer, so that the structure formed by the second protective layer and the first insulating layer is defined as the side wall of the cover structure and the second insulating layer is the top wall of the cover structure.
在本發明的一較佳實施例中,蓋體結構由基板往上依序包括:部分第二保護層覆蓋鄰近於電子元件的多個焊墊的部分表面及部分第二保護層設置在鄰近於電子元件的基板的上表面;第一絕緣層,設置在第二保護層的部分表面及覆蓋多個焊墊的部分表面以暴露出未被第一絕緣層覆蓋的多個焊墊的部分表面,且第二保護層及第一絕緣層未遮蓋在基板上的電子元件;以及第二絕緣層,覆蓋在第一絕緣層的部分表面上,使得第二保護層及第一絕緣層所構成的結構定義為蓋體結構的側面牆體及第二絕緣層為蓋體結構的頂面牆體。 In a preferred embodiment of the present invention, the cover structure includes, from the substrate upward, a portion of the second protective layer covering a portion of the surface of the plurality of solder pads adjacent to the electronic component and a portion of the second protective layer disposed on the upper surface of the substrate adjacent to the electronic component; a first insulating layer disposed on a portion of the surface of the second protective layer and covering a portion of the surface of the plurality of solder pads to expose the unbonded portions of the first insulating layer; Partial surfaces of multiple solder pads covered by the first insulating layer, and the electronic components on the substrate not covered by the second protective layer and the first insulating layer; and the second insulating layer covering a partial surface of the first insulating layer, so that the structure formed by the second protective layer and the first insulating layer is defined as the side wall of the cover structure and the second insulating layer is the top wall of the cover structure.
根據上述目的,本發明還揭露另一種聲波元件,包括:基板具有上表面及下表面,於上表面的周邊上設有多個焊墊;至少一個電子元件,設置在基板的上表面,使得在基板的上表面的周邊的多個焊墊環繞電子元件;蓋體結構,設置在具有電子元件的基板的上方,且蓋體結構與基板之間的空間定義為封閉式空腔,使得電子元件設置在封閉式空腔內;第一保護層,覆蓋在基板的部分上表面及覆蓋在多個焊墊的部分表面上;第一絕緣層,設置在第一保護層的部分表面且覆蓋多個焊墊的部分該表面以暴露出未被第一保護層覆蓋的多個焊墊的 部分表面;導體層,覆蓋在第一絕緣層的部分表面、未被第一保護層覆蓋的多個焊墊的部分表面、蓋體結構的外側表面及蓋體結構的部分上表面;以及多個凸塊,設置在位於蓋體結構的上表面的導體層上。 According to the above purpose, the present invention also discloses another acoustic wave element, comprising: a substrate having an upper surface and a lower surface, and a plurality of solder pads are arranged on the periphery of the upper surface; at least one electronic element is arranged on the upper surface of the substrate, so that the plurality of solder pads on the periphery of the upper surface of the substrate surround the electronic element; a cover structure is arranged above the substrate having the electronic element, and the space between the cover structure and the substrate is defined as a closed cavity, so that the electronic element is arranged in the closed cavity; a first protective layer covers the substrate The first insulating layer is disposed on a portion of the surface of the first protective layer and covers a portion of the surface of the plurality of solder pads to expose a portion of the surface of the plurality of solder pads not covered by the first protective layer; the conductive layer covers a portion of the surface of the first insulating layer, a portion of the surface of the plurality of solder pads not covered by the first protective layer, the outer surface of the cover structure and a portion of the upper surface of the cover structure; and a plurality of bumps are disposed on the conductive layer located on the upper surface of the cover structure.
在本發明的一較佳實施例中,蓋體結構的第二絕緣層及第一絕緣層呈階梯結構。 In a preferred embodiment of the present invention, the second insulating layer and the first insulating layer of the cover structure are in a stepped structure.
在本發明的一較佳實施例中,設置在第一保護層的部分表面且覆蓋多個焊墊的部分表面上的第一絕緣層的高度與蓋體結構的第一絕緣層的高度相同。 In a preferred embodiment of the present invention, the height of the first insulating layer disposed on a portion of the surface of the first protective layer and covering a portion of the surface of multiple pads is the same as the height of the first insulating layer of the cover structure.
在本發明的一較佳實施例中,導體層由凸塊下金屬層(UBM,under ball metallurgy)及重布線層(RDL,redistribution layer)構成,其中重布線層設置在凸塊下金屬層上。 In a preferred embodiment of the present invention, the conductor layer is composed of an under ball metallurgy (UBM) and a redistribution layer (RDL), wherein the redistribution layer is disposed on the under ball metallurgy.
在本發明的一較佳實施例中,電子元件可以是濾波器、振盪器或是傳感器。 In a preferred embodiment of the present invention, the electronic component may be a filter, an oscillator or a sensor.
在本發明的一較佳實施例中,凸塊可以是銅柱凸塊、銅柱或是C4凸塊。 In a preferred embodiment of the present invention, the bump can be a copper pillar bump, a copper pillar or a C4 bump.
1、2、3:聲波元件 1, 2, 3: Acoustic wave components
10:基板 10: Substrate
102:上表面 102: Upper surface
104:下表面 104: Lower surface
106:焊墊 106: Welding pad
20:電子元件 20: Electronic components
30a、30b、30c:蓋體結構 30a, 30b, 30c: Cover structure
302a、302b、302c:第二保護層 302a, 302b, 302c: Second protection layer
304a、304b、304c:第一絕緣層 304a, 304b, 304c: first insulating layer
306a、306b、306c:第二絕緣層 306a, 306b, 306c: Second insulating layer
32a、32b、32c:封閉式空腔 32a, 32b, 32c: Closed cavity
34a、34b、34c:外側表面 34a, 34b, 34c: Outer surface
36a、36b、36c:上表面 36a, 36b, 36c: upper surface
40:第一保護層 40: First protective layer
50a、50b、50c:導體層 50a, 50b, 50c: Conductor layer
502a、502b、502c:凸塊下金屬層 502a, 502b, 502c: metal layer under the bump
504a、504b、504c:重布線層 504a, 504b, 504c: Rewiring layer
60:凸塊 60: Bump
圖1是根據本發明所揭露的技術,表示聲波元件的一實施例的截面示意圖。 FIG1 is a cross-sectional schematic diagram showing an embodiment of an acoustic wave element according to the technology disclosed in the present invention.
圖2是根據本發明所揭露的技術,表示聲波元件的另一實施例的截面示意圖。 FIG2 is a cross-sectional schematic diagram showing another embodiment of an acoustic wave element according to the technology disclosed in the present invention.
圖3是根據本發明所揭露的技術,表示聲波元件的又一實施例的截面示意圖。 FIG3 is a cross-sectional schematic diagram showing another embodiment of an acoustic wave element according to the technology disclosed in the present invention.
首先請參考圖1。圖1是根據本發明所揭露的技術,表示聲波元件的一實施例的截面示意圖。在圖1中,聲波元件1由基板10、電子元件20、蓋體結構30a、第一保護層40、導體層50a及多個凸塊60所構成。其中,基板10具有上表面102及下表面104,且於上表面102的周邊設有多個焊墊106。於一實施例中,基板10由壓電材料所製成,例如石英(quartz)、鉭酸鋰(LT,LiTaO3)、鈦酸鉛(PTO,PbTiO3)或是鋯鈦酸鉛(PZT,Pb(Zr,Ti)O3)。焊墊106可以是鋁墊。電子元件20,設置在基板10的上表面102,使得在基板10的上表面102的周邊的多個焊墊106環繞電子元件20。在本發明的實施例中,電子元件20可以是濾波器(filter)、振盪器或是傳感器。
First, please refer to FIG. 1 . FIG. 1 is a cross-sectional schematic diagram showing an embodiment of an acoustic wave element according to the technology disclosed in the present invention. In FIG. 1 , the
接著請繼續參考圖1。在具有電子元件20的基板10的上方設有蓋體結構30a,此蓋體結構30a與基板10之間的空間可定義為封閉式空腔32a,因此在基板10的上表面102的電子元件20設置在此封閉式空腔32a內。蓋體結構30a可以防止外在環境中的水氣進入封閉式空腔32a內,經由蓋體結構30a來增加電子元件20的使用壽命及整個聲波元件1的可靠性。
Please continue to refer to Figure 1. A
在本發明的一實施例中,蓋體結構30a由基板10往上依序包括:第二保護層302a、第一絕緣層304a及第二絕緣層306a,其中,第二保護層302a覆蓋鄰近於電子元件20的多個焊墊106的部分表面及第二保護層302a設置在鄰近於電子元件20的基板10的部分上表面102。第一絕緣層304a設置在第二保護層302a
的部分表面,且在基板10上方的第二保護層302a及第一絕緣層304a未遮蓋在基板10上的電子元件20。第二絕緣層306a覆蓋在第一絕緣層304a的部分表面上,使得第二保護層302a及第一絕緣層304a所構成的結構可以定義為蓋體結構30a的側面牆體及第二絕緣層306a為蓋體結構30a的頂面牆體。於一實施例中,蓋體結構30a中的第二絕緣層306a與第一絕緣層304a呈階梯結構。
In one embodiment of the present invention, the
同樣請繼續參考圖1。聲波元件1還包括第一保護層40,同時覆蓋在基板10的部分上表面102及多個焊墊106的部分表面上,且將多個焊墊106的其他部分表面暴露出來,也就是未被第一保護層40覆蓋的多個焊墊106的部分表面。要說明的是,覆蓋在基板10的部分上表面102及覆蓋在多個焊墊106的部分表面上,且將多個焊墊106的其他部分表面暴露出來的第一保護層40與蓋體結構30a中的第二保護層302a是同時利用半導體製程所形成。接著,導體層50a覆蓋在第一保護層40的部分表面、未被第一保護層40覆蓋的多個焊墊106的部分表面及在蓋體結構30a的外側表面34a及蓋體結構30a的部分上表面36a。於一實施例中,導體層50a由凸塊下金屬層(UBM,under bump metallurgy)502a及重布線層(RDL,redistribution layer)504a所構成,其中重布線層504a設置在凸塊下金屬層502a上。具體來說,做為導體層50a的凸塊下金屬層502a覆蓋在第一保護層40的部分表面、未被第一保護層40覆蓋的多個焊墊106的部分表面、蓋體結構30a的外側表面34a及蓋體結構30a的部分上表面36a,接著,再將作為導體層50a的重布線層504a設置在凸塊下金屬層502a上。最後,將多個凸塊60設置在覆蓋於蓋體結構30a的上表面36a的導體層50a以完成聲波元件1,於一實施例中,凸塊60可以是銅柱凸塊(Copper Pillar Bump)、銅柱或是C4凸塊。此外要說明的是,在本發明中的聲波元
件1的形成方式均是利用現有的半導體製程技術,其製程流程及構成聲波元件1的材料並不在本發明所要討論的技術方案中,故不多加陳述。
Please continue to refer to FIG. 1 . The
接著,本發明還揭露另一種聲波元件,如圖2所示。圖2是根據本發明所揭露的技術,表示聲波元件的另一實施例的截面示意圖。在圖2中,聲波元件2由基板10、電子元件20、蓋體結構30b、第一保護層40、導體層50b及多個凸塊60所構成。基板10具有上表面102及下表面104,且於上表面102的周邊設有多個焊墊106。基板10、焊墊106及電子元件20的材料與前述相同不再多加陳述。電子元件20設置在基板10的上表面102,使得在基板10的上表面102的周邊的多個焊墊106環繞電子元件20。
Next, the present invention also discloses another acoustic wave element, as shown in FIG2. FIG2 is a cross-sectional schematic diagram showing another embodiment of an acoustic wave element according to the technology disclosed in the present invention. In FIG2, the
接著請繼續參考圖2。在具有電子元件20的基板10的上方設有蓋體結構30b,此蓋體結構30b與基板10之間的空間可定義為封閉式空腔32b,因此在基板10的上表面102的電子元件20設置在此封閉式空腔32b內。蓋體結構30b可以防止外在環境中的水氣進入封閉式空腔32b內,經由蓋體結構30b來增加電子元件20的使用壽命及整個聲波元件2的可靠性。
Please continue to refer to Figure 2. A
在本發明的另一實施例中,蓋體結構30b由基板10往上依序包括:第二保護層302b、第一絕緣層304b及第二絕緣層306b,其中,第二保護層302b覆蓋鄰近於電子元件20的多個焊墊106的部分表面及第二保護層302b設置在鄰近於電子元件20的基板10的部分上表面102。第一絕緣層304b設置在第二保護層302b的部分表面及覆蓋於多個焊墊106的部分表面,且在基板10上方的第二保護層302b及第一絕緣層304b未遮蓋在基板10上的電子元件20。第二絕緣層306b覆蓋在第一絕緣層304b的部分表面上,使得第二保護層302b及第一絕緣層304b所構成的結構定義為蓋體結構30b的側面牆體及第二絕緣層306b為蓋體結構30b的
頂面牆體。同樣的,於一實施例中,蓋體結構30b中的第二絕緣層306b與第一絕緣層304b呈階梯結構。
In another embodiment of the present invention, the
請繼續參考圖2。聲波元件2還包括第一保護層40,同時覆蓋在基板10的部分上表面102及多個焊墊106的部分表面上,且將多個焊墊106的其他部分表面暴露出來也就是未被第一保護層40覆蓋的多個焊墊106的部分表面。要說明的是,覆蓋在基板10的部分上表面102及覆蓋在多個焊墊106的部分表面上,且將多個焊墊106的其他部分表面暴露出來的第一保護層40與蓋體結構30b中的第二保護層302b是同時利用半導體製程所形成。接著,導體層50b覆蓋在第一保護層40的部分表面、未被第一保護層40覆蓋的多個焊墊106的部分表面及在蓋體結構30b的外側表面34b及蓋體結構30b的部分上表面36b。於一實施例中,導體層50b由凸塊下金屬層502b及重布線層504b所構成,其中重布線層504b設置在凸塊下金屬層502b上。具體來說,做為導體層50b的凸塊下金屬層502b覆蓋在第一保護層40的部分表面、未被第一保護層40覆蓋的多個焊墊106的部分表面、蓋體結構30b的外側表面34b及蓋體結構30b的部分上表面36b,接著,再將作為導體層50b的重布線層504b設置在凸塊下金屬層502b上。最後,將多個凸塊60設置在覆蓋於蓋體結構30b的上表面36b的導體層50b以完成聲波元件2。於一實施例中,凸塊60可以是銅柱凸塊、銅柱或是C4凸塊。。此外要說明的是,在本發明中的聲波元件2的形成方式均是利用現有的半導體製程技術,其製程流程及構成聲波元件10的材料並不在本發明所要討論的技術方案中,故不多加陳述。
Please continue to refer to FIG. 2. The
此外,本發明再揭露一種聲波元件,如圖3所示。圖3是根據本發明所揭露的技術,表示聲波元件的再一實施例的截面示意圖。在圖3中,聲波元件2由基板10、電子元件20、蓋體結構30c、第一保護層40、導體層50c及多個凸
塊60所構成。基板10具有上表面102及下表面104,且於上表面102的周邊設有多個焊墊106。基板10、焊墊106及電子元件20的材料與前述相同不再多加陳述。電子元件20設置在基板10的上表面102,使得在基板10的上表面102的周邊的多個焊墊106環繞電子元件20。
In addition, the present invention discloses another acoustic wave element, as shown in FIG3. FIG3 is a cross-sectional schematic diagram showing another embodiment of an acoustic wave element according to the technology disclosed in the present invention. In FIG3, the
接著請繼續參考圖3。在具有電子元件20的基板10的上方設有蓋體結構30c,此蓋體結構30c與基板10之間的空間可定義為封閉式空腔32c,因此在基板10的上表面102的電子元件20設置在此封閉式空腔32c內。蓋體結構30c可以防止外在環境中的水氣進入封閉式空腔32c內,經由蓋體結構30c來增加電子元件20的使用壽命及整個聲波元件3的可靠性。
Please continue to refer to Figure 3. A
在本發明的另一實施例中,蓋體結構30c由基板10往上依序包括:第二保護層302c、第一絕緣層304c及第二絕緣層306c,其中,第二保護層302c覆蓋鄰近於電子元件20的多個焊墊106的部分表面及第二保護層302c設置在鄰近於電子元件20的基板10的部分上表面102。第一絕緣層304c設置在第二保護層302c的部分表面及覆蓋於多個焊墊106的部分表面,且在基板10上方的第二保護層302c及第一絕緣層304c未遮蓋在基板10上的電子元件20。第二絕緣層306c覆蓋在第一絕緣層304c的部分表面上,使得第二保護層302c及第一絕緣層304c所構成的結構定義為蓋體結構30c的側面牆體及第二絕緣層306b為蓋體結構30c的頂面牆體。同樣的,於一實施例中,蓋體結構30c中的第二絕緣層306c與第一絕緣層304c呈階梯結構。
In another embodiment of the present invention, the
請繼續參考圖3。聲波元件3還包括第一保護層40,同時覆蓋在基板10的部分上表面102及覆蓋在多個焊墊106的部分表面上,且將多個焊墊106的其他部分表面暴露出來也就是未被第一保護層40覆蓋的多個焊墊106的部分表
面。要說明的是,覆蓋在基板10的部分上表面102及覆蓋在多個焊墊106的部分表面上,且將多個焊墊106的其他部分表面暴露出來的第一保護層40與蓋體結構30c中的第二保護層302c是同時利用半導體製程所形成。接著,第一絕緣層304c設置在第一保護層40的部分表面且覆蓋多個焊墊106的部分表面,以暴露出未被第一保護層40覆蓋的多個焊墊106的部分表面。要說明的是,設置在第一保護層40的部分表面、且覆蓋在多個焊墊106的部分表面上的第一絕緣層304c與蓋體結構30c中的第一絕緣層304c是利用相同的半導體製程同時形成,且兩者具有相同的高度。
Please continue to refer to FIG. 3. The acoustic wave element 3 further includes a first
接著,將導體層50c覆蓋在第一絕緣層304c的部分表面、未被第一保護層40覆蓋的多個焊墊10的部分表面、蓋體結構30c的外側表面34c及蓋體結構30c的部分上表面36c。於一實施例中,導體層50c由凸塊下金屬層)502c及重布線層504c所構成,其中重布線層504c設置在凸塊下金屬層502c上。具體來說,先將導體層50c的凸塊下金屬層502c形成在第一絕緣層304c的部分表面、未被第一保護層40覆蓋的多個焊墊106的部分表面、蓋體結構30c的外側表面34c及蓋體結構30c的部分上表面36c,接著,再將導體層5c0的重布線層504c設置在凸塊下金屬層502c上。最後,將多個凸塊60設置在覆蓋於蓋體結構30c的上表面36c的導體層50c以完成聲波元件3,於一實施例中,凸塊60可以是銅柱凸塊、銅柱或是C4凸塊。
Next, the
綜上所述,根據本發明所揭露的聲波元件1、2、3,在後續的倒裝晶片的組裝過程中,於模流製程時利用導體層50a、50b、50c以增加凸塊60與焊墊106之間的強度,以解決當聲波元件1、2、3以倒裝方式進行封裝時,凸塊60因應力而斷裂時會連帶將焊墊106一併由基板10上拔起,而造成整個封裝結構毀損
的問題。另外,如上述圖1及圖2中的蓋體結構30a、30b及如圖3中的蓋體結構30c及設置在第一保護層40的部分表面且覆蓋多個焊墊106的部分表面的第一絕緣層304c可以阻隔外在環境的水氣進入空腔32a、32b、32c以增加聲波元件1、2、3整體在操作時的可靠度。
In summary, according to the
1:聲波元件 1: Acoustic wave components
10:基板 10: Substrate
102:上表面 102: Upper surface
104:下表面 104: Lower surface
106:焊墊 106: Welding pad
20:電子元件 20: Electronic components
30a:蓋體結構 30a: Cover structure
302a:第二保護層 302a: Second protection layer
304a:第一絕緣層 304a: First insulating layer
306a:第二絕緣層 306a: Second insulating layer
32a:封閉式空腔 32a: Closed cavity
34a:外側表面 34a: Outer surface
36a:上表面 36a: Upper surface
40:第一保護層 40: First protective layer
50a:導體層 50a: Conductor layer
502a:凸塊下金屬層 502a: metal layer under the bump
504a:重布線層 504a: Rewiring layer
60:凸塊 60: Bump
Claims (10)
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Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080099428A1 (en) * | 2003-05-26 | 2008-05-01 | Murata Manufacturing Co., Ltd. | Piezoelectric Electronic Component, Process for Producing the Same, and Communication Apparatus |
US20100038992A1 (en) * | 2008-02-08 | 2010-02-18 | Fujitsu Media Devices Limited | Surface acoustic wave device and method of fabricating the same |
US20140132368A1 (en) * | 2012-11-15 | 2014-05-15 | Nihon Dempa Kogyo Co., Ltd. | Piezoelectric component |
US20170288123A1 (en) * | 2014-09-19 | 2017-10-05 | Nihon Dempa Kogyo Co., Ltd. | Piezoelectric device and method for manufacturing the same |
US20180062618A1 (en) * | 2016-08-25 | 2018-03-01 | General Electric Company | Embedded rf filter package structure and method of manufacturing thereof |
WO2020146973A1 (en) * | 2019-01-14 | 2020-07-23 | 华为技术有限公司 | Surface acoustic wave filter and preparation method therefor, radio-frequency front-end chip, and mobile terminal |
-
2022
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Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080099428A1 (en) * | 2003-05-26 | 2008-05-01 | Murata Manufacturing Co., Ltd. | Piezoelectric Electronic Component, Process for Producing the Same, and Communication Apparatus |
US20100038992A1 (en) * | 2008-02-08 | 2010-02-18 | Fujitsu Media Devices Limited | Surface acoustic wave device and method of fabricating the same |
US20140132368A1 (en) * | 2012-11-15 | 2014-05-15 | Nihon Dempa Kogyo Co., Ltd. | Piezoelectric component |
US20170288123A1 (en) * | 2014-09-19 | 2017-10-05 | Nihon Dempa Kogyo Co., Ltd. | Piezoelectric device and method for manufacturing the same |
US20180062618A1 (en) * | 2016-08-25 | 2018-03-01 | General Electric Company | Embedded rf filter package structure and method of manufacturing thereof |
WO2020146973A1 (en) * | 2019-01-14 | 2020-07-23 | 华为技术有限公司 | Surface acoustic wave filter and preparation method therefor, radio-frequency front-end chip, and mobile terminal |
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