TWI841467B - Flatness determination module, display stream compression encoder and information processing device - Google Patents
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Abstract
本發明主要揭示用於整合在DSC編碼器之中的一種平坦度判斷模塊,其包括:一平坦度判斷單元、一計數單元以及一數據比對單元。依據本發明之設計,該平坦度判斷單元在對當前圖像切片數據完成一平坦度評估操作之後傳送一平坦度描述數據至該計數單元。接著,當對應該平坦度描述數據的一第一計數值和對應分割自一幀顯示畫面的複數個圖像切片的一第二計數值相同之時,該計數單元傳送一第一相等數據(equality flag)至數據比對單元,使該數據比對單元對所述當前圖像切片數據和下一個圖像切片數據進行數據比對,並在兩者具有相同數據的情況下,傳送一第二相等數據(equality flag)至一VLC熵編碼單元,使其直接以所述當前圖像切片數據的數據編碼流作為下一個圖像切片數據的數據編碼流。The present invention mainly discloses a flatness judgment module for integration in a DSC encoder, which comprises: a flatness judgment unit, a counting unit and a data comparison unit. According to the design of the present invention, the flatness judgment unit transmits a flatness description data to the counting unit after completing a flatness evaluation operation on the current image slice data. Then, when a first count value corresponding to the flatness description data and a second count value corresponding to a plurality of image slices divided from a display frame are the same, the counting unit transmits a first equality flag to a data comparison unit, so that the data comparison unit performs a data comparison on the current image slice data and the next image slice data, and when the two have the same data, transmits a second equality flag to a VLC entropy coding unit, so that it directly uses the data coding stream of the current image slice data as the data coding stream of the next image slice data.
Description
本發明係關於顯示裝置之技術領域,尤指用於整合在顯示流壓縮編碼器之中的一種平坦度判斷模塊。The present invention relates to the technical field of display devices, and more particularly to a flatness determination module integrated into a display stream compression encoder.
已知,視訊編碼又稱視訊壓縮,是巨量的視訊數據進行大比例壓縮,從而實現高效傳輸和存儲的技術。例如,MPEG-2、MPEG-4以及AVC/H.264已經在多種應用中被廣泛地使用。近年來,較新的視訊壓縮格式則為VP8、VP9及HEVC。As we all know, video coding, also known as video compression, is a technology that compresses a large amount of video data at a large scale to achieve efficient transmission and storage. For example, MPEG-2, MPEG-4, and AVC/H.264 have been widely used in many applications. In recent years, newer video compression formats are VP8, VP9, and HEVC.
進一步地,為了滿足高顯示解析度、高幀率的顯示需求,通過數位介面進行顯示數據傳輸的資料量也隨之越來越高。有鑑於此,電子視頻標準協會(Video Electronics Standards Association, VESA)和MIPI聯盟共同開發出一種顯示流壓縮(Display Stream Compression, DSC)編碼技術,用以將顯示數據壓縮後進行傳輸,達成低頻寬就可輸出高解析度內容,並且經壓縮後畫面表現上視覺無失真、低延遲的技術。Furthermore, in order to meet the display requirements of high display resolution and high frame rate, the amount of data transmitted through digital interfaces has also increased. In view of this, the Video Electronics Standards Association (VESA) and the MIPI Alliance have jointly developed a display stream compression (DSC) encoding technology to compress display data for transmission, achieving high-resolution content output at low bandwidth, and the compressed screen display is visually distortion-free and has low latency.
目前,DSC技術方案可以應用在各種視訊傳輸介面,包括:DisplayPort、HDMI、MIPI 等。圖1即顯示應用DSC技術方案的一顯示裝置的方塊圖。如圖1所示,該顯示裝置1a主要包括:一顯示面板11a、一顯示驅動電路12a以及一控制單元13a。正常工作時,該控制單元13a自一上位機10a(如:應用處理器或顯示處理器)接收一輸入顯示數據,並將該輸入顯示數據處理為一輸出顯示數據,使該顯示驅動電路12a依據該輸出顯示數據對該顯示面板11a進行顯示驅動。At present, the DSC technical solution can be applied to various video transmission interfaces, including DisplayPort, HDMI, MIPI, etc. FIG1 is a block diagram of a display device that applies the DSC technical solution. As shown in FIG1, the display device 1a mainly includes: a display panel 11a, a
如圖1所示,一個DSC系統2a包含:設置在該上位機10a(即,視訊傳送端)之中的一DSC編碼器21a與設置在該控制單元13a(即,視訊接收端) 中的一DSC解碼器22a。圖2為圖1所示之DSC編碼器的方塊圖。如圖2所示,該DSC編碼器21a包括:一色彩空間轉換單元210a、一數據緩存器211a、一預測/量化/重建單元212a、一行緩存器213a、一ICH單元214a、一速率控制單元215a、一平坦度判斷單元216a、一VLC熵編碼單元217a、一子流多工器218a、以及一速率緩存器219a,其中,ICH為indexed color history(歷史顏色索引)的縮寫,且VLC為variable-length coding(可變長度編碼)的縮寫。As shown in Fig. 1, a
為了加速編碼過程,一幀顯示畫面會被分割為複數個圖像切片(slice),以便於對每個圖像切片進行獨立編碼。值得說明的是,平坦度判斷(flatness determination)單元216a用以判斷每個圖像切片的平坦度,從而對應地輸出三種不同的平坦度指示(flatness indication),包括:veryflat、somewhatflat、平坦度檢測失敗。如此,依據該平坦度指示,該VLC熵編碼單元217a便可依據一壓縮比率將所述切片編碼後成一個編碼組。In order to speed up the encoding process, a display image is divided into a plurality of image slices so that each image slice can be encoded independently. It is worth noting that the flatness determination unit 216a is used to determine the flatness of each image slice, and accordingly outputs three different flatness indications, including: very flat, somewhat flat, and flatness detection failure. Thus, according to the flatness indication, the VLC
現有的DSC系統2a在編解碼方面相對成熟,解碼後的圖像數據與原圖像數據幾乎沒有差異。然而,由於該DSC編碼器21a將一幀顯示畫面分割為複數個圖像切片(slice)並對每個圖像切片進行獨立編碼操作,因此其存在功耗需要優化的問題。The existing
由上述說明可知,本領域亟需一種有助於降低DSC編碼器功耗的一種平坦度判斷模塊。From the above description, it can be seen that there is an urgent need in the art for a flatness determination module that can help reduce the power consumption of a DSC encoder.
本發明之主要目的在於提供一種用於整合在DSC編碼器之中的平坦度判斷模塊,其包括:一平坦度判斷單元、一計數單元以及一數據比對單元。若一幀顯示畫面的顯示數據平坦度高且連續性佳,則其分割自該顯示畫面的複數個圖像切片有很大機率會出現具有相同顯示數據的兩個或以上的圖像切片。在這個基礎上,本發明在平坦度判斷模塊之中增設數據比對單元和計數單元,利用計數單元將平坦度高連續性好的圖像切片篩選出來,並利用數據比對單元將平坦度高連續性好的圖像切片和其相鄰圖像切片進行數據比對。若比對結果顯示兩者具有相同數據,則通知DSC編碼器之中的VLC熵編碼單元直接以平坦度高連續性好的圖像切片的數據編碼流作為其相鄰圖像切片數據的數據編碼流。依此方式,減少了的VLC熵編碼單元對於圖像切片的顯示數據的編碼處理,在DSC編碼器的功耗降低上有明顯效果。The main purpose of the present invention is to provide a flatness judgment module for integration into a DSC encoder, which includes: a flatness judgment unit, a counting unit, and a data comparison unit. If the display data of a frame of a display screen has high flatness and good continuity, then there is a high probability that two or more image slices with the same display data will appear in the multiple image slices segmented from the display screen. On this basis, the present invention adds a data comparison unit and a counting unit in the flatness judgment module, uses the counting unit to screen out image slices with high flatness and good continuity, and uses the data comparison unit to perform data comparison between the image slices with high flatness and good continuity and their adjacent image slices. If the comparison result shows that the two have the same data, the VLC entropy coding unit in the DSC encoder is notified to directly use the data coding stream of the image slice with high flatness and good continuity as the data coding stream of its adjacent image slice data. In this way, the reduced VLC entropy coding unit's coding processing of the display data of the image slice has a significant effect on reducing the power consumption of the DSC encoder.
為達成上述目的,本發明提出所述平坦度判斷模塊的一實施例,其用以整合在一顯示流壓縮編碼器(DSC Encoder)之中,且包括用以對分割自一幀顯示畫面的複數個圖像切片數據進行一平坦度評估操作的一平坦度判斷單元;所述平坦度判斷模塊進一步包括一計數單元以及一數據比對單元; 其中,在對當前圖像切片數據完成所述平坦度評估操作之後,該平坦度判斷單元產生對應所述當前圖像切片數據的一平坦度描述數據; 其中,該計數單元對該平坦度描述數據和該複數個圖像切片數據分別執行一第一計數操作與一第二計數操作,且在產生自該第一計數操作的一第一計數值和產生自該第二計數操作的一第二計數值相同的情況下,傳送一第一相等數據(equality flag)至該數據比對單元; 其中,在接收該第一相等數據之後,該數據比對單元對所述當前圖像切片數據和下一個圖像切片數據進行一數據比對操作,且在所述當前圖像切片數據和所述下一個圖像切片數據具有相同數據的情況下,傳送一第二相等數據(equality flag)至該顯示流壓縮編碼器之中的一VLC熵編碼單元,使該VLC熵編碼單元直接以所述當前圖像切片數據的數據編碼流作為所述下一個圖像切片數據的數據編碼流。 To achieve the above-mentioned purpose, the present invention proposes an embodiment of the flatness judgment module, which is used to be integrated into a display stream compression encoder (DSC Encoder), and includes a flatness judgment unit for performing a flatness evaluation operation on a plurality of image slice data segmented from a display screen; the flatness judgment module further includes a counting unit and a data comparison unit; wherein, after completing the flatness evaluation operation on the current image slice data, the flatness judgment unit generates a flatness description data corresponding to the current image slice data; The counting unit performs a first counting operation and a second counting operation on the flatness description data and the plurality of image slice data, respectively, and transmits a first equality flag to the data comparison unit when a first counting value generated from the first counting operation and a second counting value generated from the second counting operation are the same; After receiving the first equality flag, the data comparison unit performs a data comparison operation on the current image slice data and the next image slice data, and transmits a second equality flag when the current image slice data and the next image slice data have the same data. flag) to a VLC entropy coding unit in the display stream compression codec, so that the VLC entropy coding unit directly uses the data coding stream of the current image slice data as the data coding stream of the next image slice data.
在一實施例中,該計數單元包括: 一第一計數器,用以對該平坦度描述數據執行所述第一計數操作以產生該第一計數值; 一第二計數器,用以對該複數個圖像切片數據執行所述第二計數操作以產生該第二計數值;以及 一計數值比對單元,耦接該第一計數器與該第二計數器,用以對該第一計數值與該第一計數值執行一比較操作,從而在該第一計數值和該第二計數值相同之時產生所述第一相等數據(equality flag)傳送至該數據比對單元。 In one embodiment, the counting unit includes: a first counter for performing the first counting operation on the flatness description data to generate the first counting value; a second counter for performing the second counting operation on the plurality of image slice data to generate the second counting value; and a counting value comparison unit, coupling the first counter and the second counter, for performing a comparison operation on the first counting value and the first counting value, thereby generating the first equality flag when the first counting value and the second counting value are the same and transmitting it to the data comparison unit.
在一實施例中,前述本發明之平坦度判斷模塊更包括耦接該計數值比對單元的一數據提供單元;其中,在接收該第一相等數據之後,該數據提供單元將所述當前圖像切片數據和所述下一個圖像切片數據傳送至該數據比對單元。In one embodiment, the flatness determination module of the present invention further includes a data providing unit coupled to the count value comparison unit; wherein, after receiving the first equal data, the data providing unit transmits the current image slice data and the next image slice data to the data comparison unit.
並且,本發明同時提出一種顯示流壓縮編碼器,用以整合在一視訊接收端之中,且具有一平坦度判斷模塊;其特徵在於,該平坦度判斷模塊包括用以對分割自一幀顯示畫面的複數個圖像切片數據進行一平坦度評估操作的一平坦度判斷單元,且進一步包括一計數單元以及一數據比對單元; 其中,在對當前圖像切片數據完成所述平坦度評估操作之後,該平坦度判斷單元產生對應所述當前圖像切片數據的一平坦度描述數據; 其中,該計數單元對該平坦度描述數據和該複數個圖像切片數據分別執行一第一計數操作與一第二計數操作,且在產生自該第一計數操作的一第一計數值和產生自該第二計數操作的一第二計數值相同的情況下,傳送一第一相等數據(equality flag)至該數據比對單元; 其中,在接收該第一相等數據之後,該數據比對單元對所述當前圖像切片數據和下一個圖像切片數據進行一數據比對操作,且在所述當前圖像切片數據和所述下一個圖像切片數據具有相同數據的情況下,傳送一第二相等數據(equality flag)至該顯示流壓縮編碼器之中的一VLC熵編碼單元,使該VLC熵編碼單元直接以所述當前圖像切片數據的數據編碼流作為所述下一個圖像切片數據的數據編碼流。 Furthermore, the present invention also proposes a display stream compression encoder for integration in a video receiving end, and having a flatness determination module; the flatness determination module includes a flatness determination unit for performing a flatness evaluation operation on a plurality of image slice data segmented from a display screen, and further includes a counting unit and a data comparison unit; wherein, after completing the flatness evaluation operation on the current image slice data, the flatness determination unit generates a flatness description data corresponding to the current image slice data; The counting unit performs a first counting operation and a second counting operation on the flatness description data and the plurality of image slice data, respectively, and transmits a first equality flag to the data comparison unit when a first counting value generated from the first counting operation and a second counting value generated from the second counting operation are the same; After receiving the first equality flag, the data comparison unit performs a data comparison operation on the current image slice data and the next image slice data, and transmits a second equality flag when the current image slice data and the next image slice data have the same data. flag) to a VLC entropy coding unit in the display stream compression codec, so that the VLC entropy coding unit directly uses the data coding stream of the current image slice data as the data coding stream of the next image slice data.
在一實施例中,該計數單元包括: 一第一計數器,用以對該平坦度描述數據執行所述第一計數操作以產生該第一計數值; 一第二計數器,用以對該複數個圖像切片數據執行所述第二計數操作以產生該第二計數值;以及 一計數值比對單元,耦接該第一計數器與該第二計數器,用以對該第一計數值與該第一計數值執行一比較操作,從而在該第一計數值和該第二計數值相同之時產生所述第一相等數據(equality flag)傳送至該數據比對單元。 In one embodiment, the counting unit includes: a first counter for performing the first counting operation on the flatness description data to generate the first counting value; a second counter for performing the second counting operation on the plurality of image slice data to generate the second counting value; and a counting value comparison unit, coupling the first counter and the second counter, for performing a comparison operation on the first counting value and the first counting value, thereby generating the first equality flag when the first counting value and the second counting value are the same and transmitting it to the data comparison unit.
在一實施例中,該平坦度判斷模塊更包括耦接該計數值比對單元的一數據提供單元;其中,在接收該第一相等數據之後,該數據提供單元將所述當前圖像切片數據和所述下一個圖像切片數據傳送至該數據比對單元。In one embodiment, the flatness determination module further includes a data providing unit coupled to the count value comparison unit; wherein, after receiving the first equal data, the data providing unit transmits the current image slice data and the next image slice data to the data comparison unit.
進一步地,本發明還提出一種資訊處理裝置,其具有一顯示裝置以及一視訊提供裝置,其中該顯示裝置包括:一顯示面板、一顯示驅動電路以及一控制單元,該控制單元自該視訊提供裝置接收一顯示數據流,該視訊提供裝置具有一顯示流壓縮編碼器用以產生所述顯示數據流,且該顯示流壓縮編碼器具有一平坦度判斷模塊;其特徵在於,該平坦度判斷模塊包括用以對分割自一幀顯示畫面的複數個圖像切片數據進行一平坦度評估操作的一平坦度判斷單元,且進一步包括一計數單元以及一數據比對單元; 其中,在對當前圖像切片數據完成所述平坦度評估操作之後,該平坦度判斷單元產生對應所述當前圖像切片數據的一平坦度描述數據; 其中,該計數單元對該平坦度描述數據和該複數個圖像切片數據分別執行一第一計數操作與一第二計數操作,且在產生自該第一計數操作的一第一計數值和產生自該第二計數操作的一第二計數值相同的情況下,傳送一第一相等數據(equality flag)至該數據比對單元; 其中,在接收該第一相等數據之後,該數據比對單元對所述當前圖像切片數據和下一個圖像切片數據進行一數據比對操作,且在所述當前圖像切片數據和所述下一個圖像切片數據具有相同數據的情況下,傳送一第二相等數據(equality flag)至該顯示流壓縮編碼器之中的一VLC熵編碼單元,使該VLC熵編碼單元直接以所述當前圖像切片數據的數據編碼流作為所述下一個圖像切片數據的數據編碼流。 Furthermore, the present invention also proposes an information processing device, which has a display device and a video providing device, wherein the display device includes: a display panel, a display driving circuit and a control unit, the control unit receives a display data stream from the video providing device, the video providing device has a display stream compression encoder for generating the display data stream, and the display stream compression encoder has a flatness judgment module; its characteristic is that the flatness judgment module includes a flatness judgment unit for performing a flatness evaluation operation on a plurality of image slice data divided from a frame of display screen, and further includes a counting unit and a data comparison unit; Wherein, after completing the flatness evaluation operation on the current image slice data, the flatness judgment unit generates a flatness description data corresponding to the current image slice data; Wherein, the counting unit performs a first counting operation and a second counting operation on the flatness description data and the plurality of image slice data respectively, and when a first counting value generated from the first counting operation and a second counting value generated from the second counting operation are the same, transmits a first equality flag to the data comparison unit; Wherein, after receiving the first equality data, the data comparison unit performs a data comparison operation on the current image slice data and the next image slice data, and when the current image slice data and the next image slice data have the same data, transmits a second equality flag flag) to a VLC entropy coding unit in the display stream compression codec, so that the VLC entropy coding unit directly uses the data coding stream of the current image slice data as the data coding stream of the next image slice data.
在一實施例中,該計數單元包括: 一第一計數器,用以對該平坦度描述數據執行所述第一計數操作以產生該第一計數值; 一第二計數器,用以對該複數個圖像切片數據執行所述第二計數操作以產生該第二計數值;以及 一計數值比對單元,耦接該第一計數器與該第二計數器,用以對該第一計數值與該第一計數值執行一比較操作,從而在該第一計數值和該第二計數值相同之時產生所述第一相等數據(equality flag)傳送至該數據比對單元。 In one embodiment, the counting unit includes: a first counter for performing the first counting operation on the flatness description data to generate the first counting value; a second counter for performing the second counting operation on the plurality of image slice data to generate the second counting value; and a counting value comparison unit, coupling the first counter and the second counter, for performing a comparison operation on the first counting value and the first counting value, thereby generating the first equality flag when the first counting value and the second counting value are the same and transmitting it to the data comparison unit.
在一實施例中,該平坦度判斷模塊更包括耦接該計數值比對單元的一數據提供單元;其中,在接收該第一相等數據之後,該數據提供單元將所述當前圖像切片數據和所述下一個圖像切片數據傳送至該數據比對單元。In one embodiment, the flatness determination module further includes a data providing unit coupled to the count value comparison unit; wherein, after receiving the first equal data, the data providing unit transmits the current image slice data and the next image slice data to the data comparison unit.
在可行的實施例中,該資訊處理裝置為選自於由智慧型電視、頭戴式顯示裝置、數位相機、車載娛樂系統、智慧型手機、智慧型手錶、平板電腦、桌上型電腦、筆記型電腦、一體式電腦、多媒體服務機台(KIOSK)、和視訊式門口機所組成群組之中的一種電子裝置。In a feasible embodiment, the information processing device is an electronic device selected from the group consisting of a smart TV, a head-mounted display device, a digital camera, a car entertainment system, a smart phone, a smart watch, a tablet computer, a desktop computer, a laptop computer, an all-in-one computer, a multimedia service machine (KIOSK), and a video door machine.
為使 貴審查委員能進一步瞭解本發明之結構、特徵、目的、與其優點,茲附以圖式及較佳具體實施例之詳細說明如後。In order to enable the Review Committee to further understand the structure, features, purpose, and advantages of the present invention, the following are attached with drawings and detailed descriptions of preferred specific embodiments.
圖3為包含本發明之一種顯示流壓縮編碼器(DSC編碼器)的顯示裝置的方塊圖。如圖3所示,該顯示裝置1主要包括:一顯示面板11、一顯示驅動電路12以及一控制單元13。正常工作時,該控制單元13自一上位機10(如:應用處理器或顯示處理器)接收一輸入顯示數據,並將該輸入顯示數據處理為一輸出顯示數據,使該顯示驅動電路12依據該輸出顯示數據對該顯示面板11進行顯示驅動。進一步地,如圖3所示,一個DSC系統2包含:設置在該上位機10(即,視訊傳送端)之中的一DSC編碼器21與設置在該控制單元13(即,視訊接收端) 中的一DSC解碼器22。並且,圖4為圖3所示之DSC編碼器的方塊圖。如圖4所示,該DSC編碼器21包括:一色彩空間轉換單元210、一數據緩存器211、一預測/量化/重建單元212、一行緩存器213、一ICH單元214、一速率控制單元215、一VLC熵編碼單元217、一子流多工器218、一速率緩存器219、以及本發明提出的一平坦度判斷模塊216。FIG3 is a block diagram of a display device including a display stream compression encoder (DSC encoder) of the present invention. As shown in FIG3, the display device 1 mainly includes: a
圖5為本發明之一種平坦度判斷模塊的方塊圖。如圖4與圖5所示,本發明之平坦度判斷模塊216用以整合在該DSC編碼器21之中,且包括用以對分割自一幀顯示畫面的複數個圖像切片(slice)數據進行一平坦度評估操作的一平坦度判斷單元2160。依據本發明之設計,所述平坦度判斷模塊216係進一步包括一計數單元2161以及一數據比對單元2162,其中該計數單元2161包括一第一計數器2163、一第二計數器2164以及一計數值比對單元2165。更詳細地說明,在對當前圖像切片數據完成所述平坦度評估操作之後,該平坦度判斷單元2160產生對應所述當前圖像切片數據的一平坦度描述數據。熟悉DSC編碼器之設計的電子工程師應知道,該平坦度判斷單元2160係依據當前圖像切片數據和其相鄰的圖像切片數據(即,下一個圖像切片數據)之間的平坦度關係來對應地輸出三種不同的平坦度指示(flatness indication),包括:veryflat、somewhatflat、平坦度檢測失敗。如此,依據該平坦度指示,該VLC熵編碼單元217便可依據一壓縮比率將所述切片編碼後成一個編碼組。FIG5 is a block diagram of a flatness determination module of the present invention. As shown in FIG4 and FIG5, the
於本發明中,係以veryflat的旗標(flag)數據作為所述平坦度描述數據。如此,該計數單元2161便可利用其第一計數器2163對該平坦度描述數據執行一第一計數操作以產生一第一計數值,且利用其第二計數器2164對該複數個圖像切片數據執行一第二計數操作以產生一第二計數值。最後,該計數單元2161利用其計數值比對單元2165對該第一計數值與該第一計數值執行一比較操作,並在該第一計數值和該第二計數值相同之時產生一第一相等數據(equality flag)傳送至該數據比對單元2162。In the present invention, the flag data of veryflat is used as the flatness description data. Thus, the
如圖5所示,本發明還設置一個數據提供單元2166,其耦接於該計數值比對單元2165和該數據比對單元2162之間。如此,在接收該第一相等數據之後,該數據提供單元2166將所述當前圖像切片數據和所述下一個圖像切片數據傳送至該數據比對單元2162,該數據比對單元2162接著對所述當前圖像切片數據和下一個圖像切片數據進行一數據比對操作。最終,在所述當前圖像切片數據和所述下一個圖像切片數據具有相同數據的情況下,該數據比對單元2162傳送一第二相等數據(equality flag)至該217VLC熵編碼單元,使該VLC熵編碼單元217直接以所述當前圖像切片數據的數據編碼流作為所述下一個圖像切片數據的數據編碼流。As shown in FIG5 , the present invention further provides a
補充說明的是,若一幀顯示畫面的顯示數據平坦度高且連續性佳,則其分割自該顯示畫面的複數個圖像切片有很大機率會出現具有相同顯示數據的兩個或以上的圖像切片(slice)。在此基礎上,當該平坦度判斷單元2160輸出veryflat之平坦度指示(flatness indication)時,表示當前圖像切片的顯示數據與其相鄰的圖像切片的顯示數據之間差異很小,兩者有可能具有相同的顯示數據。因此,本發明在平坦度判斷模塊216之中增設一數據比對單元2162和一計數單元2161,以利用該計數單元2161將平坦度高連續性好的圖像切片篩選出來,並利用該數據比對單元2162將平坦度高連續性好的圖像切片和其相鄰圖像切片進行數據比對。若比對結果顯示兩者具有相同數據,則通知DSC編碼器21之中的VLC熵編碼單元217直接以平坦度高連續性好的圖像切片的數據編碼流作為其相鄰圖像切片數據的數據編碼流。依此方式,減少了的VLC熵編碼單元217對於圖像切片的顯示數據的編碼處理,在DSC編碼器21的功耗降低上有明顯效果。It is to be noted that if the display data of a display screen has high flatness and good continuity, then the multiple image slices divided from the display screen are likely to have two or more image slices with the same display data. Based on this, when the
進一步地,依據本發明之設計,除了直接以所述當前圖像切片數據的數據編碼流作為所述下一個圖像切片數據的數據編碼流以外,同時也將所述當前圖像切片數據的veryflat(即,平坦度描述數據)作為下一個圖像切片數據的veryflat,以利於下一個圖像切片數據和下下一個圖像切片數據進行前述之計數值比較程序。Furthermore, according to the design of the present invention, in addition to directly using the data coding stream of the current image slice data as the data coding stream of the next image slice data, the veryflat (i.e., flatness description data) of the current image slice data is also used as the veryflat of the next image slice data, so as to facilitate the aforementioned count value comparison procedure between the next image slice data and the next-next image slice data.
如此,上述已完整且清楚地說明本發明之一種平坦度判斷模塊;並且,經由上述可得知本發明具有下列優點:Thus, the above has completely and clearly described a flatness determination module of the present invention; and, from the above, it can be known that the present invention has the following advantages:
(1)本發明揭示一種平坦度判斷模塊,其用於整合在一DSC編碼器之中。本發明之平坦度判斷模塊可以將平坦度高連續性好的圖像切片篩選出來,並將平坦度高連續性好的圖像切片和其相鄰圖像切片進行數據比對。若比對結果顯示兩者具有相同數據,則通知DSC編碼器之中的VLC熵編碼單元直接以平坦度高連續性好的圖像切片的數據編碼流作為其相鄰圖像切片數據的數據編碼流。依此方式,減少了的VLC熵編碼單元對於圖像切片的顯示數據的編碼處理,在DSC編碼器的功耗降低上有明顯效果。(1) The present invention discloses a flatness determination module for integration into a DSC encoder. The flatness determination module of the present invention can screen out image slices with high flatness and good continuity, and perform data comparison between the image slices with high flatness and good continuity and their adjacent image slices. If the comparison result shows that the two have the same data, the VLC entropy coding unit in the DSC encoder is notified to directly use the data coding stream of the image slice with high flatness and good continuity as the data coding stream of the data of its adjacent image slices. In this way, the reduced coding processing of the display data of the image slice by the VLC entropy coding unit has a significant effect on reducing the power consumption of the DSC encoder.
(2)本發明還揭示一種資訊處理裝置,其具有一顯示裝置以及一視訊提供裝置,其中該顯示裝置包括:一顯示面板、一顯示驅動電路以及一控制單元,該控制單元自該視訊提供裝置接收一顯示數據流,該視訊提供裝置具有一顯示流壓縮編碼器用以產生所述顯示數據流;其特徵在於,該顯示流壓縮編碼器具有本發明所提出的平坦度判斷模塊。在可行的實施例中,該資訊處理裝置為選自於由智慧型電視、頭戴式顯示裝置、數位相機、車載娛樂系統、智慧型手機、智慧型手錶、平板電腦、桌上型電腦、筆記型電腦、一體式電腦、多媒體服務機台(KIOSK)、和視訊式門口機所組成群組之中的一種電子裝置。(2) The present invention also discloses an information processing device having a display device and a video providing device, wherein the display device includes: a display panel, a display driving circuit and a control unit, the control unit receives a display data stream from the video providing device, and the video providing device has a display stream compression encoder for generating the display data stream; its characteristic is that the display stream compression encoder has the flatness judgment module proposed by the present invention. In a feasible embodiment, the information processing device is an electronic device selected from the group consisting of a smart TV, a head-mounted display device, a digital camera, a car entertainment system, a smart phone, a smart watch, a tablet computer, a desktop computer, a laptop computer, an all-in-one computer, a multimedia service machine (KIOSK), and a video door machine.
必須加以強調的是,前述本案所揭示者乃為較佳實施例,舉凡局部之變更或修飾而源於本案之技術思想而為熟習該項技藝之人所易於推知者,俱不脫本案之專利權範疇。It must be emphasized that what is disclosed in the above-mentioned case is a preferred embodiment. Any partial changes or modifications that are derived from the technical ideas of this case and are easily inferred by people familiar with the art do not deviate from the scope of the patent rights of this case.
綜上所陳,本案無論目的、手段與功效,皆顯示其迥異於習知技術,且其首先發明合於實用,確實符合發明之專利要件,懇請 貴審查委員明察,並早日賜予專利俾嘉惠社會,是為至禱。In summary, this case shows that its purpose, means and effects are very different from the known technology, and it is the first invention that is practical and indeed meets the patent requirements for invention. We sincerely request the review committee to examine this carefully and grant a patent as soon as possible to benefit the society. This is our utmost prayer.
1a:顯示裝置
10a:上位機
11a:顯示面板
12a:顯示驅動電路
13a:控制單元
2a:DSC系統
21a:DSC編碼器
210a:色彩空間轉換單元
211a:數據緩存器
212a:預測/量化/重建單元
213a:行緩存器
214a:ICH單元
215a:速率控制單元
216a:平坦度判斷單元
217a:VLC熵編碼單元
218a:子流多工器
219a:速率緩存器
22a:DSC解碼器
1:顯示裝置
10:上位機
11:顯示面板
12:顯示驅動電路
13:控制單元
2:DSC系統
21:DSC編碼器
210:色彩空間轉換單元
211:數據緩存器
212:預測/量化/重建單元
213:行緩存器
214:ICH單元
215:速率控制單元
216:平坦度判斷模塊
2160:平坦度判斷單元
2161:計數單元
2162:數據比對單元
2163:第一計數器
2164:第二計數器
2165:計數值比對單元
2166:數據提供單元
217:VLC熵編碼單元
218:子流多工器
219:速率緩存器
22:DSC解碼器
1a:
圖1為應用DSC技術方案的一顯示裝置的方塊圖; 圖2為圖1所示之DSC編碼器的方塊圖; 圖3為包含本發明之一種顯示流壓縮編碼器的顯示裝置的方塊圖; 圖4為圖3所示之DSC編碼器的方塊圖;以及 圖5為本發明之一種平坦度判斷模塊的方塊圖。 FIG. 1 is a block diagram of a display device applying the DSC technical solution; FIG. 2 is a block diagram of the DSC encoder shown in FIG. 1; FIG. 3 is a block diagram of a display device including a display stream compression encoder of the present invention; FIG. 4 is a block diagram of the DSC encoder shown in FIG. 3; and FIG. 5 is a block diagram of a flatness determination module of the present invention.
211:數據緩存器 211: Data Cache
216:平坦度判斷模塊 216: Flatness determination module
2160:平坦度判斷單元 2160: Flatness determination unit
2161:計數單元 2161: Counting unit
2162:數據比對單元 2162: Data matching unit
2163:第一計數器 2163:First counter
2164:第二計數器 2164: Second counter
2165:計數值比對單元 2165:Count value comparison unit
2166:數據提供單元 2166:Data provider unit
217:VLC熵編碼單元 217: VLC entropy coding unit
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CN104718753A (en) * | 2012-10-03 | 2015-06-17 | 美国博通公司 | Bounded rate compression with rate control for slices |
TW201705761A (en) * | 2015-07-24 | 2017-02-01 | 矽創電子股份有限公司 | Prediction method of image coding and decoding does not need to provide additional information to the decoding circuit regarding a prediction selection to thereby reduce data quantity provided to the decoding circuit |
CN109618157A (en) * | 2018-12-29 | 2019-04-12 | 东南大学 | A hardware implementation system and method for video display stream compression coding |
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CN104718753A (en) * | 2012-10-03 | 2015-06-17 | 美国博通公司 | Bounded rate compression with rate control for slices |
TW201705761A (en) * | 2015-07-24 | 2017-02-01 | 矽創電子股份有限公司 | Prediction method of image coding and decoding does not need to provide additional information to the decoding circuit regarding a prediction selection to thereby reduce data quantity provided to the decoding circuit |
CN109618157A (en) * | 2018-12-29 | 2019-04-12 | 东南大学 | A hardware implementation system and method for video display stream compression coding |
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