TWI831155B - Method for improving electrostatic discharge capacity of driving device and corresponding driving device - Google Patents

Abstract

A driving device comprises a circuit substrate and a driving chip. The circuit substrate includes a chip arrangement area, a first transmission path connected to a power end, and a second transmission path connected to a ground end. The driving chip includes a plurality of connecting pads and a plurality of discharge circuit respectively connected to the connecting pads. The connecting pads respectively couple to arrangement pads formed on the chip arrangement area. Wherein each of the positive end of the discharge circuit are connected to the power end via a first electrostatic discharge path. Wherein the first transmission path is shunt with the first electrostatic discharge path.

Description

Methods to improve the electrostatic discharge capability of driving devices and corresponding driving devices

The present invention relates to a method for improving the electrostatic discharge capability of a driving device and a corresponding driving device.

Static electricity protection capability is one of the most important indicators for improving product safety and durability. In fields such as displays, the driving chip on the driving device that serves as a bridge connecting the glass substrate and the main circuit board is very susceptible to damage by static electricity (for example, from the production line environment, assembly process or usage environment). Therefore, an electrostatic protection circuit is usually provided in the driver chip to protect the driver chip. However, as the number of outputs/inputs of the driver chip increases, the area of the required electrostatic protection circuit will also increase (for example, the area increases due to the increase in the line width of the wiring within the chip), thereby increasing the cost of the driver chip.

Therefore, how to control the cost of electrostatic protection as the input/output of driver chips increases day by day will be a major issue to be developed in this field.

One of the objectives of the present invention is to improve the anti-static/electrostatic discharge capability of the entire driving device without increasing the anti-static/electrostatic discharge capability of the driving chip body (that is, without increasing the manufacturing cost of the driving chip).

The invention provides a driving device, which includes a circuit substrate and a driving chip. The circuit substrate includes a chip setting area, a first transmission path connected to a power terminal, and a second transmission path connected to a ground terminal. The driving chip includes a plurality of connection pads and a plurality of electrostatic discharge circuits respectively coupled to the connection pads. A plurality of connection pads are respectively coupled to a corresponding plurality of setting pads on the chip setting area. A first electrostatic discharge path connects the positive terminals of the electrostatic discharge circuits to the power terminal, and a second electrostatic discharge path connects the negative terminals of the electrostatic discharge circuits to the ground terminal. Wherein, the first transmission path and the first electrostatic discharge path are arranged in parallel, and the second transmission path and the second electrostatic discharge path are arranged in parallel.

The present invention provides a method for improving the electrostatic discharge capability of a driving device, which includes: arranging a driving chip on a chip setting area of a circuit substrate, wherein the driving chip has a plurality of setting pads respectively coupled to a plurality of setting pads on the chip setting area. Connection pads, and a plurality of electrostatic discharge circuits respectively coupled to the connection pads; a first transmission path connected to a power terminal and a second transmission path connected to a ground terminal are formed on the circuit substrate; the first transmission path and A first electrostatic discharge path in the driver chip that connects the positive terminals of the electrostatic discharge circuits to the power terminal is arranged in parallel; and the second transmission path is connected to the negative terminals of the electrostatic discharge circuits in the driver chip. A second electrostatic discharge path at the ground end is arranged in parallel.

The first transmission path and the second transmission path on the circuit substrate are arranged in parallel with the first electrostatic discharge path and the second electrostatic discharge path in the driving chip to reduce the risk of the first electrostatic discharge path and/or the second electrostatic discharge path. impedance. This achieves the purpose of improving the overall anti-static/electrostatic discharge capability of the drive device.

Any reference herein to elements using designations such as "first," "second," etc. generally does not limit the number or order of these elements. Rather, these names are used herein as a convenient way to distinguish between two or more elements or instances of elements. Therefore, it should be understood that the names "first," "second," etc. in the claims do not necessarily correspond to the same names in the written description. Furthermore, it should be understood that reference to first and second elements does not imply that only two elements may be employed or that the first element must precede the second element. The words "includes", "includes", "has", "contains", etc. used in this article are all open terms, which mean including but not limited to.

The term "coupled" is used herein to refer to a direct or indirect electrical coupling between two structures. For example, in one example of indirect electrical coupling, one structure may be coupled to another structure via passive components such as resistors, capacitors, or inductors.

In the present invention, the words "exemplary" and "for example" are used to mean "serving as an example, instance or illustration". Any implementation or aspect described herein as "exemplary," "such as" or "such as" is not necessarily to be construed as preferred or advantageous over other aspects of the invention. The terms "approximately" and "approximately" as used herein with respect to a specified value or characteristic are intended to mean within a certain numerical value (e.g., 10%) of the specified value or characteristic.

Please refer to FIG. 1 , the driving device 10 of the present invention can be used in a display, for example. Specifically, the driving device 10 may have a plurality of input terminals Pin and a plurality of output terminals Pout. The input terminals Pin and the output terminals Pout are respectively coupled to corresponding connection pads/pins Pad of the driving chip 101 through signal transmission lines TL. When the driving device 10 is configured in a display, the input terminal Pin and the output terminal Pout are respectively connected to the main circuit board 20 and the display panel (glass substrate) 30 of the display. However, the driving device 10 of the present invention should not be limited to its application scope, and any suitable application fields should fall within the scope of the present invention. In addition, the number of input terminals Pin and output terminals Pout and the layout of the signal transmission line TL shown in FIG. 1 are only examples and are not intended to limit the present invention.

Please refer to FIG. 2 , which illustrates the driving device 10 of the present invention, including a circuit substrate 102 and a driving chip 101 . The circuit substrate 102 includes a chip setting area 1021, a first transmission path L1 connected to a power terminal PW, and a second transmission path L2 connected to the ground terminal GN. The driving chip 101 includes a plurality of connection pads Pad1, ..., Padn and a plurality of electrostatic discharge circuits ESD1, ..., ESDn respectively coupled to the connection pads. The plurality of connection pads Pad1,...,Padn are respectively coupled to the corresponding plurality of setup pads on the chip setup area 1021 (overlapping with the plurality of connection pads Pad1,...,Padn in Figure 2). However, the plurality of setup pads may be larger or smaller than the plurality of setup pads depending on the situation. Connect pads Pad1, …, Padn). Among them, the first electrostatic discharge path L3 connects the positive terminals ESDp1, ..., ESDpn of the electrostatic discharge circuits ESD1, ..., ESDn to the power terminal PW. Wherein, the first transmission path L1 and the first electrostatic discharge path L3 are arranged in parallel.

Specifically, the circuit substrate 102 may be a rigid circuit board (for example, a printed circuit board with a glass fiber substrate) or a flexible circuit board (for example, a flexible circuit board for a chip-on-film COF structure). The driver chip 101 can be disposed in the chip setting area 1021 through soldering or pin bonding. It should be noted that the present invention is not limited to the number of connection pads and the number of electrostatic discharge circuits on the driving chip 101. The example drawn in FIG. 1 is only used to illustrate the number of connection pads and electrostatic discharge circuits on the driving chip 101. The number of circuits can be selected from different models/specifications according to actual needs. The chip setting area 1021 can also adjust the size, style, arrangement of setting pads, etc. of the chip setting area 1021 according to the selected packaging method, output/input pin definition, and shape of the driver chip 101 . In addition, the first transmission path L1 and the second transmission path L2 on the circuit substrate 102 may be formed, for example, by generating traces on the circuit substrate or directly connecting them using wires.

The first transmission path L1 and the second transmission path L2 on the circuit substrate 102 and the first electrostatic discharge path L3 on the driving chip 101 can be simplified as shown in FIG. 3 . Referring to FIG. 3, the connection pad Padn is coupled to the electrostatic discharge circuit ESDn. The electrostatic discharge circuit ESDn may be two diodes DPn and DNn, and the connection pad Padn is coupled to the anode (Anode) of the diode DPn and the cathode (Cathode) of the diode DNn. In addition, in one embodiment, the driving chip 101 of the driving device 10 further includes a second electrostatic discharge path L4 connecting the negative terminals ESDn1, ..., ESDnn of the electrostatic discharge circuits ESD1, ..., ESDn to the ground terminal GN, and the second electrostatic discharge path L4 The transmission path L2 and the second electrostatic discharge path L4 are provided in parallel. However, the electrostatic discharge circuit ESDn of the present invention should not be limited to that shown in FIG. 3 , and those skilled in the art can arbitrarily adjust/add active components or passive components. Moreover, the electrostatic discharge circuit components may also use, for example, transient suppression diodes (TVS) or other circuit components and/or structures commonly known in the art.

The trigger voltage TV1 of the electrostatic discharge circuit ESD1 and the trigger voltage TVn of the electrostatic discharge circuit ESDn are expressed by the following formula: in, , Expressed as the conduction voltage of diodes DP1 and DPn, is the clamping voltage of the electrostatic discharge circuit. Turn-on voltage of DP1 and DPn , and/or the clamping voltage of the electrostatic discharge circuit It can be preset through chip process parameters or component parameters. According to the above formula, it can be known that the trigger voltages TV1-TVn of the electrostatic discharge circuits ESD1-ESDn will be related to the resistance of the electrostatic current conduction paths of the electrostatic discharge circuits ESD1-ESDn. In other words, when static electricity EC occurs on any one of the electrostatic discharge circuits ESD1-ESDn or its corresponding connection pad, the electrostatic current At least a part of the first transmission path and the first electrostatic discharge path L3 flows out from the ground end. For example, as shown in Figure 4A, when static electricity EC occurs in the electrostatic discharge circuit ESD1, the electrostatic current The electrostatic current flows through a section L11 of the first transmission path L1 and a section L31 of the first electrostatic discharge path L3. The impedance flowing through the path is the impedance of a section L11 of the first transmission path L1 The impedance of a section L31 of the first parallel electrostatic discharge path L3 . As shown in Figure 4B, when static electricity EC occurs in the electrostatic discharge circuit ESDn, the electrostatic current The electrostatic current flows through all of the first transmission path L1 and part of the first electrostatic discharge path L3. The impedance flowing through the path is the impedance of the first transmission path L1 Impedance of parallel first electrostatic discharge path L3 . It should be noted that the above examples of static electricity dissipation paths are only examples. Some static electricity conditions (for example, the relative voltage direction of static electricity and contact pads, the location where static electricity occurs, etc.) can also be transmitted through the second transmission path L2 and the second electrostatic discharge path L4 Guidance. I won’t go into details here. In one embodiment, the electrostatic current flows into the electrostatic protection circuit (for example, a circuit such as a power clamp) and then flows out through the ground terminal (the one with the lowest/lower potential relative to the input terminal of the electrostatic protection circuit).

As mentioned above, the first electrostatic discharge path L3 and the second electrostatic discharge path L4 in the driving chip 101 have been formed during the chip manufacturing/packaging, so the impedances of the first electrostatic discharge path L3 and the second electrostatic discharge path L4 are equal to There is no way to adjust it according to needs. It can only be adjusted by replacing components. This is because it is difficult to adjust the impedance values of the first electrostatic discharge path L3 and the second electrostatic discharge path L4. And if the impedance values of the first electrostatic discharge path L3 and the second electrostatic discharge path L4 are adjusted to required impedances, a larger chip area or other costs may be required, for example. Therefore, the electrostatic current can be reduced by adjusting the impedances of the first transmission path L1 and the second transmission path L2 on the circuit substrate 102 and connecting them in parallel with the first electrostatic discharge path L3 and the second electrostatic discharge path L4 respectively. The impedance value of the flow path. In one embodiment, the impedance of the first transmission path L1 is less than the impedance of the first electrostatic discharge path L3, and the impedance of the second transmission path L2 is less than the impedance of the second electrostatic discharge path L4. In one embodiment, the material of the first transmission path L1 and the second transmission path L2 is preferably a good conductor such as copper with good electrical conductivity.

In one embodiment, as shown in FIG. 5 , the driving chip 101 further includes a plurality of discharge connection pads EPad1,..., EPadn. The discharge connection pads EPad1,..., EPadn are respectively connected to the positive terminals ESDp1,..., ESDpn of the electrostatic discharge circuit. The discharge connection pads EPad1,..., EPadn are respectively connected to the first transmission path L1. In addition, for the ground terminal, the driving chip 101 can also be provided with ground connection pads GPad1,..., GPadn and connect the ground connection pads GPad1,..., GPadn in series through the second transmission path L2. Through this arrangement, the internal circuits of the driving chip 101 can be connected to the traces arranged on the circuit substrate 102 (for example, the first transmission path L1 connected to the power terminal and/or the second transmission path L2 connected to the ground terminal). For this embodiment, the chip setting area 1021 of the circuit substrate 102 can also be provided with setting pads (not shown in the figure) corresponding to the discharge connection pads EPad1,..., EPadn and the ground connection pads GPad1,..., GPadn, and soldered through other methods. Connect the laid out traces to the discharge connection pads EPad1,…, EPadn and the ground connection pads GPad1,…, GPadn. It should be noted that the number and layout of the discharge connection pads EPad1,..., EPadn and the ground connection pads GPad1,..., GPadn shown in Figure 5 are only examples and are not intended to limit the present invention.

On the other hand, please refer to the figures. FIG. 6 illustrates a method for improving the electrostatic discharge capability of a driving device, including: Step S1 of arranging a driving chip on a chip setting area of a circuit substrate, wherein the driving chip has a chip configuration that is respectively coupled to the chip setting. A plurality of connection pads are provided on the area, and a plurality of electrostatic discharge circuits are respectively coupled to the connection pads. It should be noted that this method is not limited to the method of disposing the driver chip on the chip setting area of the circuit substrate (for example, soldering or pin insertion, etc.). Preferably, after the driver chip is placed on the chip setting area of the circuit substrate, the input/output (connection pad) of the driver chip will be connected to the preset lines on the circuit substrate, so that the driver chip can be used normally.

Step S2 forms a first transmission path connected to the power terminal and a second transmission path connected to the ground terminal on the circuit substrate; Step S3 connects the first transmission path and the first electrostatic terminal in the driver chip to connect the positive terminal of the electrostatic discharge circuit to the power terminal. The discharge paths are arranged in parallel; and step S4 is to set the second transmission path in parallel with the second electrostatic discharge path in the driver chip that connects the negative end of the electrostatic discharge circuit to the ground. It should be noted that the present invention should not be limited to the sequence of method steps. Anyone with ordinary knowledge in the art can adjust the technical sequence described in the present invention according to the circuit manufacturing technology. For example, the first transmission path and the second transmission path can also be formed on the circuit substrate before the driving chip is disposed on the circuit substrate. After the driving chip is disposed on the circuit substrate, the first transmission path is connected to the first transmission path. The electrostatic discharge path is provided in parallel, and (simultaneously) the second transmission path is provided in parallel with the second electrostatic discharge path. Therefore, any person with ordinary skill in the art who makes appropriate adjustments to the implementation sequence of the method of the present invention based on the content of this article should fall within the scope of the present invention.

The previous description of the invention is provided to enable a person of ordinary skill in the art to make or practice the invention. Various modifications to the invention will be apparent to those skilled in the art, and the general principles defined herein may be applied to other changes without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the examples described herein but is to be accorded the widest scope consistent with the principles and novel features of the invention herein.

10:Driving device 20:Main circuit board 30:Display panel 101: Driver chip 102:Circuit substrate 1021: Chip setting area L1: first transmission path L2: Second transmission path L3: First electrostatic discharge path L4: Second electrostatic discharge path ESD1, …, ESDn: electrostatic discharge circuit ESDp1, … ESDpn: positive end ESDn1, … ESDnn: negative terminal EC: static electricity EPad1, …, EPadn: discharge connection pad GPad1, …, GPadn: Ground connection pads Pad1, …, Padn: connection pad Pin: input terminal Pout: output terminal PW: power terminal GN: ground terminal TL: signal transmission line S1, S2, S3, S4: steps

FIG. 1 is a schematic diagram of a driving device used in a display according to an embodiment of the present invention.

FIG. 2 is a schematic diagram of a circuit substrate and a driving chip installed in a driving device in an embodiment of the present invention.

FIG. 3 is a circuit diagram of an electrostatic discharge path in an embodiment of the present invention.

4A-B are circuit diagrams showing the relationship between electrostatic discharge paths and static electricity generation locations in an embodiment of the present invention.

FIG. 5 is a schematic diagram of a circuit substrate and a driving chip installed in a driving device in an embodiment of the present invention.

Figure 6 is a flow chart of a driving method in an embodiment of the present invention.

The drawings are presented to help describe various aspects of the present invention. In order to simplify the drawings and highlight the content to be presented in the drawings, well-known structures or elements in the drawings may be drawn in a simple schematic manner or presented in an omitted manner. . For example, the number of elements may be singular or plural. The drawings are provided solely to illustrate these aspects and not to limit them.

10:Driving device

101: Driver chip

102:Circuit substrate

1021: Chip setting area

L1: first transmission path

L2: Second transmission path

ESD1,...,ESDn: electrostatic discharge circuit

PW: power terminal

GN: ground terminal

Claims (10)

A driving device includes: a circuit substrate, including: a chip setting area; and a first transmission path connected to a power terminal; and a driving chip, including: a plurality of connection pads, respectively coupled to corresponding ones on the chip setting area. A plurality of placement pads; and a plurality of electrostatic discharge circuits, respectively coupled to the connection pads; wherein, a first electrostatic discharge path connects the positive terminals of the electrostatic discharge circuits to the power terminal; wherein, the first transmission path It is arranged in parallel with the first electrostatic discharge path. The driving device of claim 1, wherein the impedance of the first transmission path is smaller than the impedance of the first electrostatic discharge path. The driving device according to claim 1, wherein the circuit substrate is a flexible circuit board. The driving device of claim 1, wherein when static electricity occurs on any one of the electrostatic discharge circuits, the electrostatic current flows into an electrostatic protection circuit through at least a part of the first transmission path and the first electrostatic discharge path. , and then flows out through the end of the earth. The driving device of claim 1, wherein the circuit substrate further includes a second transmission path connected to a ground terminal; and the driving chip further includes a second transmission path connecting the negative terminals of the electrostatic discharge circuits to the ground terminal. An electrostatic discharge path; the second transmission path and the second electrostatic discharge path are arranged in parallel. The driving device of claim 1, wherein the driving chip further includes a plurality of discharge connection pads respectively connected to the positive terminals of the electrostatic discharge circuits; the discharge connection pads are respectively connected to the first transmission path. A method for improving the electrostatic discharge capability of a driving device includes: arranging a driving chip on a chip setting area of a circuit substrate, wherein the driving chip has a plurality of connection pads respectively coupled to a plurality of setting pads on the chip setting area, And a plurality of electrostatic discharge circuits respectively coupled to the connection pads; a first transmission path connected to a power terminal and a second transmission path connected to a ground terminal are formed on the circuit substrate; the first transmission path and the driver are formed A first electrostatic discharge path in the chip that connects the positive terminals of the electrostatic discharge circuits to the power terminal is arranged in parallel; and the second transmission path and the driver chip connect the negative terminals of the electrostatic discharge circuits to the ground. A second electrostatic discharge path at the terminals is arranged in parallel. The method of claim 7, wherein the impedance of the first transmission path is less than the impedance of the first electrostatic discharge path, and the impedance of the second transmission path is less than the impedance of the second electrostatic discharge path. The method of claim 7, wherein when static electricity occurs on any one of the electrostatic discharge circuits, the electrostatic current flows into an electrostatic protection circuit through at least a part of the first transmission path and the first electrostatic discharge path, Then it flows out through the end of the earth. The method of claim 7, wherein the driver chip further includes a plurality of discharge connection pads respectively connected to positive terminals of the electrostatic discharge circuits; the discharge connection pads are respectively connected to the first transmission path.

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