CN1154187C - Ball array packaging device for reducing interference signal - Google Patents

Abstract

The invention discloses a ball array packaging device for reducing interference signals, which comprises a base, a plurality of welding balls and a plurality of internal connecting capacitors. The base includes a contact layer, a power plane and a ground plane. The solder balls are fixed on the contact layer. The plurality of internal connection type capacitors are arranged on the contact layer and are electrically connected to the power plane and the ground plane by a conductive adhesive, so that interference signals between the power plane and the ground plane are reduced.

Description

Ball Array Packaging Device for Reducing Interfering Signals

The invention relates to a ball array packaging device for reducing interference signals, in particular to a ball array packaging device using semiconductor packaging technology to embed multiple capacitors in power planes and ground planes.

With the advancement of semiconductor manufacturing technology, hundreds of thousands or even millions of transistors are often built in an integrated circuit. If the hundreds of thousands of transistors are in the working state at the same time, for example, they are turned on or off at the same time, it will cause instantaneous pulse effect and interference signal to the power supply, so that the operation result of the integrated circuit is in an uncertain state.

In order to solve the problems of power supply voltage regulation and interference signals, a known method is to add a plurality of capacitors on the circuit board connected to the integrated circuit to eliminate the interference signals. FIG. 1 is a top view of a known plastic ball array package (PBGA) component. The ball array package device 11 is fixed on a circuit board 13 , and a plurality of external capacitors 12 are disposed around the ball array package device 11 . Each of the plurality of external capacitors 12 is electrically connected to the power plane and the ground plane of the ball array package component 11, so as to eliminate the interference signal between the power plane and the ground plane,

The known method will cause the circuit board 13 to be full of capacitors of various sizes and types, which not only causes the disadvantages of high cost and large area, but also does not meet the light, thin and small characteristics of today's high-tech products.

The purpose of the present invention is to eliminate the disadvantages of high cost and large usage area of the interference signal filtering method currently used in ball array packaging components. In order to achieve the above object, the present invention provides a ball array packaging device that reduces interference signals. The device uses semiconductor packaging technology to fix a plurality of internally connected capacitors on the base of the device of the present invention, and the multiple internally connected The type capacitor is electrically connected to the power plane and the ground plane of the device of the present invention directly or through a via hole, so as to effectively achieve the functions of voltage regulation and interference signal filtering.

The ball array packaging device for reducing interference signals of the present invention includes a base, a plurality of solder balls and a plurality of internal capacitors, the base includes a contact layer, a power plane and a ground plane, the plurality of solder balls , fixed on the contact layer. The plurality of internal capacitors are arranged on the contact layer, and are electrically connected to the power plane and the ground plane by using a conductive glue, so as to reduce the interference signal between the power plane and the ground plane.

The present invention will be described with reference to the accompanying drawings, in which:

FIG. 1 is a top view of a known ball array package component;

Fig. 2 is a top cross-sectional view of a first preferred embodiment of the ball array package device for reducing interference signals of the present invention;

3 is a cross-sectional view of a second preferred embodiment of the ball array packaging device for reducing interference signals of the present invention;

4 is a cross-sectional view of a third preferred embodiment of the ball array packaging device for reducing interference signals of the present invention; and

FIG. 5 is a cross-sectional view of a fourth preferred embodiment of the ball array package device for reducing interference signals of the present invention.

FIG. 2 is a top cross-sectional view of a first preferred embodiment of a ball array package device for reducing interference signals of the present invention. The ball array package device 21 includes a base 30 . A ground plane 24 is located at the center of the base 30 , and a plurality of ground balls 22 are fixed above the ground plane 24 . The outside of the ground plane is a power plane 25, and a plurality of power balls 27 are fixed above the power plane 25; a plurality of internal capacitors 23 are fixed on the base 30 and electrically connected to the ground plane 24 and the power plane 25 . The function of the internally connected capacitor 23 is equivalent to the externally connected capacitor 12 in FIG. 1, and is used for stabilizing voltage and filtering out interference signals between the power plane 25 and the ground plane 24. The power plane 25 is externally provided with a plurality of signals Ball 26. Herein, the ground ball 27 , the power ball 27 and the signal ball 26 are collectively referred to as solder balls. The plurality of grounding balls 22, the plurality of power supply balls 27 and the plurality of marking balls 26 can all transmit electrical signals connected to the circuit board 13 of the device of the present invention, and can utilize the principle of conduction to transfer the heat energy generated by the device 21 of the present invention through The circuit board 13 is released. The voltage level of the ground plane 24 is generally represented by the symbol V _ss , and the common voltage level in digital integrated circuits is 0 volts. The voltage level of the power plane 25 is usually represented by the symbol V _dd , and the common voltage level in today's digital integrated circuits is 3.3 volts. Since the inline capacitor 23 is embedded in the ball array packaging device 21 of the present invention by semiconductor packaging technology, the manufacturing cost and area of the ball array packaging device 21 can be effectively reduced in terms of overall application. The internal capacitor 23 is not limited to any material, as long as it conforms to the integrated circuit packaging technology, it can be used. A feasible in-line capacitor packaging technology is to fix the in-line capacitor 23 on the power plane 25 and the ground with a surface mount machine after the ball array packaging device 21 of the present invention is ball-planted. between plane 24.

3 is a cross-sectional view of a third preferred embodiment of the ball array packaging device for reducing interference signals of the present invention. The ball array packaging device 21 of this embodiment is a double-layer structure, and the first layer is a plane containing the power supply. 25 and the contact layer 36 of the ground plane 24, and a solder mask (solder mask) 34 is used to isolate the power plane 25 and the ground plane 24, and the second layer is a signal plane for transmitting electrical signals 31. The material of the signal plane 31 is not subject to any limitation, for example, common copper metal. An insulating plane 32 is used to isolate the first layer and the second layer. The insulating plane 32 is not subject to any restrictions, and common polymer resins are applicable. The signal plane 31 communicates with the power plane 25 or the ground plane 24 through a via hole 35 embedded with a conductive material to achieve the function of electrical signal transmission. on the contact layer 36 . The adhesive 33 is not limited to any material, common red glue can be used, the internal capacitor 23 is electrically connected between the power plane 25 and the ground plane 24 via a conductive glue 37, and the conductive glue 37 is also Not limited to any material, common tin-lead alloy material can be used. The two sides of the internal capacitor 23 are the ground ball 22 , the power ball 27 and the signal ball 26 respectively. It should be noted that the height of the internal capacitor 23 should be smaller than the height of the ground ball 22, the power ball 27, and the signal ball 26, so as to avoid insufficient contact area between the ball array package device 21 and the circuit board 13. resulting in poor contact.

4 is a cross-sectional view of a third preferred embodiment of the ball array packaging device for reducing interference signals of the present invention. The ball array packaging device of this embodiment has a four-layer structure, but it is also applicable to structures with other layers . Because the double-layer structure shown in FIG. 3 is worth improving, that is, the ground plane 24 and the power plane 25 are limited to a specific area, so the internal capacitor is also limited to the specific area. Therefore, although the double-layer structure has the advantage of lower cost, it lacks flexibility in use. Under the current design trend of ball array packaging tending toward multi-layer boards, the internal capacitor 23 can be selected to be fixed in the area of the ball array packaging device 21 where fewer components are placed, so as to improve the performance of the ball array packaging device 21. Use efficiency. In addition, the placement area can be used on the front side or the back side of the base 30, and the present invention does not make any limitation. As shown in FIG. The power plane 25 and the ground plane 24 can be electrically connected to the contact layer 36 via a via hole 35 embedded with a conductive material, respectively. The inline capacitor 23 is fixed on the contact layer 36 via an adhesive 33, and is electrically connected to the ground plane 24 and the power plane 25 via the via hole 35 to the contact layer using a conductive adhesive 37. The relative positions 41 and 12 of 36 are used to reduce the interference signal between the power plane 25 and the ground plane 24 .

Fig. 5 is a cross-sectional view of the fourth preferred embodiment of the ball array packaging device for reducing interference signals of the present invention. The ball array packaging device of this embodiment is a four-layer structure, but it can also be applied to double-layer or other layers According to the number structure, the position of the conductive glue 37 in FIG. 5 is located below the internal capacitor 23 , while the position of the conductive glue 37 in FIG. 4 is located on both sides of the internal capacitor 23 . The function of the conductive glue 37 in FIG. 4 and FIG. 5 is to electrically connect the internal capacitor 23 to the power plane 25 and the ground plane 24 through the conductive glue 37, but the difference lies in the difference between the two in the manufacturing process. There are some differences in steps and order. The structure of FIG. 4 is to first glue the internal capacitor 23 on the contact layer 36, and then use the conductive glue 37 to electrically connect the internal capacitor 23, the power plane 25 and the ground plane 24. . The structure of FIG. 5 is to first glue the conductive glue 37 on the power plane 25 and the ground plane 24 in the manufacturing process, and then fix the internal capacitor 23 on the conductive glue 37, so that the internal The connection capacitor 23, the power plane 25 and the ground plane 24 are electrically connected.

The technical content and technical characteristics of the present invention have been disclosed as above, but those skilled in the art may still make various replacements and modifications that do not depart from the spirit of the present invention based on the teachings and disclosures of the present invention; therefore, the protection scope of the present invention should not It is limited to those disclosed in the embodiments, but includes various replacements and modifications that do not depart from the present invention, and are covered by the following claims.

Claims (7)

1, a kind of ball arra package that reduces interference signal comprises:

One comprises the pedestal of a contact layer, a power plane and a ground plane;

A plurality of soldered balls are bonded on this contact layer; And

A plurality of internal connecting type electric capacity are arranged on this contact layer, and utilize a conducting resinl to be electrically connected to this power plane and this ground plane.

2,, also comprise the adhesion glue that will these a plurality of internal connecting type electric capacity be bonded on this contact layer with one according to the device of claim 1.

3, according to the device of claim 1, wherein this contact layer, this power plane and this ground plane are the different layers that lays respectively at this pedestal, and this contact layer is to be electrically connected to this power plane and this ground plane via a via.

4, according to the device of claim 3, wherein these a plurality of internal connecting type electric capacity are arbitrary zones that can freely be arranged at this contact layer.

5, according to the device of claim 1, wherein this power plane and this ground plane are the parts of this contact layer, and these a plurality of internal connecting type electric capacity are directly to utilize a conducting resinl to be coupled in this power plane and this ground plane.

6, according to the device of claim 1, wherein the height of these a plurality of internal connecting type electric capacity is less than the height of these a plurality of soldered balls.

7, according to the device of claim 1, wherein this internal connecting type electric capacity is to utilize the surface adhering technology to be bonded on this contact layer.

Images