TWI730291B - Electrostatic discharge (esd) protection device - Google Patents

Abstract

An electrostatic discharge (ESD) protection device includes a gallium nitride layer on a substrate. An aluminum gallium nitride layer is disposed on the gallium nitride layer. A gate insulating layer is disposed on the aluminum gallium nitride layer. A gate structure is disposed on the gate insulating layer. A metal field plate is disposed on the gate structure. A source structure is disposed at a first side of the gate structure on the gallium nitride layer, penetrating through the aluminum gallium nitride layer and the gate insulating layer. A drain structure is disposed at a second side of the gate structure on the gallium nitride layer, penetrating through the aluminum gallium nitride layer and the gate insulating layer. The metal field plate extends to the drains structure within a distance range to provide a parasitic capacitor with respect to the drain structure. The parasitic capacitor further includes a capacitor formed between the metal field plate and the gallium nitride layer.

Description

Electrostatic discharge (ESD) protection components

The present invention relates to an electrostatic discharge (ESD) protection technology, and particularly relates to electrostatic discharge (ESD) protection components and circuits and methods for manufacturing ESD protection components.

The phenomenon of electrostatic discharge (ESD) is a universal phenomenon that needs to be faced for integrated circuits manufactured by semiconductor technology. Especially at the input/output terminals of the electronic circuit, it will be connected with external electronic components. If the phenomenon of electrostatic discharge occurs, if the high voltage or large current generated at the moment enters the electronic circuit from the input/output terminal, it is likely to damage the electronic components.

The most common type of electronic circuit is a transistor. Based on the research and development of transistors, gallium nitride (GaN) transistors have been proposed, which have the characteristics of high breakdown voltage, high output power and low on-resistance, which can replace some silicon-based transistors.

Regarding the consideration of the electrostatic discharge protection of GaN transistors, an enhancement-mode (e-mode) GaN field-effect transistor is taken as an example. The operating voltage of the gate terminal is usually between 0 and 10V. When electrostatic discharge acts on the gate terminal, the gate terminal is easily damaged. Therefore, in order to protect the gate extremes, electrostatic discharge protection is designed It must be placed at the gate pole to protect the gate pole of the transistor element.

To achieve the effect of electrostatic discharge protection, its protection circuit can be designed in different ways with semiconductor manufacturing technology. However, different designs will correspond to different manufacturing costs. How to simplify ESD protection components and circuits is the need to consider and continue research and development for ESD protection.

The present invention provides electrostatic discharge protection technology for GaN transistors, which can simplify electrostatic discharge protection components and meet the requirements of electrostatic discharge protection circuits.

In one embodiment, the present invention provides an electrostatic discharge protection device, including a gallium nitride layer, disposed on a substrate. The aluminum gallium nitride layer is disposed on the gallium nitride layer. The gate insulating layer is disposed on the aluminum gallium nitride layer. The gate structure is arranged on the gate insulating layer. The metal field plate layer is arranged on the gate structure. The source structure is on the first side of the gate structure and disposed on the gallium nitride layer, and passes through the aluminum gallium nitride layer and the gate insulating layer. The drain structure is on the second side of the gate structure and disposed on the gallium nitride layer, and passes through the aluminum gallium nitride layer and the gate insulating layer. The metal field plate layer extends along the direction from the source structure to the drain structure, and the distance between the metal field plate layer and the drain structure is a length to form a parasitic between the metal field plate layer and the drain structure Capacitance, wherein a parasitic capacitance is also formed between the metal field plate layer and the gallium nitride layer.

In one embodiment, the electrostatic discharge protection device further includes an inter-layer dielectric layer. On the gate insulating layer, the gate structure, the metal field plate layer, and the The source structure and the drain structure.

In one embodiment, in the ESD protection device, the metal field plate layer includes a plurality of blocks, which discontinuously extend along the direction from the source structure to the drain structure to the length from the drain structure , Wherein the parasitic capacitance also includes a capacitance formed between two adjacent blocks.

In one embodiment, the ESD protection device further includes a drain metal connection structure. The drain metal connection structure includes a plug and is disposed on the drain structure. In one embodiment, the plug has an extension extending along the drain structure toward the gate structure, and forms an overlapping portion with the metal field plate layer, so that the parasitic capacitance further includes a structure connected by the drain metal The capacitance formed between the layer and the metal field plate.

In one embodiment, in the ESD protection device, an interlayer dielectric layer is included between the extension portion of the drain metal connection structure and the metal field plate layer.

In one embodiment, in the ESD protection device, the gate structure is a strip structure, and the metal field plate layer includes a plurality of metal strip layers extending from one side of the gate structure to a distance from the drain A length of the structure, wherein the drain structure includes a drain strip structure and a plurality of drain strip layers, extending from the drain strip structure to the gate structure, and alternately arranged with the plurality of metal strip layers, further , The drain structure and the gate structure are interdigitated structures.

In one embodiment, the present invention provides an electrostatic discharge protection circuit for protecting the first GaN transistor. The first GaN transistor has a gate terminal, a drain terminal, and a source terminal. The electrostatic discharge protection circuit includes a second GaN transistor, which is any of the aforementioned electrostatic discharge protection elements. The source structure connection of the second GaN transistor To the source terminal of the first GaN transistor. The drain structure of the second GaN transistor is connected to the gate terminal of the first GaN transistor. The gate structure of the second GaN transistor is also connected to the gate terminal of the first GaN transistor through the parasitic capacitance. The impedance element is connected between the gate structure and the source structure of the second GaN transistor.

In one embodiment, the present invention provides a method of manufacturing an electrostatic discharge protection device. The method includes: providing a gallium nitride layer, and the gallium nitride layer is disposed on a substrate. A layer of aluminum gallium nitride is formed on the gallium nitride layer. A gate insulating layer is formed on the aluminum gallium nitride layer. A gate structure is formed on the gate insulating layer. A metal field plate layer is formed on the gate structure. A source structure is formed on the first side of the gate structure, passes through the aluminum gallium nitride layer and the gate insulating layer, and is seated on the gallium nitride layer. A drain structure is formed on the second side of the gate structure, passes through the aluminum gallium nitride layer and the gate insulating layer, and is seated on the gallium nitride layer. The metal field plate layer is a single body or a separate multi-body extending within a distance of the drain structure to provide a parasitic capacitance relative to the gate structure. The parasitic capacitance also includes a capacitance formed by the metal field plate layer and the gallium nitride layer.

In one embodiment, as described in the method for manufacturing an electrostatic discharge protection device, it further includes forming the gate structure and the metal by using an inter-layer dielectric layer on the gate insulating layer. The field plate layer, the source structure and the drain structure.

In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

100: protected transistor

102: Protection circuit

106: Protection Transistor

108: impedance element

200: base

202: Gallium nitride layer

204: Aluminum gallium nitride layer

206: gate insulation layer

208: Gate structure

210: metal field layer

212: source structure

214: Drain structure

214a: drain strip layer

216: Interlayer dielectric layer

218, 218a: Metal connection structure

300, 302: metal field layer

N: Endpoint

FIG. 1 is a schematic diagram of an electrostatic discharge protection circuit for the gate terminal of a transistor according to an embodiment of the present invention.

2 is a schematic diagram of a cross-sectional structure of a GaN transistor to be protected according to an embodiment of the present invention.

3 is a schematic cross-sectional structure diagram of an electrostatic discharge protection device according to an embodiment of the present invention.

FIG. 4 is a schematic diagram of an electrostatic discharge protection circuit according to an embodiment of the present invention.

FIG. 5 is a schematic diagram of an electrostatic discharge protection circuit according to an embodiment of the present invention.

FIG. 6 is a schematic diagram of an electrostatic discharge protection circuit according to an embodiment of the present invention.

FIG. 7 is a schematic diagram of a capacitance in an electrostatic discharge protection device according to an embodiment of the present invention.

The present invention proposes an electrostatic discharge protection element for the electrostatic discharge protection requirements of GaN transistors. This ESD protection element can be compatible with the semiconductor manufacturing process of the GaN transistor that needs to be protected. Furthermore, it is possible to form a GaN ESD protection element without substantially adding other manufacturing processes.

Some implementations are given below to illustrate the present invention, but the present invention is not limited to the multiple examples. These embodiments allow proper combination to form other embodiments.

First, the overall circuit of the semiconductor element to be protected of the present invention will be described. need The semiconductor element to be protected is, for example, a GaN transistor. FIG. 1 is a schematic diagram of an electrostatic discharge protection circuit for the gate terminal of a transistor according to an embodiment of the present invention.

Referring to FIG. 1, for a protected transistor 100 based on a GaN transistor in an integrated circuit, it has a gate terminal G, a drain terminal D, and a source terminal S. The electrostatic discharge protection circuit 102 is arranged between the gate terminal G and the source terminal S. The electrostatic discharge protection circuit 102 includes a protection transistor 106. The source structure of the protection transistor 106 is connected to the source terminal S of the protected transistor 100. The drain structure of the protection transistor 106 is connected to the gate terminal G of the protected transistor 100. In addition, a capacitor 104 is connected between the gate structure of the protection transistor 106 and the drain terminal D. An impedance element 108 is connected between the gate structure of the protection transistor 106 and the source terminal S. Furthermore, the capacitor 104 and the impedance element 108 are connected to the gate structure of the protection transistor 106 via a terminal N.

In the present invention, as far as the electrostatic discharge protection circuit 102 is concerned, its capacitance 104 is provided by the parasitic capacitance of the protection transistor 106 in the present invention. Furthermore, in terms of manufacturing, there is no need to separately form the capacitor 104 separately. Since the protected transistor 100 is a GaN transistor, the protection transistor 106 of the present invention also uses a GaN transistor, and a metal field plate (Metal Field Plate) connected to the gate forms a parasitic capacitor 104. The protection transistor 106 and the protected transistor 100 are both GaN transistors, so the process of forming the capacitor 104 will not be substantially increased. The operation mode of the electrostatic discharge protection circuit 102 is described below.

When static electricity acts on the gate terminal G, the transient static electricity will be coupled through the capacitor 104, which will increase the voltage at the terminal N and turn on the protection transistor 106. Therefore, the transient static electricity voltage will be clamped to avoid being protected. Transistor 100 is subject to transient It is damaged by static electricity. The structure of the GaN transistor is described below.

2 is a schematic diagram of a cross-sectional structure of a GaN transistor that needs to be protected according to an embodiment of the present invention. Referring to FIG. 2, the protected transistor 100 is a GaN transistor, and its structure includes a gallium nitride layer 202 formed on a substrate 200. The substrate 200 is, for example, a silicon substrate. The substrate 200 is used to grow the gallium nitride layer 202, but does not involve the operating performance of the GaN transistor.

The gallium nitride layer 202 is used as the substrate of the GaN transistor, and an aluminum gallium nitride (AlGaN) layer 204 is first formed on it. The gate insulating layer 206 is formed on the aluminum gallium nitride layer 204. The gate insulating layer 206 is, for example, a silicon nitride layer. The gate structure (G) 208 is formed on the gate insulating layer 206. The source structure (S) 212 and the drain structure (D) 214 are formed on the gallium nitride layer 202 and located on both sides of the gate structure 208. In addition, for the structure of the GaN transistor, there will also be a metal field plate layer 210 on the gate structure 208, extending the gate structure 208 in the horizontal direction, which can improve the field effect for the operation of the transistor. The metal field plate layer 210 is substantially isolated from the drain structure 214.

In addition, as is generally known, the structure required to form a device in the semiconductor process is completed with an inter-layer dielectric layer 216, which will not be described in detail here. The interlayer dielectric layer 216 is generally a silicon oxide material, which covers the source structure 212, the drain structure 214, the gate structure 208, etc., and acts as an insulation. The source structure 212, the drain structure 214, and the gate structure 208 of the protected transistor 100 are also connected to the outside through the metal connection structure 218. The metal connection structure 218 is, for example, a plug structure.

Fig. 3 is a cross-sectional view of an electrostatic discharge protection device according to an embodiment of the present invention Schematic. Referring to FIG. 3, the electrostatic discharge protection element proposed by the present invention also has a GaN-type transistor structure as the protection transistor 106 in FIG. The manufacturing process of the protection transistor 106 is compatible with the manufacturing process of the protected transistor 100, and therefore, can be manufactured at the same time.

The structure of the protective transistor 106 is described below. As mentioned above, the protection transistor 106 is also a GaN-type transistor, and thus is similar to the protected transistor 100. The same element symbols represent the same element components, and the description will not be repeated.

The difference between the protection transistor 106 and the protected transistor 100 is the difference between the metal field plate layer 300 and the metal field plate layer 210. As shown in the circuit of FIG. 1, it requires a capacitor 104 to achieve electrostatic discharge protection. In one embodiment, the present invention uses the metal field plate layer 300 to form a parasitic capacitance, which serves as the function of the capacitor 104.

In one embodiment, the metal field plate layer 300 on the gate structure 208 extends to a distance from the drain structure 214 so as to form a parasitic capacitance with the drain structure 214, where the length may be 10-20 microns. In addition, since the metal field plate layer 300 and the gallium nitride layer 202 can also form another parasitic capacitance at the same time, it is connected in parallel from the circuit point of view. Therefore, the whole can be regarded as a parasitic capacitance to provide the protection circuit 102. Capacitance 104.

FIG. 4 is a schematic diagram of an electrostatic discharge protection circuit according to an embodiment of the present invention. Referring to FIG. 4, the protected transistor 100 and the protective transistor 106 are used to form an integrated circuit. For ease of understanding, the schematic circuit diagram of FIG. 1 is also shown in the lower right of FIG. 4. According to the protection circuit 102 of the present invention, the protection transistor 106 and the capacitor 104 therein can be manufactured at the same time when the protected transistor 100 is manufactured. Capacitor 104 is a guarantee The parasitic capacitance of the transistor 106 is protected, so no additional manufacturing process is required to complete it.

Under the technical concept of protecting the transistor 106 while forming a parasitic capacitance, the parasitic capacitance can also have other embodiments. FIG. 5 is a schematic diagram of an electrostatic discharge protection circuit according to another embodiment of the present invention.

Referring to FIG. 5, the metal field plate layer 302 of the protection transistor 106 is a modification of the metal field plate layer 300 in FIG. 3 or FIG. 4. The structure of the metal field plate layer 300 is based on a single body as an example. However, in this embodiment, the metal field plate layer 302 may be a structure of multiple blocks, in which two adjacent blocks also form parasitic capacitances.

In one embodiment, under the technical concept of protecting the transistor 106 while forming a parasitic capacitance, the formation of the parasitic capacitance may also have other changes. FIG. 6 is a schematic diagram of an electrostatic discharge protection circuit according to another embodiment of the present invention.

Referring to FIG. 6, the metal connection structure 218 on the drain structure 214 can also be changed. In this embodiment, the metal field plate layer 300 is taken as an example, but the change of the metal field plate layer is not limited. The modified metal connection structure 218a, in addition to the aforementioned metal connection structure 218 such as the plug structure, also includes an extension on the plug structure, which is covered on the interlayer dielectric layer 216 and is sufficiently compatible with the metal field plate layer 300 Overlap to form another parasitic capacitance.

FIG. 7 is a schematic diagram of a capacitance in an electrostatic discharge protection device according to an embodiment of the present invention. Referring to FIG. 7, the metal field plate layer 300 extending on the gate structure (G) 208 and the drain structure 214 can have a two-dimensional structure. The gate structure 208 is a strip structure, and the metal field plate layer 300 includes a plurality of metal strip layers. These metal strip layers extend from one side of the gate structure 208 to a length from the drain structure 214. In addition, The drain structure 214 also includes a drain strip structure and a plurality of drain strip layers 214a. A side of the strip structure of the drain structure 214 extends toward the gate structure 208, and is alternately arranged with a plurality of metal strip layers of the metal field plate layer 300. Furthermore, the drain structure and the gate structure are interdigitated状结构。 Like structure. In this way, the metal strip layer of the metal field plate layer 300 and the drain strip layer 214a also constitute a plurality of parasitic capacitances on the side.

As described above, a variety of parasitic capacitances can be formed between the metal field plate layer 300 and the drain structure 214, which are integrated into a capacitor 104.

According to the structure of the protective transistor 106 in FIG. 3, the following manners can also be used from the manufacturing point of view. In one embodiment, the present invention provides a method of manufacturing an electrostatic discharge protection device. The method includes: providing a gallium nitride layer 202, and the gallium nitride layer 202 is disposed on a substrate 200. An aluminum gallium nitride layer 204 is formed on the gallium nitride layer 202. A gate insulating layer 206 is formed on the aluminum gallium nitride layer 204. A gate structure 208 is formed on the gate insulating layer 206. A metal field plate layer 300 is formed on the gate structure 208. A source structure 212 is formed on the first side of the gate structure 208, passes through the aluminum gallium nitride layer 204 and the gate insulating layer 206, and is seated on the gallium nitride layer 202. A drain structure 214 is formed on the second side of the gate structure 208, passes through the aluminum gallium nitride layer 204 and the gate insulating layer 206, and is seated on the gallium nitride layer 202. The metal field plate layer 300 is a single body or a separate area extending to a distance from the drain structure 214 to provide a parasitic capacitance relative to the gate structure. The parasitic capacitance also includes a capacitance formed by the metal field plate layer 300 and the gallium nitride layer 202.

In summary, the ESD protection device of the present invention can be compatible with the semiconductor manufacturing process of the GaN transistor that needs to be protected, and it does not need to be added. Other manufacturing processes can form GaN electrostatic discharge protection components. The capacitance required in the protection circuit can be replaced by the parasitic capacitance formed by the metal field plate layer.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be subject to those defined by the attached patent application scope.

106: Protection Transistor

200: base

202: Gallium nitride layer

204: Aluminum gallium nitride layer

206: gate insulation layer

208: Gate structure

212: source structure

214: Drain structure

216: Interlayer dielectric layer

218: Metal connection structure

300: metal field layer

Claims (6)

An electrostatic discharge protection element includes: a gallium nitride layer arranged on a substrate; an aluminum gallium nitride layer arranged on the gallium nitride layer; a gate insulating layer arranged on the aluminum gallium nitride layer; a gate The electrode structure is arranged on the gate insulating layer; the metal field plate layer is arranged on the gate structure; the source structure is arranged on the gallium nitride layer on the first side of the gate structure, passing through the nitrogen An aluminum gallium nitride layer and the gate insulating layer; and a drain structure. The gallium nitride layer is disposed on the second side of the gate structure, passing through the aluminum gallium nitride layer and the gate insulating layer, wherein the The metal field plate layer extends to a length of distance from the drain structure to provide a parasitic capacitance relative to the drain structure, wherein the metal field plate layer includes a plurality of blocks that extend discontinuously to the drain structure. The pole structure has a length of distance, wherein the parasitic capacitance also includes the capacitance formed between two adjacent blocks. An electrostatic discharge protection element includes: a gallium nitride layer arranged on a substrate; an aluminum gallium nitride layer arranged on the gallium nitride layer; a gate insulating layer arranged on the aluminum gallium nitride layer; a gate The pole structure is set on the gate insulating layer; the metal field plate layer is set on the gate structure; A source structure, provided on the gallium nitride layer on the first side of the gate structure, passing through the aluminum gallium nitride layer and the gate insulating layer; a drain structure, provided on the second side of the gate structure On the gallium nitride layer, pass through the aluminum gallium nitride layer and the gate insulating layer, wherein the metal field plate layer extends to a distance from the drain structure to provide a distance between the drain structure and the drain structure. Parasitic capacitance; and a drain metal connection structure, the drain metal connection structure includes: a plug disposed on the drain structure; and an extension portion disposed on the plug, extending in the direction of the gate structure, and the The metal field plate layer forms an overlapping part, so the parasitic capacitance further includes a capacitance formed between the drain structure and the metal field plate layer. According to the ESD protection device described in claim 2, wherein the metal field plate layer includes a plurality of blocks, and each block is arranged parallel to each other and discontinuously extends to a length of a distance from the drain structure, wherein The parasitic capacitance also includes a capacitance formed between two adjacent blocks. According to the ESD protection device described in item 2 of the scope of patent application, an interlayer dielectric layer is included between the extension portion of the drain metal connection structure and the metal field plate layer. An electrostatic discharge protection element includes: a gallium nitride layer arranged on a substrate; an aluminum gallium nitride layer arranged on the gallium nitride layer; and a gate insulating layer arranged on the aluminum gallium nitride layer; The gate structure is arranged on the gate insulating layer; the metal field plate layer is arranged on the gate structure; the source structure is arranged on the gallium nitride layer on the first side of the gate structure, passing through the An aluminum gallium nitride layer and the gate insulating layer; and a drain structure. The gallium nitride layer is provided on the second side of the gate structure, passing through the aluminum gallium nitride layer and the gate insulating layer, wherein The metal field plate layer extends to a length of distance from the drain structure to provide a parasitic capacitance relative to the drain structure, wherein the gate structure is a strip structure, and the metal field plate layer includes a plurality of The metal strip layer extends from one side of the gate structure to the distance range of the drain structure, wherein the drain structure includes: a drain strip structure; and a plurality of drain strip layers formed by the drain strip The shaped structure extends to the gate structure and is alternately arranged with the plurality of metal strip layers. An electrostatic discharge protection circuit for protecting a first GaN transistor. The first GaN transistor has a gate terminal, a drain terminal and a source terminal. The electrostatic discharge protection circuit includes: a second GaN transistor, such as the first in the scope of patent application To the electrostatic discharge protection element of any one of 5, wherein the source structure of the second GaN transistor is connected to the source terminal of the first GaN transistor, and the drain structure of the second GaN transistor is connected To the gate terminal of the first GaN transistor, the gate structure of the second GaN transistor is also connected to the gate terminal of the first GaN transistor through the parasitic capacitance; and The impedance element is connected between the gate structure and the source structure of the second GaN transistor.

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